TW426584B - Method of polishing semiconductor wafers - Google Patents

Abstract

A method of the present invention for polishing a semiconductor wafer which inhibits flatness degradation of the wafer caused by polishing comprises simultaneously rough polishing front and back surfaces of the wafer using a polishing slurry while controlling polishing parameters so that the front and back surfaces of the wafer deviate from flatness by becoming generally concave. The front side of the wafer is then subjected to a finish polishing operation using a finish polishing slurry such that the front surface of the wafer becomes highly reflective. The concavity of the front and back surfaces is substantially reduced as a result of finish polishing.

Description

Λ 26 5 8 4 V. Description of the invention (1) Background of the invention The present invention relates generally to a method for processing a semiconductor wafer prepared from a single crystal silicon ingot, and particularly to a method for polishing such a semiconductor wafer. Semiconductor wafers are generally prepared from single crystal ingots, such as silicon ingots, which are trimmed and ground to have one or more flat portions for proper orientation of the wafer in subsequent procedures. The ingot is then sliced into individual wafers, each of which undergoes many wafer forming or processing operations to reduce the thickness of the wafer, remove damage caused by the slicing operation, and create a highly reflective surface. In the conventional wafer forming method, the periphery of each wafer is first rounded, such as by using an edge grinding operation, to reduce the risk of wafer damage during further processing. Secondly, remove solid material from the front and back of each wafer to remove the surface damage caused by the slicing operation, and make the opposite front and back flat and parallel. Removal of this raw material is carried out by subjecting the front and back sides of the wafer to a conventional lapping operation (using a lapping slurry containing abrasive particles), or a conventional grinding operation (using abrasive particles to be buried in Its t disk), or even a combination of both lapping and grinding operations. The wafers are then etched by immersing each wafer completely in a chemical etchant to further reduce the thickness of the wafer and remove mechanical damage caused by lapping and / or grinding operations. At least one surface of each wafer is polished with a colloidal silicon oxide slurry and a chemical etchant to remove damage caused by the etching operation and produce a highly reflective, damage-free surface. A damage-free surface is required to print the circuit on a wafer using, for example, electron beam-lithographic or lithography (p h 0 t ο 1 i t h 0 g r a p h i c) method. Exist in

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d2B 5 B V. Description of the invention (2) The amount of damage on the wafer surface directly affects the device line width possibility, method range, yield and yield. Finally, the wafers are cleaned and inspected before they are packaged and handed over to the customer for subsequent dicing into semiconductor wafers. When measuring the quality of processed semiconductor wafers, wafer flatness is an important parameter for customers, because wafer flatness has a direct impact on subsequent use and the quality of semiconductor wafers cut from wafers. The flatness can be determined by many measurement methods. For example, "Taper" is a measure of the lack of parallelism between the unpolished backside of a wafer and a selected focal plane. “TIR” or Total Indicated Reading is the difference between the highest point above the selected focal plane and the lowest point below the focal plane, and it is always a positive number. "FPD-3pt" or three-point focal plane deviation is the highest point above or the lowest point below the selected three-point focal plane, and it can be positive or negative. "STIR" and "SFPD" ("S" stands for "Site") are as defined above (about TIR and FPD-3pt), but are measured on a special small area of the wafer, such as 1 mm X 1 mm. The "TTV" or total thickness change is the difference between the highest and lowest heights of the polished front side of the wafer. Regarding wafer flatness, conventional processing methods have many disadvantages. Processing steps to reduce surface damage tend to have an adverse effect on wafer flatness. For example, immersing the entire wafer in a chemical etchant can worsen the flatness produced by lapping or grinding operations. In addition, polishing a wafer with a standard single-sided polishing device tends to further deteriorate the flatness of the wafer, and the deterioration of the flatness generally increases with an increase in the amount of silicon removed. In particular, standard single-sided polishing devices have a tapered surface that faces the wafer's periphery.

-42653d V. Description of Invention (3) (for example, reducing its thickness) tends to result in wafers with slightly convex front and back sides. In order to reduce the negative impact on flatness caused by single-sided polishing, an alternative method of performing double-sided polishing on the wafer is known, in which the front and back surfaces of each wafer are roughened simultaneously so that the wafers are on both sides of the wafer. Material removal occurs evenly. However, the rough-polished wafer is still subjected to single-side fine polishing to produce a highly reflective 'damage-free front side'. Therefore, although the negative effect on flatness caused by single-side polishing is reduced, it still exists in the finely polished crystal grains. SUMMARY OF THE INVENTION Several objects of the present invention are to provide a method for polishing a semiconductor wafer which can improve the flatness characteristics of the wafer; to provide such a method which can be performed on conventional existing equipment; and to provide such a method which is simple and economical to perform. method. Generally speaking, the polishing method of the present invention for suppressing the degradation of wafer flatness caused by polishing of a semiconductor wafer includes rough polishing the front and back of the wafer at the same time using a polishing slurry, and simultaneously controlling the polishing parameters to make the wafer The front and back surfaces deviate from flatness by being substantially concave. A fine polishing slurry is then used to finish polish the front side of the wafer to make the front side of the wafer highly reflective. The depressions on the front and back are substantially reduced as a result of the fine polishing. γ Brief description of the diagram! Figure 1 is a flowchart showing a method for processing a semiconductor wafer; Figure 2 is a partial top view of a part of a double-side polishing machine; j Figure 3 is a polishing method for polishing a semiconductor wafer according to the present invention Half d265B4 V. Description of the invention (4) Table of experimental results of conductor wafers; Figure 4 is a graph of the focus plane deviation -3 points recorded in the table of Figure 3; and Figure 5 is the table of Figure 3 A graph of total thickness changes recorded in. In the several figures shown, the relevant component numbers indicate the relevant parts. Detailed description of the preferred embodiment The applicant has found that several objects of the present invention can be achieved by performing a three-step polishing operation on a semiconductor wafer, which enables rough polishing of the wafer on a double-sided polishing machine to A concave or dish-shaped surface is formed on both the front side and the back side, and the rough-polished wafer is subjected to an intermediate polishing operation and a fine polishing operation on a single-side polishing machine. Although the method of the present invention is described and described herein with reference to a semiconductor wafer made of silicon, it should be understood that the method can be applied to processing wafers, disks, etc. made of other materials without departing from the scope of the present invention. . Fig. 1 illustrates a method of processing a semiconductor wafer in which wafers are first sliced from a single crystal bond, such as by using a conventional inner diameter ore or a conventional wire saw to have a predetermined starting thickness. The sliced wafer is generally dish-shaped and has a periphery and opposite front and back sides. The initial thickness of each wafer is substantially larger than the desired final thickness, so that subsequent processing operations can be performed to reduce the thickness of the wafer without the risk of damaging or breaking the wafer. After slicing, the wafer can be ultrasonically cleaned to remove particulate matter deposited on the wafer from the slicing operation. Use conventional edge grinders to trim (eg, round) the sides of the wafer's periphery to reduce the risk of damaging the wafer during subsequent processing.

/ L265B4 5. Description of the invention (5) Next, the wafer is placed in a conventional lapping machine to remove the raw materials from the front and back of the wafer using a lapping slurry containing abrasive particles. A lapping operation is performed to substantially reduce the thickness of the wafer, thereby removing the damage caused by the wafer dicing operation, and flattening and parallelizing the front and back sides thereof. As illustrated in FIG. 1, a conventional polishing operation for polishing the front and back surfaces of an wafer using an abrasive disk in which abrasive particles are embedded may be performed instead of or in combination with a lapping operation. The wafer is then completely immersed in a chemical etchant, such as a conventional caustic afterglow solution containing 45% (by weight) KO Η, thereby removing additional material from the front and back of the wafer to reduce Surface damage caused by lapping and / or grinding. Those skilled in the art should understand that the immersion operation of wafers has a tendency to deteriorate the flatness of the crystal circle achieved during lapping or grinding operations. Finally, the wafer is subjected to edge polishing and a polishing operation according to the polishing method of the present invention to provide a highly reflective, non-damaged wafer surface. Still referring to FIG. 1, the polishing method of the present invention includes a rough polishing operation in which a wafer is placed in a conventional double-side polishing machine (a part of which is shown in FIG. 2) to simultaneously polish the front and back surfaces of the wafer. A preferred double-side polishing machine of this type is the model name AC 1 400 manufactured by Ret d s b u rg, Peter Waters, Germany. Those skilled in the art are familiar with the structure and operation of a conventional double-side polishing machine for polishing semiconductor wafers, and only the range required to explain the method of the present invention will be described here. Referring to FIG. 2, a conventional double-side polishing machine has a lower pressing table (not shown) which can be rotated about a central rotation axis X by a suitable transmission motor (not shown in the figure). The polishing surface defined by the polishing pad 21 is fixed on the pressing table so as to be rotated together with it.

d26584

V. Description of the invention (6) I i turn. The wafer holder 23, which can fix one or more wafers, is seated on the polishing pad, and rotates relative to the lower stage and the polishing pad around the central rotation axis Y of the carrier, and Axis X moves on the road. The wafer is fixed to the bracket by combining the front side of the wafer and the polishing pad covering the lower pressing table. i Wafers are engraved on the perimeter of the wafer carrier to combine with the internal and external drive rings. The internal transmission ring system is arranged on the inner periphery adjacent to the pressure table.

I 丨 edge, and can be rotated by another transmission motor (not shown in the figure) around the center of the pressing table and the I axis X. The pin extends upward from the internal drive ring to engage the notched peripheral drive of the bracket. The outer transmission ring is arranged on the outer peripheral edge of the pressing table and can also rotate around the central rotation axis of the pressing table. The pins extend upward from the external drive ring to engage the notched peripheral drive of the wafer carrier. The rotation of the internal and 1i external drive rings makes the bracket rotate around its own central rotation axis, and depends on the rotation direction of the internal and external drive rings and the speed difference between the rings: Run around. The upper stage (not shown in the figure) is mounted on a pendant above the wafer carrier; the mandrel (not shown in the figure) is moved straight so that it is fixed to the upper stage: Not shown in the figure but similar to the polishing pad 21) and the polishing pad 21 of the lower pressing table is in a relative relationship. The upper platen and its related polishing pad can rotate together with the lower platen and wafer holder about the axis of rotation of the mandrel. In the conventional double-side polishing machine, it rotates with the center of the lower platen. Axis X is coaxial. The mandrel can be moved up and down along the mandrel rotation axis, so that the upper pressing table and polishing pad are moved to a polishing combination with the back surface of the wafer fixed by the wafer holder to clamp the wafer between the upper and lower polishing pads. between. The force exerted on the wafer by the polishing pad, or polishing pressure, is roughly the vertical movement

Page 10 Λ26584 V. Description of the invention (7) Function of the downward force applied by the pressing table and polishing pad. In a polishing operation order, a conventional polishing slurry containing abrasive particles and a chemical etchant (such as a KOH solution) is applied between the polishing pad and the wafer. A preferred polishing slurry is manufactured by Wimington, Delaware (Wi 1 m i ng 1: ο η) DuPont (Du P ο n t) under the trade name Syton HT50. The polisher works on the surface of the wafer held by the wafer holder to remove material simultaneously and uniformly from both sides of the wafer, leaving the rough-polished front and back. For example, a double-side polishing operation can remove from the wafer a thickness between 2 4-30 micrometers (12-15 micrometers per side) °! Makes wafers now with rough-polished front and back sides It is better to perform the intermediate polishing operation, in which the front surface of the wafer is polished, but the back surface is not polished to further smooth the front surface. To do this, the wafer is placed in a conventional single-sided 1 polishing machine (not shown). A preferred single-side polishing machine is the model name 6DZ manufactured by Howard Strasbaugh, Inc., of San Luis Obispo, California. In this machine, the wafer is mounted on the ceramic block in a conventional manner by applying a wax layer to the surface of the ceramic block and adhering the wafer to the block, leaving the front side of the wafer exposed. This ceramic block is placed on the turntable of the machine 1 so that the front side of the wafer is in contact with the polishing surface of the polishing pad. The polishing head is mounted on the machine and can be moved vertically along an axis extending through the ceramic block. When the turntable rotates, the polishing head moves against the ceramic block and pushes the ceramic block toward the turntable, thus pressing the front side of the wafer into a polishing combination with the polishing surface of the polishing pad. A conventional polishing slurry containing abrasive particles, such as a polishing slurry made by DuPont under the trade name S yt ο η Η T 5 0 in Wilmington, Delaware, and page 11 265265. Description of the invention (8 ) A chemical etchant, such as a KOH solution, is applied to the polishing pad. Cracking works on the surface of a wafer to remove a material from the front side of the wafer to improve the smoothness of the surface. For example, it is preferred that the front side of the intermediate polishing operation remove material below about 1 micron. Finally, the wafer is subjected to a fine polishing operation, in which the light of the wafer is removed to remove the damage caused by the wafer operation in the previous processing operation, resulting in a highly reflective, non-damaged front side of the wafer. It is preferred to polish the same single-sided polishing machine as previously described for intermediate polishing wafers. However, it should be understood that individual single-sided polishing machines may be used in the fine polishing operation without departing from the scope of the present invention. The polishing slurry, which is mainly ammonia to reduce the concentration of colloidal silica, is injected into the polishing pad. An excellent fine polish in the Violet Series is manufactured by Rodel, Newark, Delaware, under the trade name Advansil 1595. The polishing slurry works against the front side of the wafer to remove any residual haze, so that the front side of the wafer is approximately highly reflective and non-destructive. Those skilled in the art will understand single-side polishing operations, such as the aforementioned fine polishing operations, which The crystal characteristics obtained by rough polishing on both sides of the wafer have a negative effect. The method of polishing semiconductor wafers of the present invention is intended to shape the wafer in double-sided rough polishing to make full use of the subsequent forming that occurs in the finishing polishing operation, thereby producing a finished wafer with frank characteristics. In particular, as shown in FIG. 1 and more specifically, the wafer is subjected to a double-sided rough polishing operation, in which the wafer is rough-polished in a rough-polished manner that produces a symmetrical, concave (eg, dish-shaped) front and back. The dagger pad is used for the material, and the scratch caused by the precise polishing of the wafer front surface is used to refine the wafer. The wafer is used, and it has a Newark light pad to make the wafer scratch and hurt. The middle and circular flatness method (Figure 1) In the middle and with improved flatness 3 is explained in the square with approximate wafers. Α hs V. Description of the invention (9) For example, in the first experiment, two groups The wafer is subjected to a double-sided rough polishing operation, and the TTV of each wafer is measured. The first set of wafers (referred to as batch 1 wafers in the experiment) was rough-polished on both sides to have a convex (for example, dome-shaped) front and back sides having an FPD-3pt of about 0.5 μm. The second set of wafers (referred to as batch 2 wafers in the experiment) was rough-polished on both sides to have concave (eg, dish-shaped) front and back sides, which had an FPD-3pt of about -0.50 microns. The wafer is then subjected to an intermediate polishing operation in which the wafer is polished in a single-sided polishing machine according to the conventional intermediate polishing operation discussed above. Table 1 below describes the conditions for wafers to undergo intermediate polishing in experiments. The polishing pressure, polishing time, and etchant (eg, KOH) flow rate are changed for each processed wafer. After each intermediate polishing operation, the TTV value, maximum ST I R and TTV degradation were measured and recorded as shown in Table I. TTV degradation is calculated as the wafer's TTV value increased (eg, flatness deteriorated) or decreased (eg, flatness improvement) relative to the TTV value of the wafer measured before the intermediate polishing operation. As shown in this table, batch 2 wafers (for example, wafers with recessed front and back surfaces) typically have lower TTV values than batch 1 wafers after intermediate polishing, regardless of the polishing parameters. In other words, before the intermediate polishing operation,

In the case of rough polishing on the I-side, when the wafer is formed with a concave front and back, the flatness characteristics of the positive wafer obtained by rough polishing on both sides of the wafer can be optimally maintained.

Page 13 Λ265β4… -—____ 5. Description of the invention (10) Table 1 Factor A: Factor B: Factor C: Response Response Response Pressure Cycle Time KOH Flow TTV Maximum STIR TTV Degradation Batch (psi) (sec) (ml / Points) (micro demand) (micron) (micron) 1 batch group 1 45.00 100 100 1.64 0.92 1.45 2 batch group 1 6〇 " 〇0 50 200 1.13 0.64 0.86 3 batch group 1 60.00 150 0 0.9 0.55 0.59 4 batch group 1 45.00 100 100 1.55 0.83 1.22 5 Lot 1 1 30.00 50 0 0.44 0.28 0.17 6 Lot 1 1 30.00 150 200 1.96 1.14 1.64 7 Lot 2 2 60.00 50 0 0.39 0.27 0.08 8 Lot 2 2 45.00 100 100 1.08 0.67 0.70 9 Lot 2 30.00 150 0 0.56 0.39 0.15 10 Lots 2 45.00 100 100 0.88 0.56 0.55 11 Lots 2 30.00 50 200 0.51 0.37 0.23 12 Lots 2 60.00 150 200 0.32 0.24 0.00 Perform further experiments to find wafers for consistent rough polishing , So that a better set of double-sided polishing machine parameters with concave front and back. Especially ’! Wafers are processed in a Peter Wolters AC 1400 double-side polishing machine. The machine parameters studied include polishing pressure, upper platen speed, lower platen speed, internal drive ring speed, external drive ring speed, etchant (such as 'K0H) flow rate, slurry (such as' Syton HT50) flow rate, and application The temperature of the cooling water for cooling the upper and lower platens. Other research parameters include the utility of the initial polishing pad modification, such as operating the machine to chemically and mechanically clean the polishing pad before loading the wafer into the carrier, and wafer carrier thickness. Table 丨 below shows the preferred settings of the double-sided polishing machine obtained from these experiments.

Page 14 426 5 84 i V. Description of the invention (11)

Table II Suggested setting of machine parameters Polishing pressure, daN 600 Over / under table cooling water temperature, ° C 40 Above table speed, rpm 30 Below table speed, rpm -30 Internal drive ring speed, rpm 15 External drive ring Speed, rpm -15 Money flow rate, ml / min 350 ί slurry flow rate, ml / min 95 DI water flow rate, ml / min 136 pad modification, min 0 bracket thickness, micron final product thickness + 2 microns Also shown in Table II, the applicant found that the thickness of the wafer carrier could be used as a second or supplementary way to form a wafer with a concave front and back. When the thickness of the rough-polished wafer becomes lower than the thickness of the carrier, the polishing pad is combined with the wafer carrier to prevent further removal of material from the wafer. However, because the polishing pad is slightly flexible, the polishing pad continues to remove material from the center of the wafer, and at the same time, radially from the center of the wafer toward the wafer carrier to suppress the removal of the wafer material, resulting in Concave shaped surface. For example, after rough polishing, the wafer carrier thickness is about 2 micrometers better than the desired final thickness of the wafer. Additional experiments were performed to determine better single-sided polishing machine settings for intermediate and fine polishing operations. These settings are shown in the tables I I I and I V, respectively.

426 584 I V. Description of the invention (12)

Table III Step 1 2 3 4 5 Time (seconds) 5 10 10 10 5 Total = 4 0 Pressure (psi) 0 30 30 0 0 Deionized water (m 1 / min) 600 33 33 600 0 Polyox solution (ml / min ) 0 0 0 600 600 in paste 1 (ml / min) 66 33 33 0 0 etchant (ml / min) 200 200 0 0 0 in paste 2 (ml / min) 0 0 0 0 0

Table IV Step 1 2 3 4 5 6 7 8 9 Time (seconds) 2 5 100 70 30 25 10 5 Total = 247 Pressure (psi) 0 15 15 15 15 0 0 0 DI water (ml / min) 600 500 500 500 500 700 700 700 Polyox solution (mi / min) 0 0 0 0 0 0 200 0 In pulp 1 ㈣ / min) 0 0 0 0 0 0 0 0 Marking agent (ml / min) 0 0 20 0 0 0 0 0 Slurry 2 ⑽ / min) 0 21 21 18 16 0 0 0 Regarding Table II, step 1 represents a conventional preparation step in which the polishing pad is cleaned with deionized water and polishing of the slurry and etchant (eg, KOH). Step 2 is a removal step in which an etchant helps remove material from the front side of the wafer to further reduce damage existing on the front side. Step 3

Page 16 426584 1 5 'Invention note (13)

I | Smoothing step 'where the front surface is polished without using an etchant' to further smooth the front surface before finishing polishing. As shown in steps 4 and 5, then the wafer is cleaned and coated with a protective coating in a conventional manner: | | to prevent further oxidation of the wafer's front surface. A preferred coating is one which is sold under the trade name Polyox by Danion Carbide I Corporation-Specialty Cheniicals, Danbury, Connecticut. Solution of the product. | | The fine polishing operation described in Table 1V includes a conventional preparation step (step i 1) ’wherein the polishing pad is cleaned with deionized water. Steps 2_5 describe the polishing steps of the final polishing operation and steps 6-8 are the conventional post-polishing steps, among which 1: clean the wafer again and apply a protective coating to prevent the front of the wafer |: Further Oxidation.丨; For example, according to the method of the present invention, 35 wafers each having a diameter of 200 mm are polished. Referring to FIG. 3, each crystal is measured before the double-sided rough polishing: the average wafer thickness of a circle 'and each of the wafers is subjected to the aforementioned rough polishing operation. For each wafer ', the average wafer thickness after rough polishing was measured and recorded together with the average FPD-3pt, the average TTV, and the average maximum STIR. Rough polishing on both sides | After operation, the negative FPD-3pt value measured for each wafer indicates the concave front and back contours expected of the wafer. A rather low TTV value indicates a positive flatness characteristic obtained by double-sided polishing of a wafer. Then, the wafer is subjected to intermediate and i finishing polishing as described above with respect to Tables I I I and I V 'and the average FP is measured again for each wafer)) _ 3p1 :, TTV, and maximum: S T I R. Consider the TTV degradation of each wafer relative to the τ τ v of the wafer in the middle and before polishing. As shown in Figures 3 and 4, measured in the middle and after polishing

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I: V. Description of the invention (14) The FPD-3pt value indicates that the wafer becomes flatter as expected. As indicated in Figure 5 and by the negative TTV degradation values recorded in Figure 3, the TTV value of the wafer is essentially

: I decrease in the result of intermediate and fine polishing (that is, flatness characteristics are improved). In view of the foregoing, it can be seen that several purposes of the invention have been achieved and other advantageous results achieved. Rough polishing on both sides provides crystals with good flatness characteristics. During the rough polishing process, the wafer is formed to have a concave front and back surfaces, so that the wafer forming characteristics related to subsequent intermediate and fine polishing operations can be fully utilized. In other words, before the wafer is subjected to intermediate and fine polishing operations, the wafer is formed to have a concave surface, and the wafer flatness characteristics obtained by subjecting the wafer to rough polishing on both sides are preserved, and in most cases Lieutenant General improved it. In addition, the method of the present invention can be carried out by using conventional and existing wafer processing machines by using the preferable machine setting values described in Tables II, 1 I I, and IV. Since various changes can be made in the above structure and method without departing from the scope of the present invention, everything contained in the above description or shown in the drawings should be explained by way of illustration and not limitation.

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Claims (1)

4.26 5 8 A; VI. Patent Application Scope II l. A method for polishing semiconductor wafers, which can suppress the degradation of the flatness of wafers formed by $. This method includes the following steps in order: (a) using polishing slurry at the same time Roughly polish the front and back of the wafer and control the polishing parameters so that the front and back of the wafer deviate from flatness by recessing; and (b) use a polishing slurry to polish the front of the wafer so that It is highly reflective, and the depressions on the front and back are reduced by fine polishing. 2. The polishing method according to item 1 of the patent application range, wherein the round step is performed using a double-sided polishing device so that the front and back surfaces are rough polished at the same time to form a roughly symmetrical, concave back surface of the wafer. 3. The polishing method of item 1 in the scope of patent application, wherein the step of entering light is to substantially add the concave front and back planes of the wafer to the parallelism between the front and back sides of the wafer. 4. If the polishing method of the patent application No. 2 is applied, it further polishes the wafer before the light-removing step to remove additional material from the wafer. 5. The polishing method according to item 2 of the patent application scope, wherein the device has a wafer holder for fixing the wafer to be polished, which can be rotated about an axis, and a polishing pad is attached to the wafer holder so that the device can be used with the holder. Upper round platen combined with polishing on the back of the solid circle, and lower platen that can rotate around the center and have a polishing pad attached to it, which can be combined with crystal polishing fixed by the bracket. The rough polishing step further includes operation in Steps made by light: b, at the same time, it is approximately the light of the inner circle, and the front surface of the wafer is substantially rough polished. Sleeve rotation, rounded front and double-sided polished Page 19 Λ26584 6. The scope of the patent application device, so as to maximize the difference in rotation speed between the upper and lower presses. 6. The polishing method according to item 5 of the scope of patent application, wherein the double-side polishing device further includes a device for driving the wafer holder to rotate around a central rotation axis of the wafer holder, and a device for driving the wafer holder around the upper part and The inner and outer driving rings of the orbital movement of the central rotation axis of the lower stage, the rough polishing step further includes: operating a double-side polishing device so as to maximize the difference in the rotation speed between the inner and outer driving rings. 7. The polishing method according to item 2 of the patent application scope, wherein the double-side polishing device has a wafer holder for fixing the wafer to be polished, which can be rotated around the center > .1: the axis is rotated, and the The polishing pad is an upper pressing table which can be combined with the back surface of the wafer fixed by the bracket, and can be rotated around a central rotation axis, and a polishing pad is attached to the polishing pad so that the polishing pad can be connected with the polishing pad. The front side of the wafer 丨 I polishing combined lower stage, the wafer holder has a thickness substantially larger than the desired final thickness of the wafer after rough i I polishing, so that the polishing pad when the wafer thickness is in the i polishing process When it is reduced to the desired final thickness, it is combined with the wafer holder, and further reduction of the thickness toward the periphery of the wafer is suppressed. The polishing pad has sufficient flexibility, so that when the polishing pad is combined with the wafer holder, it is roughly on the wafer. The thickness of the wafer in the center i portion is further reduced, so that the front and back surfaces of the wafer become substantially concave. 8. The polishing method according to item 7 of the patent application scope, wherein the thickness of the wafer carrier | is about 2 micrometers compared to the desired final thickness of the wafer. | Page 20