HK1054616A1 - Vertical electrical interconnections in a stack - Google Patents

Vertical electrical interconnections in a stack

Info

Publication number
HK1054616A1
HK1054616A1 HK03106866A HK03106866A HK1054616A1 HK 1054616 A1 HK1054616 A1 HK 1054616A1 HK 03106866 A HK03106866 A HK 03106866A HK 03106866 A HK03106866 A HK 03106866A HK 1054616 A1 HK1054616 A1 HK 1054616A1
Authority
HK
Hong Kong
Prior art keywords
layers
edge
stack
electrical
substrate
Prior art date
Application number
HK03106866A
Other languages
English (en)
Inventor
Per-Erik Nordal
Hans Gude Gudesen
Geirr I Leistad
Goran Gustafsson
Original Assignee
Thin Film Electronics Asa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics Asa filed Critical Thin Film Electronics Asa
Publication of HK1054616A1 publication Critical patent/HK1054616A1/xx

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    • HELECTRICITY
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    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
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    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
HK03106866A 2000-03-15 2003-09-24 Vertical electrical interconnections in a stack HK1054616A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NO20001360A NO20001360D0 (no) 2000-03-15 2000-03-15 Vertikale elektriske forbindelser i stabel
PCT/NO2001/000113 WO2001069679A1 (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack

Publications (1)

Publication Number Publication Date
HK1054616A1 true HK1054616A1 (en) 2003-12-05

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HK03106866A HK1054616A1 (en) 2000-03-15 2003-09-24 Vertical electrical interconnections in a stack

Country Status (11)

Country Link
US (2) US20030024731A1 (xx)
EP (1) EP1287560A1 (xx)
JP (3) JP2003526945A (xx)
KR (1) KR100488256B1 (xx)
CN (1) CN1214462C (xx)
AU (1) AU775011B2 (xx)
CA (1) CA2403231C (xx)
HK (1) HK1054616A1 (xx)
NO (2) NO20001360D0 (xx)
RU (1) RU2237948C2 (xx)
WO (1) WO2001069679A1 (xx)

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JP3838218B2 (ja) 2003-05-19 2006-10-25 ソニー株式会社 面発光型半導体レーザ素子及びその製造方法
US6959134B2 (en) * 2003-06-30 2005-10-25 Intel Corporation Measuring the position of passively aligned optical components
JP3801160B2 (ja) * 2003-09-11 2006-07-26 セイコーエプソン株式会社 半導体素子、半導体装置、半導体素子の製造方法、半導体装置の製造方法及び電子機器
JP2005093703A (ja) * 2003-09-17 2005-04-07 Seiko Epson Corp タイル状素子用配線形成方法、タイル状素子用配線構造物及び電子機器
JP4206885B2 (ja) 2003-09-26 2009-01-14 ソニー株式会社 半導体装置の製造方法
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