FR2584849B1 - Circuit tampon de sortie a semi-conducteurs a grille isolee par oxyde metallique, pour memoire rapide - Google Patents

Circuit tampon de sortie a semi-conducteurs a grille isolee par oxyde metallique, pour memoire rapide

Info

Publication number
FR2584849B1
FR2584849B1 FR868610227A FR8610227A FR2584849B1 FR 2584849 B1 FR2584849 B1 FR 2584849B1 FR 868610227 A FR868610227 A FR 868610227A FR 8610227 A FR8610227 A FR 8610227A FR 2584849 B1 FR2584849 B1 FR 2584849B1
Authority
FR
France
Prior art keywords
metal oxide
output buffer
buffer circuit
fast memory
semiconductor output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR868610227A
Other languages
English (en)
Other versions
FR2584849A1 (fr
Inventor
Kazuo Watanabe
Yoshinori Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of FR2584849A1 publication Critical patent/FR2584849A1/fr
Application granted granted Critical
Publication of FR2584849B1 publication Critical patent/FR2584849B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H03K17/164—Soft switching using parallel switching arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
FR868610227A 1985-07-12 1986-07-11 Circuit tampon de sortie a semi-conducteurs a grille isolee par oxyde metallique, pour memoire rapide Expired - Lifetime FR2584849B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60153686A JPS6214520A (ja) 1985-07-12 1985-07-12 メモリの出力バツフア回路

Publications (2)

Publication Number Publication Date
FR2584849A1 FR2584849A1 (fr) 1987-01-16
FR2584849B1 true FR2584849B1 (fr) 1992-08-14

Family

ID=15567933

Family Applications (1)

Application Number Title Priority Date Filing Date
FR868610227A Expired - Lifetime FR2584849B1 (fr) 1985-07-12 1986-07-11 Circuit tampon de sortie a semi-conducteurs a grille isolee par oxyde metallique, pour memoire rapide

Country Status (8)

Country Link
US (2) US4774690A (fr)
JP (1) JPS6214520A (fr)
KR (1) KR950007449B1 (fr)
CA (1) CA1259136A (fr)
DE (1) DE3623516C2 (fr)
FR (1) FR2584849B1 (fr)
GB (1) GB2177865B (fr)
NL (1) NL8601835A (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214520A (ja) * 1985-07-12 1987-01-23 Sony Corp メモリの出力バツフア回路
JPS63234622A (ja) * 1987-03-23 1988-09-29 Toshiba Corp デ−タ出力回路
JPS63234623A (ja) * 1987-03-23 1988-09-29 Toshiba Corp 半導体集積回路
KR880013321A (ko) * 1987-04-07 1988-11-30 언윈 엘. 콰텍 집적회로에서의 과도적잡음을 줄이기 위한 방법 및 그 장치
US4791521A (en) * 1987-04-07 1988-12-13 Western Digital Corporation Method and apparatus for reducing transient noise by premagnetization of parasitic inductance
US4777389A (en) * 1987-08-13 1988-10-11 Advanced Micro Devices, Inc. Output buffer circuits for reducing ground bounce noise
JPH01130388A (ja) * 1987-11-16 1989-05-23 Nec Corp 半導体記憶装置
NL8800234A (nl) * 1988-02-01 1989-09-01 Philips Nv Geintegreerde schakeling met logische circuits en ten minste een push-pull-trap.
JPH01279631A (ja) * 1988-05-02 1989-11-09 Toshiba Corp 半導体集積回路の出力回路
US4851720A (en) * 1988-09-02 1989-07-25 Cypress Semiconductor Corporation Low power sense amplifier for programmable logic device
KR910005602B1 (ko) * 1989-06-15 1991-07-31 삼성전자 주식회사 어드레스 변환 검출에 따른 출력버퍼의 프리챠아지 제어방법
US5278803A (en) * 1991-09-11 1994-01-11 Compaq Computer Corporation Memory column address strobe buffer and synchronization and data latch interlock
JP2792795B2 (ja) * 1992-10-29 1998-09-03 三菱電機株式会社 半導体集積装置
KR960007258B1 (ko) * 1993-09-03 1996-05-29 금성일렉트론 주식회사 출력 버퍼
KR970005570B1 (ko) * 1994-07-14 1997-04-17 현대전자산업 주식회사 데이타 출력버퍼
JPH09306183A (ja) * 1996-05-10 1997-11-28 Mitsubishi Electric Corp 半導体記憶装置
KR100301055B1 (ko) * 1999-05-21 2001-09-26 윤종용 전압 레귤레이터를 위한 차아지 보상기
US7286417B2 (en) * 2005-06-21 2007-10-23 Micron Technology, Inc. Low power dissipation voltage generator
WO2012020756A1 (fr) * 2010-08-09 2012-02-16 三洋電機株式会社 Appareil de commande de puissance
KR102647359B1 (ko) 2018-10-16 2024-03-14 엘지전자 주식회사 세탁장치 및 이의 제어방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690483A (en) * 1979-12-19 1981-07-22 Fujitsu Ltd Address buffer circuit
JPS58133038A (ja) * 1982-02-03 1983-08-08 Nec Corp インバ−タ回路
JPS59181829A (ja) * 1983-03-31 1984-10-16 Toshiba Corp 半導体素子の出力バツフア回路
JPS61125222A (ja) * 1984-11-21 1986-06-12 Nec Corp 出力バツフア
JPS6214520A (ja) * 1985-07-12 1987-01-23 Sony Corp メモリの出力バツフア回路

Also Published As

Publication number Publication date
NL8601835A (nl) 1987-02-02
DE3623516A1 (de) 1987-01-22
US4922458A (en) 1990-05-01
FR2584849A1 (fr) 1987-01-16
KR950007449B1 (ko) 1995-07-11
KR870001599A (ko) 1987-03-14
GB2177865B (en) 1990-05-16
GB8616813D0 (en) 1986-08-20
CA1259136A (fr) 1989-09-05
DE3623516C2 (de) 1996-05-09
GB2177865A (en) 1987-01-28
US4774690A (en) 1988-09-27
JPS6214520A (ja) 1987-01-23

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Legal Events

Date Code Title Description
ST Notification of lapse