FR2340599A1 - Memoire a acces aleatoire, dynamique - Google Patents

Memoire a acces aleatoire, dynamique

Info

Publication number
FR2340599A1
FR2340599A1 FR7712611A FR7712611A FR2340599A1 FR 2340599 A1 FR2340599 A1 FR 2340599A1 FR 7712611 A FR7712611 A FR 7712611A FR 7712611 A FR7712611 A FR 7712611A FR 2340599 A1 FR2340599 A1 FR 2340599A1
Authority
FR
France
Prior art keywords
random access
dynamic memory
dynamic
memory
random
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7712611A
Other languages
English (en)
Other versions
FR2340599B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Publication of FR2340599A1 publication Critical patent/FR2340599A1/fr
Application granted granted Critical
Publication of FR2340599B1 publication Critical patent/FR2340599B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
FR7712611A 1975-12-29 1977-04-26 Memoire a acces aleatoire, dynamique Granted FR2340599A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/644,857 US4061999A (en) 1975-12-29 1975-12-29 Dynamic random access memory system

Publications (2)

Publication Number Publication Date
FR2340599A1 true FR2340599A1 (fr) 1977-09-02
FR2340599B1 FR2340599B1 (fr) 1981-10-16

Family

ID=24586622

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7712611A Granted FR2340599A1 (fr) 1975-12-29 1977-04-26 Memoire a acces aleatoire, dynamique

Country Status (6)

Country Link
US (2) US4061999A (fr)
JP (3) JPS5287328A (fr)
DE (1) DE2659248C3 (fr)
FR (1) FR2340599A1 (fr)
GB (4) GB1567148A (fr)
IT (1) IT1073787B (fr)

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2719726A1 (de) * 1976-05-03 1977-11-24 Texas Instruments Inc Speicheranordnung
DE2623219B2 (de) * 1976-05-24 1978-10-12 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Betreiben einer Leseverstärkerschaltung für einen dynamischen MOS-Speicher und Anordnung zur Durchführung dieses Verfahrens
JPS538528A (en) * 1976-07-12 1978-01-26 Nec Corp Memory circuit
SU928405A1 (ru) * 1976-08-05 1982-05-15 Предприятие П/Я Р-6429 Усилитель считывани дл интегрального запоминающего устройства
JPS5384636A (en) * 1976-12-29 1978-07-26 Fujitsu Ltd Sense amplifier circuit
JPS5925311B2 (ja) * 1977-02-14 1984-06-16 日本電気株式会社 感知増幅器
US4144589A (en) * 1977-07-08 1979-03-13 Xerox Corporation Precharged data line driver
JPS5457921A (en) * 1977-10-18 1979-05-10 Fujitsu Ltd Sense amplifier circuit
JPS5472641A (en) * 1977-11-21 1979-06-11 Toshiba Corp Voltage detection circuit
JPS5475942A (en) * 1977-11-29 1979-06-18 Mitsubishi Electric Corp Sense amplifier of drynamic type
JPS6048073B2 (ja) * 1978-01-26 1985-10-25 日本電気株式会社 メモリ回路
JPS5817997B2 (ja) * 1978-03-31 1983-04-11 株式会社日立製作所 メモリシステム
US4239993A (en) * 1978-09-22 1980-12-16 Texas Instruments Incorporated High performance dynamic sense amplifier with active loads
US4533843A (en) * 1978-09-07 1985-08-06 Texas Instruments Incorporated High performance dynamic sense amplifier with voltage boost for row address lines
US4370575A (en) * 1978-09-22 1983-01-25 Texas Instruments Incorporated High performance dynamic sense amplifier with active loads
US4748349A (en) * 1978-09-22 1988-05-31 Texas Instruments Incorporated High performance dynamic sense amplifier with voltage boost for row address lines
US4543500A (en) * 1978-09-22 1985-09-24 Texas Instruments Incorporated High performance dynamic sense amplifier voltage boost for row address lines
JPS5545188A (en) * 1978-09-27 1980-03-29 Nec Corp Dynamic random access memory unit
US4272834A (en) 1978-10-06 1981-06-09 Hitachi, Ltd. Data line potential setting circuit and MIS memory circuit using the same
DE2954688C2 (de) * 1978-10-06 1996-01-04 Hitachi Ltd Halbleiterspeicher
US4274013A (en) * 1979-02-09 1981-06-16 Bell Telephone Laboratories, Incorporated Sense amplifier
JPS55150188A (en) * 1979-05-10 1980-11-21 Nec Corp Memory circuit
US4262342A (en) * 1979-06-28 1981-04-14 Burroughs Corporation Charge restore circuit for semiconductor memories
JPS5931155B2 (ja) * 1979-10-11 1984-07-31 インターナシヨナルビジネス マシーンズ コーポレーシヨン 感知増幅回路
JPS5665396A (en) * 1979-10-31 1981-06-03 Mitsubishi Electric Corp Semiconductor memory circuit
US4305139A (en) * 1979-12-26 1981-12-08 International Business Machines Corporation State detection for storage cells
US4291393A (en) * 1980-02-11 1981-09-22 Mostek Corporation Active refresh circuit for dynamic MOS circuits
US4330851A (en) * 1980-03-21 1982-05-18 Texas Instruments Incorporated Dynamic decoder input for semiconductor memory
US4287576A (en) * 1980-03-26 1981-09-01 International Business Machines Corporation Sense amplifying system for memories with small cells
JPS6045499B2 (ja) * 1980-04-15 1985-10-09 富士通株式会社 半導体記憶装置
US4397003A (en) * 1980-06-02 1983-08-02 Mostek Corporation Dynamic random access memory
DE3028754C2 (de) * 1980-07-29 1982-10-28 Siemens AG, 1000 Berlin und 8000 München Dynamischer Leseverstärker für MOS-Halbleiterspeicher
JPS5755592A (en) * 1980-09-18 1982-04-02 Nec Corp Memory device
JPS57106228A (en) * 1980-12-24 1982-07-02 Fujitsu Ltd Semiconductor circuit
US4413329A (en) * 1980-12-24 1983-11-01 International Business Machines Corporation Dynamic memory cell
JPS5823388A (ja) * 1981-08-05 1983-02-12 Nec Corp メモリ装置
JPS5837896A (ja) * 1981-08-31 1983-03-05 Fujitsu Ltd Ｍｏｓダイナミック回路
JPS5848294A (ja) * 1981-09-16 1983-03-22 Mitsubishi Electric Corp Ｍｏｓダイナミツクメモリ
DE3207498A1 (de) * 1982-03-02 1983-09-08 Siemens AG, 1000 Berlin und 8000 München Integrierter dynamischer schreib-lese-speicher
FR2528613B1 (fr) * 1982-06-09 1991-09-20 Hitachi Ltd Memoire a semi-conducteurs
US4493056A (en) * 1982-06-30 1985-01-08 International Business Machines Corporation RAM Utilizing offset contact regions for increased storage capacitance
JPS5948889A (ja) * 1982-09-10 1984-03-21 Hitachi Ltd Ｍｏｓ記憶装置
US4584672A (en) * 1984-02-22 1986-04-22 Intel Corporation CMOS dynamic random-access memory with active cycle one half power supply potential bit line precharge
JPS6150284A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプ回路の駆動方法
JPS61144795A (ja) * 1984-12-17 1986-07-02 Mitsubishi Electric Corp 半導体記憶装置
US4694205A (en) * 1985-06-03 1987-09-15 Advanced Micro Devices, Inc. Midpoint sense amplification scheme for a CMOS DRAM
JPS61267995A (ja) * 1986-05-09 1986-11-27 Toshiba Corp Ｍｏｓダイナミツクメモリ装置
US4882507B1 (en) * 1987-07-31 1993-03-16 Output circuit of semiconductor integrated circuit device
US5687109A (en) * 1988-05-31 1997-11-11 Micron Technology, Inc. Integrated circuit module having on-chip surge capacitors
JPH0762955B2 (ja) * 1989-05-15 1995-07-05 株式会社東芝 ダイナミック型ランダムアクセスメモリ
JP2614514B2 (ja) * 1989-05-19 1997-05-28 三菱電機株式会社 ダイナミック・ランダム・アクセス・メモリ
US5392241A (en) * 1993-12-10 1995-02-21 International Business Machines Corporation Semiconductor memory circuit with block overwrite
US5982202A (en) * 1998-05-13 1999-11-09 Dallas Semiconductor Corporation Method and apparatus for pre-biasing inputs to a latching portion of a sensing amplifier
CA2277717C (fr) 1999-07-12 2006-12-05 Mosaid Technologies Incorporated Circuit et methode de detection de correspondances multiples dans des memoires adressables par le contenu
US6515896B1 (en) * 2001-07-24 2003-02-04 Hewlett-Packard Company Memory device with short read time
US6535426B2 (en) * 2001-08-02 2003-03-18 Stmicroelectronics, Inc. Sense amplifier circuit and method for nonvolatile memory devices
US8255623B2 (en) * 2007-09-24 2012-08-28 Nvidia Corporation Ordered storage structure providing enhanced access to stored items

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2239736A1 (en) * 1973-08-03 1975-02-28 Nat Semiconductor Corp Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3514765A (en) * 1969-05-23 1970-05-26 Shell Oil Co Sense amplifier comprising cross coupled mosfet's operating in a race mode for single device per bit mosfet memories
US3641511A (en) * 1970-02-06 1972-02-08 Westinghouse Electric Corp Complementary mosfet integrated circuit memory
DE2309192C3 (de) * 1973-02-23 1975-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Regenerierschaltung nach Art eines getasteten Flipflops und Verfahren zum Betrieb einer solchen Regenerierschaltung
US3940678A (en) * 1974-12-31 1976-02-24 Yamatake-Honeywell Company Ltd. Multi-input switching means

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2239736A1 (en) * 1973-08-03 1975-02-28 Nat Semiconductor Corp Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line

Also Published As

Publication number Publication date
JPS55146695A (en) 1980-11-15
GB1567149A (en) 1980-05-14
US4061954A (en) 1977-12-06
US4061999A (en) 1977-12-06
GB1567148A (en) 1980-05-14
JPS6141198Y2 (fr) 1986-11-22
GB1567150A (en) 1980-05-14
DE2659248A1 (de) 1977-07-14
DE2659248C3 (de) 1986-06-19
JPS5540956B2 (fr) 1980-10-21
DE2659248B2 (fr) 1979-01-18
JPS5287328A (en) 1977-07-21
GB1566408A (en) 1980-04-30
JPS5986098U (ja) 1984-06-11
FR2340599B1 (fr) 1981-10-16
IT1073787B (it) 1985-04-17

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CD Change of name or company name
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