FR2239736A1 - Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line - Google Patents

Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line

Info

Publication number
FR2239736A1
FR2239736A1 FR7414565A FR7414565A FR2239736A1 FR 2239736 A1 FR2239736 A1 FR 2239736A1 FR 7414565 A FR7414565 A FR 7414565A FR 7414565 A FR7414565 A FR 7414565A FR 2239736 A1 FR2239736 A1 FR 2239736A1
Authority
FR
France
Prior art keywords
multiple lead
memory circuit
storage
individual transistor
storage cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7414565A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of FR2239736A1 publication Critical patent/FR2239736A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4099—Dummy cell treatment; Reference voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell

Abstract

The memory circuit consists of an arrangement of single transistor storage cells each of which incorporates a storage condenser a single transistor and an addressing device. These are connected to a multiple lead so as to form a line of memory storage. The condenser is used to hold the reference potential representing the data to be stored, its loading and unloading being controlled by the single transistor switched in series with it. The addressing device permits access to the transistor so as to read out the electrical condition of the memory cell. The circuit also incorporates a similar auxiliary memory cell arrangement connected through a separate multiple lead.
FR7414565A 1973-08-03 1974-04-26 Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line Withdrawn FR2239736A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US38548473A 1973-08-03 1973-08-03

Publications (1)

Publication Number Publication Date
FR2239736A1 true FR2239736A1 (en) 1975-02-28

Family

ID=23521563

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7414565A Withdrawn FR2239736A1 (en) 1973-08-03 1974-04-26 Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line

Country Status (3)

Country Link
JP (1) JPS5040246A (en)
DE (1) DE2422136A1 (en)
FR (1) FR2239736A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2340599A1 (en) * 1975-12-29 1977-09-02 Mostek Corp RANDOM ACCESS, DYNAMIC MEMORY
FR2376494A1 (en) * 1976-12-29 1978-07-28 Mostek Corp Random access dynamic memory - has pushpull amplifier for rapid action in triggering digit line potentials and uses transistors as input resistors
FR2468973A1 (en) * 1979-11-01 1981-05-08 Texas Instruments Inc DIFFERENTIAL DETECTION CIRCUIT FOR A SINGLE-POLE OUTPUT MEMORY MATRIX

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128236A (en) * 1975-04-30 1976-11-09 Nec Corp A memory circuit
DE2634089B2 (en) * 1975-08-11 1978-01-05 CIRCUIT ARRANGEMENT FOR DETECTING WEAK SIGNALS
DE2646245A1 (en) * 1975-10-28 1977-05-05 Motorola Inc MEMORY CIRCUIT
JPS5922316B2 (en) * 1976-02-24 1984-05-25 株式会社東芝 dynamic memory device
US4028557A (en) * 1976-05-21 1977-06-07 Bell Telephone Laboratories, Incorporated Dynamic sense-refresh detector amplifier
JPS53134337A (en) * 1977-03-25 1978-11-22 Hitachi Ltd Sense circuit
DE2801255C2 (en) * 1978-01-12 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Evaluation circuit for symmetrically structured semiconductor memories with one-transistor memory elements
US4162416A (en) * 1978-01-16 1979-07-24 Bell Telephone Laboratories, Incorporated Dynamic sense-refresh detector amplifier
US4247791A (en) * 1978-04-03 1981-01-27 Rockwell International Corporation CMOS Memory sense amplifier
LU87431A1 (en) * 1988-06-08 1989-06-14 Siemens Ag BROADBAND SIGNAL DEVICE
LU87566A1 (en) * 1989-03-22 1990-01-08 Siemens Ag BROADBAND SIGNAL DEVICE
FR2650452B1 (en) * 1989-07-27 1991-11-15 Sgs Thomson Microelectronics CROSSING POINT FOR SWITCHING MATRIX

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2340599A1 (en) * 1975-12-29 1977-09-02 Mostek Corp RANDOM ACCESS, DYNAMIC MEMORY
FR2376494A1 (en) * 1976-12-29 1978-07-28 Mostek Corp Random access dynamic memory - has pushpull amplifier for rapid action in triggering digit line potentials and uses transistors as input resistors
FR2468973A1 (en) * 1979-11-01 1981-05-08 Texas Instruments Inc DIFFERENTIAL DETECTION CIRCUIT FOR A SINGLE-POLE OUTPUT MEMORY MATRIX

Also Published As

Publication number Publication date
DE2422136A1 (en) 1975-02-20
JPS5040246A (en) 1975-04-12

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Legal Events

Date Code Title Description
ST Notification of lapse