JPS54153538A - Read write access system to reloadable memory - Google Patents

Read write access system to reloadable memory

Info

Publication number
JPS54153538A
JPS54153538A JP6259978A JP6259978A JPS54153538A JP S54153538 A JPS54153538 A JP S54153538A JP 6259978 A JP6259978 A JP 6259978A JP 6259978 A JP6259978 A JP 6259978A JP S54153538 A JPS54153538 A JP S54153538A
Authority
JP
Japan
Prior art keywords
write access
semiconductor memory
signal
access system
read write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6259978A
Other languages
Japanese (ja)
Other versions
JPS5923038B2 (en
Inventor
Kensaku Wada
Koichi Fujita
Masaharu Kimura
Koichi Yuasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53062599A priority Critical patent/JPS5923038B2/en
Publication of JPS54153538A publication Critical patent/JPS54153538A/en
Publication of JPS5923038B2 publication Critical patent/JPS5923038B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To execute the read access and write access altogether during one instruction cycle, by constituting the reloadable memory with a plurality of semiconductor memory cells which are selected with the word and bit lines. CONSTITUTION:With the signal phi and the word line 2 energized, the information stored in the semiconductor memory cell 1 is outputted to the bit lines 3-1 and 3-2 as low or high level. Further, read accessing is made with the signal phi4, and the result is inputted to the operation processing unit 4 through the driver 14. When the result of operation is obtained, since the signal phi1 is present, the driver 13 is driven with the output of unit to perform write access, causing either of the bit line 3-1 or 3-2 to be at high level. In this case, the word line 2 is energized and it is stored in the semiconductor memory cell 1.
JP53062599A 1978-05-25 1978-05-25 Read/write access method for rewritable memory Expired JPS5923038B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53062599A JPS5923038B2 (en) 1978-05-25 1978-05-25 Read/write access method for rewritable memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53062599A JPS5923038B2 (en) 1978-05-25 1978-05-25 Read/write access method for rewritable memory

Publications (2)

Publication Number Publication Date
JPS54153538A true JPS54153538A (en) 1979-12-03
JPS5923038B2 JPS5923038B2 (en) 1984-05-30

Family

ID=13204944

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53062599A Expired JPS5923038B2 (en) 1978-05-25 1978-05-25 Read/write access method for rewritable memory

Country Status (1)

Country Link
JP (1) JPS5923038B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58176679A (en) * 1982-04-09 1983-10-17 株式会社　写研 Character signal generator
JPH03225452A (en) * 1990-01-18 1991-10-04 Internatl Business Mach Corp <Ibm> Processing for inserting/extracting tag bit for bit encode data processing system and data word

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4871543A (en) * 1971-12-27 1973-09-27

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4871543A (en) * 1971-12-27 1973-09-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58176679A (en) * 1982-04-09 1983-10-17 株式会社　写研 Character signal generator
JPH03225452A (en) * 1990-01-18 1991-10-04 Internatl Business Mach Corp <Ibm> Processing for inserting/extracting tag bit for bit encode data processing system and data word

Also Published As

Publication number Publication date
JPS5923038B2 (en) 1984-05-30

Similar Documents

Publication Publication Date Title
EP0198231A3 (en) Data processor with parallel instruction control and execution
JPS6446162A (en) Vector processor
GB1477236A (en) Computer memory read delay
FR2239736A1 (en) Memory circuit with individual transistor storage cells - is connected with multiple lead to form storage line
JPS56156988A (en) Refresh system for nonvolatile memory
JPS5525860A (en) Memory system
JPS54153538A (en) Read write access system to reloadable memory
JPS5641593A (en) Semiconductor memory unit
JPS5616980A (en) Write-in system of one-bit of memory
JPS57157365A (en) Busy control system of memory controller
JPS57208686A (en) Semiconductor storage device
JPS6462897A (en) Storage device
JPS53107240A (en) Control system of register memory
JPS56159885A (en) Storage device
SU587510A1 (en) Rapid-access storage with information protection
KR970051325A (en) Nonvolatile Semiconductor Memory Device
EP0278391A3 (en) Memory system
JPS6459570A (en) Image data rotation processor
JPS57176464A (en) Data transfer system
FR2309015A1 (en) Associative memory using random access memory units - has auxiliary memory storing words of less bits than main memory
JPS6460190A (en) Semiconductor storage device
JPS5687280A (en) Data processor
JPS6429935A (en) Program execution control system
SU881858A1 (en) Dynamic storage device
JPS57137944A (en) General register advance control system