NL7712820A - Dynamische geheugeninrichting. - Google Patents

Dynamische geheugeninrichting.

Info

Publication number
NL7712820A
NL7712820A NL7712820A NL7712820A NL7712820A NL 7712820 A NL7712820 A NL 7712820A NL 7712820 A NL7712820 A NL 7712820A NL 7712820 A NL7712820 A NL 7712820A NL 7712820 A NL7712820 A NL 7712820A
Authority
NL
Netherlands
Prior art keywords
memory device
dynamic memory
dynamic
memory
Prior art date
Application number
NL7712820A
Other languages
English (en)
Other versions
NL190211C (nl
NL190211B (nl
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7712820A publication Critical patent/NL7712820A/nl
Publication of NL190211B publication Critical patent/NL190211B/nl
Application granted granted Critical
Publication of NL190211C publication Critical patent/NL190211C/nl

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
NLAANVRAGE7712820,A 1976-11-19 1977-11-21 Dynamische halfgeleidergeheugeninrichting. NL190211C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51138341A JPS6041463B2 (ja) 1976-11-19 1976-11-19 ダイナミツク記憶装置

Publications (3)

Publication Number Publication Date
NL7712820A true NL7712820A (nl) 1978-05-23
NL190211B NL190211B (nl) 1993-07-01
NL190211C NL190211C (nl) 1993-12-01

Family

ID=15219642

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7712820,A NL190211C (nl) 1976-11-19 1977-11-21 Dynamische halfgeleidergeheugeninrichting.

Country Status (4)

Country Link
US (2) US4491858A (nl)
JP (1) JPS6041463B2 (nl)
DE (1) DE2751592C2 (nl)
NL (1) NL190211C (nl)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041463B2 (ja) * 1976-11-19 1985-09-17 株式会社日立製作所 ダイナミツク記憶装置
DE2855079A1 (de) * 1978-12-20 1980-07-17 Siemens Ag Halbleiter-speicherschaltung
US4587542A (en) * 1979-10-11 1986-05-06 Texas Instruments Incorporated Guard ring for reducing pattern sensitivity in MOS/LSI dynamic RAM
JPS58194368A (ja) * 1982-05-07 1983-11-12 Mitsubishi Electric Corp 半導体メモリ装置
JPH0658947B2 (ja) * 1984-02-24 1994-08-03 株式会社日立製作所 半導体メモリ装置の製法
JPS60236191A (ja) * 1984-05-08 1985-11-22 Matsushita Electric Ind Co Ltd 半導体記憶装置
US4651183A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation High density one device memory cell arrays
JPH06105766B2 (ja) * 1984-09-26 1994-12-21 株式会社日立マイコンシステム 半導体集積回路装置の製造方法
US4658283A (en) * 1984-07-25 1987-04-14 Hitachi, Ltd. Semiconductor integrated circuit device having a carrier trapping trench arrangement
JPS61142591A (ja) * 1984-12-13 1986-06-30 Toshiba Corp 半導体記憶装置
JPH0789569B2 (ja) * 1986-03-26 1995-09-27 株式会社日立製作所 半導体集積回路装置及びその製造方法
KR950001424B1 (en) * 1986-03-28 1995-02-24 Hitachi Ltd 3-transistor dynamic random access memory
JP2629697B2 (ja) * 1987-03-27 1997-07-09 日本電気株式会社 半導体記憶装置
JP2957388B2 (ja) * 1993-08-03 1999-10-04 日本電気アイシーマイコンシステム株式会社 半導体記憶回路
JPH08147968A (ja) * 1994-09-19 1996-06-07 Mitsubishi Electric Corp ダイナミックメモリ
JPH10223853A (ja) * 1997-02-04 1998-08-21 Mitsubishi Electric Corp 半導体装置
US6678198B2 (en) * 2001-03-16 2004-01-13 Broadcom Corporation Pseudo differential sensing method and apparatus for DRAM cell
US8445946B2 (en) * 2003-12-11 2013-05-21 International Business Machines Corporation Gated diode memory cells
US20110026323A1 (en) 2009-07-30 2011-02-03 International Business Machines Corporation Gated Diode Memory Cells
JP5743045B2 (ja) * 2008-07-16 2015-07-01 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体記憶装置及び半導体記憶装置におけるメモリアクセス方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4044373A (en) * 1967-11-13 1977-08-23 Hitachi, Ltd. IGFET with gate protection diode and antiparasitic isolation means
US3573509A (en) * 1968-09-09 1971-04-06 Texas Instruments Inc Device for reducing bipolar effects in mos integrated circuits
US3798512A (en) * 1970-09-28 1974-03-19 Ibm Fet device with guard ring and fabrication method therefor
US3748187A (en) * 1971-08-03 1973-07-24 Hughes Aircraft Co Self-registered doped layer for preventing field inversion in mis circuits
US3771147A (en) * 1972-12-04 1973-11-06 Bell Telephone Labor Inc Igfet memory system
US3896485A (en) * 1973-12-03 1975-07-22 Fairchild Camera Instr Co Charge-coupled device with overflow protection
US3879640A (en) * 1974-02-11 1975-04-22 Rca Corp Protective diode network for MOS devices
JPS5539073B2 (nl) * 1974-12-25 1980-10-08
US4086662A (en) * 1975-11-07 1978-04-25 Hitachi, Ltd. Memory system with read/write control lines
JPS5279787A (en) * 1975-12-26 1977-07-05 Toshiba Corp Integrated circuit device
JPS5333542A (en) * 1976-09-10 1978-03-29 Hitachi Ltd Signal detection circuit
US4110776A (en) * 1976-09-27 1978-08-29 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
JPS6041463B2 (ja) * 1976-11-19 1985-09-17 株式会社日立製作所 ダイナミツク記憶装置
JPS5363938A (en) * 1976-11-19 1978-06-07 Hitachi Ltd Dynamic memory unit

Also Published As

Publication number Publication date
JPS6041463B2 (ja) 1985-09-17
DE2751592C2 (de) 1983-10-27
NL190211C (nl) 1993-12-01
JPS5363939A (en) 1978-06-07
US4491858A (en) 1985-01-01
NL190211B (nl) 1993-07-01
US4695864A (en) 1987-09-22
DE2751592A1 (de) 1978-05-24

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Legal Events

Date Code Title Description
BC A request for examination has been filed
A85 Still pending on 85-01-01
V4 Discontinued because of reaching the maximum lifetime of a patent

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