ES2236887T3 - Estructura para aumentar la tension maxima de transistores de potencia de carburo de silicio. - Google Patents

Estructura para aumentar la tension maxima de transistores de potencia de carburo de silicio.

Info

Publication number
ES2236887T3
ES2236887T3 ES98904992T ES98904992T ES2236887T3 ES 2236887 T3 ES2236887 T3 ES 2236887T3 ES 98904992 T ES98904992 T ES 98904992T ES 98904992 T ES98904992 T ES 98904992T ES 2236887 T3 ES2236887 T3 ES 2236887T3
Authority
ES
Spain
Prior art keywords
type
layer
region
epitaxial
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES98904992T
Other languages
English (en)
Spanish (es)
Inventor
James Albert Cooper, Jr.
Jian Tan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/795,135 external-priority patent/US6570185B1/en
Priority claimed from US08/797,535 external-priority patent/US6180958B1/en
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of ES2236887T3 publication Critical patent/ES2236887T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107Buried supplementary regions, e.g. buried guard rings 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
ES98904992T 1997-02-07 1998-02-06 Estructura para aumentar la tension maxima de transistores de potencia de carburo de silicio. Expired - Lifetime ES2236887T3 (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US795135 1991-11-20
US08/795,135 US6570185B1 (en) 1997-02-07 1997-02-07 Structure to reduce the on-resistance of power transistors
US08/797,535 US6180958B1 (en) 1997-02-07 1997-02-07 Structure for increasing the maximum voltage of silicon carbide power transistors
US797535 1997-02-07

Publications (1)

Publication Number Publication Date
ES2236887T3 true ES2236887T3 (es) 2005-07-16

Family

ID=27121597

Family Applications (1)

Application Number Title Priority Date Filing Date
ES98904992T Expired - Lifetime ES2236887T3 (es) 1997-02-07 1998-02-06 Estructura para aumentar la tension maxima de transistores de potencia de carburo de silicio.

Country Status (7)

Country Link
EP (1) EP0966763B1 (enExample)
JP (1) JP5054255B2 (enExample)
AT (1) ATE287127T1 (enExample)
AU (1) AU6272798A (enExample)
DE (1) DE69828588T2 (enExample)
ES (1) ES2236887T3 (enExample)
WO (1) WO1998035390A1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3716490B2 (ja) 1996-04-05 2005-11-16 トヨタ自動車株式会社 制動力制御装置
DE69836319T2 (de) 1997-03-06 2007-06-21 Toyota Jidosha Kabushiki Kaisha, Toyota Bremskraftsteuergerät
US6313482B1 (en) 1999-05-17 2001-11-06 North Carolina State University Silicon carbide power devices having trench-based silicon carbide charge coupling regions therein
US6392273B1 (en) * 2000-01-14 2002-05-21 Rockwell Science Center, Llc Trench insulated-gate bipolar transistor with improved safe-operating-area
JP4738562B2 (ja) * 2000-03-15 2011-08-03 三菱電機株式会社 半導体装置の製造方法
JP4865166B2 (ja) * 2001-08-30 2012-02-01 新電元工業株式会社 トランジスタの製造方法、ダイオードの製造方法
SE525574C2 (sv) 2002-08-30 2005-03-15 Okmetic Oyj Lågdopat kiselkarbidsubstrat och användning därav i högspänningskomponenter
JP4564362B2 (ja) * 2004-01-23 2010-10-20 株式会社東芝 半導体装置
GB0417749D0 (en) * 2004-08-10 2004-09-08 Eco Semiconductors Ltd Improved bipolar MOSFET devices and methods for their use
JP4802542B2 (ja) * 2005-04-19 2011-10-26 株式会社デンソー 炭化珪素半導体装置
JP2008016747A (ja) * 2006-07-10 2008-01-24 Fuji Electric Holdings Co Ltd トレンチmos型炭化珪素半導体装置およびその製造方法
JP5444608B2 (ja) 2007-11-07 2014-03-19 富士電機株式会社 半導体装置
JP4640436B2 (ja) * 2008-04-14 2011-03-02 株式会社デンソー 炭化珪素半導体装置の製造方法
DE112011104322T5 (de) * 2010-12-10 2013-10-02 Mitsubishi Electric Corporation Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung
JP6197995B2 (ja) 2013-08-23 2017-09-20 富士電機株式会社 ワイドバンドギャップ絶縁ゲート型半導体装置
WO2016047438A1 (ja) 2014-09-26 2016-03-31 三菱電機株式会社 半導体装置
JP6698697B2 (ja) * 2015-01-27 2020-05-27 アーベーベー・シュバイツ・アーゲー 絶縁ゲートパワー半導体デバイスおよびそのデバイスの製造方法
DE112016002613B4 (de) 2015-06-09 2022-04-28 Mitsubishi Electric Corporation Leistungs-Halbleiterbauelement
US10468487B2 (en) 2015-10-16 2019-11-05 Mitsubishi Electric Corporation Semiconductor device
WO2017138215A1 (ja) 2016-02-09 2017-08-17 三菱電機株式会社 半導体装置
US9728599B1 (en) 2016-05-10 2017-08-08 Fuji Electric Co., Ltd. Semiconductor device
JP6855793B2 (ja) 2016-12-28 2021-04-07 富士電機株式会社 半導体装置
JP7067021B2 (ja) 2017-11-07 2022-05-16 富士電機株式会社 絶縁ゲート型半導体装置及びその製造方法
GB2572442A (en) * 2018-03-29 2019-10-02 Cambridge Entpr Ltd Power semiconductor device with a double gate structure
US20250098208A1 (en) * 2023-09-19 2025-03-20 Ge Aviation Systems Llc Radiation hardened semicondcutor power device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4941026A (en) * 1986-12-05 1990-07-10 General Electric Company Semiconductor devices exhibiting minimum on-resistance
JPH0783118B2 (ja) * 1988-06-08 1995-09-06 三菱電機株式会社 半導体装置およびその製造方法
US5168331A (en) * 1991-01-31 1992-12-01 Siliconix Incorporated Power metal-oxide-semiconductor field effect transistor
JP2682272B2 (ja) * 1991-06-27 1997-11-26 三菱電機株式会社 絶縁ゲート型トランジスタ
US5233215A (en) * 1992-06-08 1993-08-03 North Carolina State University At Raleigh Silicon carbide power MOSFET with floating field ring and floating field plate
JP2883501B2 (ja) * 1992-09-09 1999-04-19 三菱電機株式会社 トレンチ絶縁ゲート型バイポーラトランジスタおよびその製造方法
US5506421A (en) * 1992-11-24 1996-04-09 Cree Research, Inc. Power MOSFET in silicon carbide
US5488236A (en) * 1994-05-26 1996-01-30 North Carolina State University Latch-up resistant bipolar transistor with trench IGFET and buried collector
US5688725A (en) * 1994-12-30 1997-11-18 Siliconix Incorporated Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance

Also Published As

Publication number Publication date
EP0966763A1 (en) 1999-12-29
AU6272798A (en) 1998-08-26
DE69828588D1 (de) 2005-02-17
DE69828588T2 (de) 2006-02-09
JP2001511315A (ja) 2001-08-07
WO1998035390A1 (en) 1998-08-13
EP0966763B1 (en) 2005-01-12
JP5054255B2 (ja) 2012-10-24
ATE287127T1 (de) 2005-01-15

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