DE69738821D1 - Neues verfahren zur zuverlässigen bildung von ultradünnem oxinitrid - Google Patents

Neues verfahren zur zuverlässigen bildung von ultradünnem oxinitrid

Info

Publication number
DE69738821D1
DE69738821D1 DE69738821T DE69738821T DE69738821D1 DE 69738821 D1 DE69738821 D1 DE 69738821D1 DE 69738821 T DE69738821 T DE 69738821T DE 69738821 T DE69738821 T DE 69738821T DE 69738821 D1 DE69738821 D1 DE 69738821D1
Authority
DE
Germany
Prior art keywords
oxinitride
ultra
thin
new process
education
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69738821T
Other languages
English (en)
Inventor
Ming-Yin Hao
Robert B Ogle
Derick Wristers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Spansion LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion LLC filed Critical Spansion LLC
Application granted granted Critical
Publication of DE69738821D1 publication Critical patent/DE69738821D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/518Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE69738821T 1996-09-05 1997-03-25 Neues verfahren zur zuverlässigen bildung von ultradünnem oxinitrid Expired - Lifetime DE69738821D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/708,428 US5939763A (en) 1996-09-05 1996-09-05 Ultrathin oxynitride structure and process for VLSI applications
PCT/US1997/004986 WO1998010464A1 (en) 1996-09-05 1997-03-25 A novel process for reliable ultra-thin oxynitride formation

Publications (1)

Publication Number Publication Date
DE69738821D1 true DE69738821D1 (de) 2008-08-21

Family

ID=24845767

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69738821T Expired - Lifetime DE69738821D1 (de) 1996-09-05 1997-03-25 Neues verfahren zur zuverlässigen bildung von ultradünnem oxinitrid

Country Status (6)

Country Link
US (2) US5939763A (de)
EP (1) EP0928497B1 (de)
JP (2) JP3976282B2 (de)
KR (1) KR100437651B1 (de)
DE (1) DE69738821D1 (de)
WO (1) WO1998010464A1 (de)

Families Citing this family (182)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040249A (en) * 1996-08-12 2000-03-21 Texas Instruments Incorporated Method of improving diffusion barrier properties of gate oxides by applying ions or free radicals of nitrogen in low energy
EP0844668A3 (de) * 1996-11-25 1999-02-03 Matsushita Electronics Corporation MOS-Struktur einer Halbleiteranordnung und Verfahren zur Herstellung
TW367612B (en) * 1996-12-26 1999-08-21 Hitachi Ltd Semiconductor device having nonvolatile memory and method of manufacture thereof
JPH10256539A (ja) * 1997-03-10 1998-09-25 Fujitsu Ltd 半導体装置及びその製造方法
EP0916156B1 (de) * 1997-04-07 2004-06-09 Koninklijke Philips Electronics N.V. Herstellungsverfahren einer halbleitervorrichtung mit flacher grabenisolation
US6051511A (en) * 1997-07-31 2000-04-18 Micron Technology, Inc. Method and apparatus for reducing isolation stress in integrated circuits
US6566281B1 (en) * 1997-10-15 2003-05-20 International Business Machines Corporation Nitrogen-rich barrier layer and structures formed
JPH11204787A (ja) * 1998-01-14 1999-07-30 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6972436B2 (en) * 1998-08-28 2005-12-06 Cree, Inc. High voltage, high temperature capacitor and interconnection structures
US6087236A (en) * 1998-11-24 2000-07-11 Intel Corporation Integrated circuit with multiple gate dielectric structures
US6303047B1 (en) 1999-03-22 2001-10-16 Lsi Logic Corporation Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same
US6524974B1 (en) 1999-03-22 2003-02-25 Lsi Logic Corporation Formation of improved low dielectric constant carbon-containing silicon oxide dielectric material by reaction of carbon-containing silane with oxidizing agent in the presence of one or more reaction retardants
US6204192B1 (en) 1999-03-29 2001-03-20 Lsi Logic Corporation Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures
US6432773B1 (en) * 1999-04-08 2002-08-13 Microchip Technology Incorporated Memory cell having an ONO film with an ONO sidewall and method of fabricating same
US6232658B1 (en) * 1999-06-30 2001-05-15 Lsi Logic Corporation Process to prevent stress cracking of dielectric films on semiconductor wafers
US6433383B1 (en) * 1999-07-20 2002-08-13 Advanced Micro Devices, Inc. Methods and arrangements for forming a single interpoly dielectric layer in a semiconductor device
JP3538081B2 (ja) 1999-08-24 2004-06-14 松下電器産業株式会社 半導体装置の製造方法
US6423628B1 (en) 1999-10-22 2002-07-23 Lsi Logic Corporation Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines
US6756674B1 (en) 1999-10-22 2004-06-29 Lsi Logic Corporation Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same
US6391795B1 (en) 1999-10-22 2002-05-21 Lsi Logic Corporation Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning
US6248628B1 (en) * 1999-10-25 2001-06-19 Advanced Micro Devices Method of fabricating an ONO dielectric by nitridation for MNOS memory cells
US6316354B1 (en) 1999-10-26 2001-11-13 Lsi Logic Corporation Process for removing resist mask of integrated circuit structure which mitigates damage to underlying low dielectric constant silicon oxide dielectric layer
US6150286A (en) * 2000-01-03 2000-11-21 Advanced Micro Devices, Inc. Method of making an ultra thin silicon nitride film
US6784485B1 (en) * 2000-02-11 2004-08-31 International Business Machines Corporation Diffusion barrier layer and semiconductor device containing same
US6670695B1 (en) * 2000-02-29 2003-12-30 United Microelectronics Corp. Method of manufacturing anti-reflection layer
WO2001069673A1 (fr) * 2000-03-13 2001-09-20 Tadahiro Ohmi Dispositif de memoire flash et son procede de fabrication et procede de formation de pellicule dielectrique
US6346490B1 (en) 2000-04-05 2002-02-12 Lsi Logic Corporation Process for treating damaged surfaces of low k carbon doped silicon oxide dielectric material after plasma etching and plasma cleaning steps
US6506678B1 (en) 2000-05-19 2003-01-14 Lsi Logic Corporation Integrated circuit structures having low k porous aluminum oxide dielectric material separating aluminum lines, and method of making same
US6365528B1 (en) 2000-06-07 2002-04-02 Lsi Logic Corporation Low temperature process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric-material characterized by improved resistance to oxidation and good gap-filling capabilities
DE10029286C2 (de) * 2000-06-14 2003-10-02 Infineon Technologies Ag Verfahren zur Überwachung von Stickstoffprozessen
US6346488B1 (en) 2000-06-27 2002-02-12 Lsi Logic Corporation Process to provide enhanced resistance to cracking and to further reduce the dielectric constant of a low dielectric constant dielectric film of an integrated circuit structure by implantation with hydrogen ions
US6350700B1 (en) 2000-06-28 2002-02-26 Lsi Logic Corporation Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure
US6368979B1 (en) 2000-06-28 2002-04-09 Lsi Logic Corporation Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure
US6362085B1 (en) 2000-07-19 2002-03-26 Taiwan Semiconductor Manufacturing Company Method for reducing gate oxide effective thickness and leakage current
US6417082B1 (en) * 2000-08-30 2002-07-09 Advanced Micro Devices, Inc. Semiconductor structure
TW531803B (en) * 2000-08-31 2003-05-11 Agere Syst Guardian Corp Electronic circuit structure with improved dielectric properties
US6489242B1 (en) 2000-09-13 2002-12-03 Lsi Logic Corporation Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
US6492240B1 (en) * 2000-09-14 2002-12-10 United Microelectronics Corp. Method for forming improved high resistance resistor by treating the surface of polysilicon layer
CN100442454C (zh) * 2000-09-19 2008-12-10 马特森技术公司 形成介电薄膜的方法
US6534388B1 (en) * 2000-09-27 2003-03-18 Chartered Semiconductor Manufacturing Ltd. Method to reduce variation in LDD series resistance
US6956238B2 (en) 2000-10-03 2005-10-18 Cree, Inc. Silicon carbide power metal-oxide semiconductor field effect transistors having a shorting channel and methods of fabricating silicon carbide metal-oxide semiconductor field effect transistors having a shorting channel
US6767843B2 (en) 2000-10-03 2004-07-27 Cree, Inc. Method of N2O growth of an oxide layer on a silicon carbide layer
US6610366B2 (en) * 2000-10-03 2003-08-26 Cree, Inc. Method of N2O annealing an oxide layer on a silicon carbide layer
US7067176B2 (en) 2000-10-03 2006-06-27 Cree, Inc. Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment
US6750157B1 (en) * 2000-10-12 2004-06-15 Advanced Micro Devices, Inc. Nonvolatile memory cell with a nitridated oxide layer
US6391768B1 (en) 2000-10-30 2002-05-21 Lsi Logic Corporation Process for CMP removal of excess trench or via filler metal which inhibits formation of concave regions on oxide surface of integrated circuit structure
US6423630B1 (en) 2000-10-31 2002-07-23 Lsi Logic Corporation Process for forming low K dielectric material between metal lines
US6537923B1 (en) 2000-10-31 2003-03-25 Lsi Logic Corporation Process for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal lines
US6420277B1 (en) 2000-11-01 2002-07-16 Lsi Logic Corporation Process for inhibiting crack formation in low dielectric constant dielectric films of integrated circuit structure
US6613695B2 (en) * 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
KR100490293B1 (ko) * 2000-12-08 2005-05-17 주식회사 하이닉스반도체 플래쉬 메모리 소자의 제조 방법
US6649219B2 (en) 2001-02-23 2003-11-18 Lsi Logic Corporation Process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material characterized by improved resistance to oxidation
US6858195B2 (en) 2001-02-23 2005-02-22 Lsi Logic Corporation Process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material
US6572925B2 (en) 2001-02-23 2003-06-03 Lsi Logic Corporation Process for forming a low dielectric constant fluorine and carbon containing silicon oxide dielectric material
US6503840B2 (en) 2001-05-02 2003-01-07 Lsi Logic Corporation Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning
JP4594554B2 (ja) * 2001-05-29 2010-12-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US6559048B1 (en) 2001-05-30 2003-05-06 Lsi Logic Corporation Method of making a sloped sidewall via for integrated circuit structure to suppress via poisoning
US6583026B1 (en) 2001-05-31 2003-06-24 Lsi Logic Corporation Process for forming a low k carbon-doped silicon oxide dielectric material on an integrated circuit structure
US6562700B1 (en) 2001-05-31 2003-05-13 Lsi Logic Corporation Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal
US20020187651A1 (en) * 2001-06-11 2002-12-12 Reid Kimberly G. Method for making a semiconductor device
US6566171B1 (en) 2001-06-12 2003-05-20 Lsi Logic Corporation Fuse construction for integrated circuit structure having low dielectric constant dielectric material
US6930056B1 (en) 2001-06-19 2005-08-16 Lsi Logic Corporation Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure
US6559033B1 (en) 2001-06-27 2003-05-06 Lsi Logic Corporation Processing for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal lines
US6673721B1 (en) * 2001-07-02 2004-01-06 Lsi Logic Corporation Process for removal of photoresist mask used for making vias in low k carbon-doped silicon oxide dielectric material, and for removal of etch residues from formation of vias and removal of photoresist mask
US6642156B2 (en) 2001-08-01 2003-11-04 International Business Machines Corporation Method for forming heavy nitrogen-doped ultra thin oxynitride gate dielectrics
US6723653B1 (en) 2001-08-17 2004-04-20 Lsi Logic Corporation Process for reducing defects in copper-filled vias and/or trenches formed in porous low-k dielectric material
US20030040171A1 (en) * 2001-08-22 2003-02-27 Weimer Ronald A. Method of composite gate formation
US6639228B2 (en) * 2001-08-28 2003-10-28 Promos Technologies Inc. Method for molecular nitrogen implantation dosage monitoring
US6881664B2 (en) * 2001-08-28 2005-04-19 Lsi Logic Corporation Process for planarizing upper surface of damascene wiring structure for integrated circuit structures
US7129128B2 (en) * 2001-08-29 2006-10-31 Micron Technology, Inc. Method of improved high K dielectric-polysilicon interface for CMOS devices
US6960537B2 (en) * 2001-10-02 2005-11-01 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US6613665B1 (en) 2001-10-26 2003-09-02 Lsi Logic Corporation Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surface
US6528423B1 (en) 2001-10-26 2003-03-04 Lsi Logic Corporation Process for forming composite of barrier layers of dielectric material to inhibit migration of copper from copper metal interconnect of integrated circuit structure into adjacent layer of low k dielectric material
DE10207122B4 (de) * 2002-02-20 2007-07-05 Advanced Micro Devices, Inc., Sunnyvale Ein Verfahren zur Herstellung von Schichten aus Oxid auf einer Oberfläche eines Substrats
US6780720B2 (en) 2002-07-01 2004-08-24 International Business Machines Corporation Method for fabricating a nitrided silicon-oxide gate dielectric
US6706644B2 (en) 2002-07-26 2004-03-16 International Business Machines Corporation Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors
US6833556B2 (en) 2002-08-12 2004-12-21 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
US7084423B2 (en) * 2002-08-12 2006-08-01 Acorn Technologies, Inc. Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
US7902029B2 (en) * 2002-08-12 2011-03-08 Acorn Technologies, Inc. Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
US7176483B2 (en) * 2002-08-12 2007-02-13 Acorn Technologies, Inc. Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
US7022378B2 (en) * 2002-08-30 2006-04-04 Cree, Inc. Nitrogen passivation of interface states in SiO2/SiC structures
US20070212850A1 (en) * 2002-09-19 2007-09-13 Applied Materials, Inc. Gap-fill depositions in the formation of silicon containing dielectric materials
US7456116B2 (en) 2002-09-19 2008-11-25 Applied Materials, Inc. Gap-fill depositions in the formation of silicon containing dielectric materials
US7431967B2 (en) * 2002-09-19 2008-10-07 Applied Materials, Inc. Limited thermal budget formation of PMD layers
US7335609B2 (en) * 2004-08-27 2008-02-26 Applied Materials, Inc. Gap-fill depositions introducing hydroxyl-containing precursors in the formation of silicon containing dielectric materials
US7141483B2 (en) * 2002-09-19 2006-11-28 Applied Materials, Inc. Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
US7221010B2 (en) * 2002-12-20 2007-05-22 Cree, Inc. Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors
KR101058882B1 (ko) * 2003-02-04 2011-08-23 어플라이드 머티어리얼스, 인코포레이티드 초-저압에서 암모니아를 이용한 급속 열 어닐링을 통한 실리콘 옥시질화물의 질소 프로파일 테일러링
JP3866667B2 (ja) * 2003-02-26 2007-01-10 株式会社東芝 半導体装置の製造方法
US7429540B2 (en) * 2003-03-07 2008-09-30 Applied Materials, Inc. Silicon oxynitride gate dielectric formation using multiple annealing steps
JP4748927B2 (ja) 2003-03-25 2011-08-17 ローム株式会社 半導体装置
US6979863B2 (en) * 2003-04-24 2005-12-27 Cree, Inc. Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same
US7074643B2 (en) * 2003-04-24 2006-07-11 Cree, Inc. Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same
KR20050004676A (ko) * 2003-07-03 2005-01-12 매그나칩 반도체 유한회사 반도체 소자의 트랜지스터 제조 방법
US7371637B2 (en) * 2003-09-26 2008-05-13 Cypress Semiconductor Corporation Oxide-nitride stack gate dielectric
US7138691B2 (en) * 2004-01-22 2006-11-21 International Business Machines Corporation Selective nitridation of gate oxides
US7528051B2 (en) * 2004-05-14 2009-05-05 Applied Materials, Inc. Method of inducing stresses in the channel region of a transistor
US7642171B2 (en) * 2004-08-04 2010-01-05 Applied Materials, Inc. Multi-step anneal of thin films for film densification and improved gap-fill
US20070212847A1 (en) * 2004-08-04 2007-09-13 Applied Materials, Inc. Multi-step anneal of thin films for film densification and improved gap-fill
JP2006332209A (ja) * 2005-05-24 2006-12-07 Sharp Corp 薄膜トランジスタ基板及びその製造方法
US20070010103A1 (en) * 2005-07-11 2007-01-11 Applied Materials, Inc. Nitric oxide reoxidation for improved gate leakage reduction of sion gate dielectrics
US7727904B2 (en) * 2005-09-16 2010-06-01 Cree, Inc. Methods of forming SiC MOSFETs with high inversion layer mobility
US20070090493A1 (en) * 2005-10-11 2007-04-26 Promos Technologies Inc. Fabrication of nitrogen containing regions on silicon containing regions in integrated circuits, and integrated circuits obtained thereby
US7910494B2 (en) * 2006-03-29 2011-03-22 Tokyo Electron Limited Thermal processing furnace, gas delivery system therefor, and methods for delivering a process gas thereto
US7635655B2 (en) * 2006-03-30 2009-12-22 Tokyo Electron Limited Method for replacing a nitrous oxide based oxidation process with a nitric oxide based oxidation process for substrate processing
JP4974585B2 (ja) * 2006-05-17 2012-07-11 東京エレクトロン株式会社 窒素濃度の測定方法、シリコン酸窒化膜の形成方法および半導体装置の製造方法
WO2007138937A1 (en) * 2006-05-26 2007-12-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7396776B2 (en) 2006-07-10 2008-07-08 International Business Machines Corporation Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)
US7910420B1 (en) * 2006-07-13 2011-03-22 National Semiconductor Corporation System and method for improving CMOS compatible non volatile memory retention reliability
US8432012B2 (en) 2006-08-01 2013-04-30 Cree, Inc. Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same
US7728402B2 (en) 2006-08-01 2010-06-01 Cree, Inc. Semiconductor devices including schottky diodes with controlled breakdown
KR101529331B1 (ko) 2006-08-17 2015-06-16 크리 인코포레이티드 고전력 절연 게이트 바이폴라 트랜지스터
US8835987B2 (en) 2007-02-27 2014-09-16 Cree, Inc. Insulated gate bipolar transistors including current suppressing layers
US7534731B2 (en) * 2007-03-30 2009-05-19 Tokyo Electron Limited Method for growing a thin oxynitride film on a substrate
US20090035463A1 (en) * 2007-08-03 2009-02-05 Tokyo Electron Limited Thermal processing system and method for forming an oxide layer on substrates
JP5176428B2 (ja) * 2007-08-20 2013-04-03 富士通セミコンダクター株式会社 酸窒化処理装置及び方法、並びに半導体装置の製造方法
US20090061608A1 (en) * 2007-08-29 2009-03-05 Merchant Tushar P Method of forming a semiconductor device having a silicon dioxide layer
US7659214B2 (en) * 2007-09-30 2010-02-09 Tokyo Electron Limited Method for growing an oxynitride film on a substrate
KR100933835B1 (ko) * 2007-11-12 2009-12-24 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법
JP5119904B2 (ja) * 2007-12-20 2013-01-16 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5679622B2 (ja) * 2008-01-31 2015-03-04 株式会社東芝 絶縁膜、およびこれを用いた半導体装置
US7638442B2 (en) * 2008-05-09 2009-12-29 Promos Technologies, Inc. Method of forming a silicon nitride layer on a gate oxide film of a semiconductor device and annealing the nitride layer
US8232558B2 (en) 2008-05-21 2012-07-31 Cree, Inc. Junction barrier Schottky diodes with current surge capability
US8557702B2 (en) * 2009-02-02 2013-10-15 Asm America, Inc. Plasma-enhanced atomic layers deposition of conductive material over dielectric layers
US8288220B2 (en) 2009-03-27 2012-10-16 Cree, Inc. Methods of forming semiconductor devices including epitaxial layers and related structures
US8501610B2 (en) * 2009-04-28 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memories and methods of fabrication thereof
US8294507B2 (en) 2009-05-08 2012-10-23 Cree, Inc. Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits
US8193848B2 (en) 2009-06-02 2012-06-05 Cree, Inc. Power switching devices having controllable surge current capabilities
US8629509B2 (en) 2009-06-02 2014-01-14 Cree, Inc. High voltage insulated gate bipolar transistors with minority carrier diverter
US8541787B2 (en) 2009-07-15 2013-09-24 Cree, Inc. High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability
US8354690B2 (en) 2009-08-31 2013-01-15 Cree, Inc. Solid-state pinch off thyristor circuits
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US8415671B2 (en) 2010-04-16 2013-04-09 Cree, Inc. Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices
US8564063B2 (en) 2010-12-07 2013-10-22 United Microelectronics Corp. Semiconductor device having metal gate and manufacturing method thereof
US8263501B2 (en) 2010-12-15 2012-09-11 United Microelectronics Corp. Silicon dioxide film fabricating process
US8643101B2 (en) 2011-04-20 2014-02-04 United Microelectronics Corp. High voltage metal oxide semiconductor device having a multi-segment isolation structure
US9029945B2 (en) 2011-05-06 2015-05-12 Cree, Inc. Field effect transistor devices with low source resistance
US9142662B2 (en) 2011-05-06 2015-09-22 Cree, Inc. Field effect transistor devices with low source resistance
US8581338B2 (en) 2011-05-12 2013-11-12 United Microelectronics Corp. Lateral-diffused metal oxide semiconductor device (LDMOS) and fabrication method thereof
US8501603B2 (en) 2011-06-15 2013-08-06 United Microelectronics Corp. Method for fabricating high voltage transistor
US8592905B2 (en) 2011-06-26 2013-11-26 United Microelectronics Corp. High-voltage semiconductor device
US8394688B2 (en) 2011-06-27 2013-03-12 United Microelectronics Corp. Process for forming repair layer and MOS transistor having repair layer
US9984894B2 (en) 2011-08-03 2018-05-29 Cree, Inc. Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions
US20130043513A1 (en) 2011-08-19 2013-02-21 United Microelectronics Corporation Shallow trench isolation structure and fabricating method thereof
US8729599B2 (en) 2011-08-22 2014-05-20 United Microelectronics Corp. Semiconductor device
US8921937B2 (en) 2011-08-24 2014-12-30 United Microelectronics Corp. High voltage metal-oxide-semiconductor transistor device and method of fabricating the same
US9373617B2 (en) 2011-09-11 2016-06-21 Cree, Inc. High current, low switching loss SiC power module
US8680587B2 (en) 2011-09-11 2014-03-25 Cree, Inc. Schottky diode
WO2013036370A1 (en) 2011-09-11 2013-03-14 Cree, Inc. High current density power module comprising transistors with improved layout
US8618582B2 (en) 2011-09-11 2013-12-31 Cree, Inc. Edge termination structure employing recesses for edge termination elements
US8664665B2 (en) 2011-09-11 2014-03-04 Cree, Inc. Schottky diode employing recesses for elements of junction barrier array
US9640617B2 (en) 2011-09-11 2017-05-02 Cree, Inc. High performance power module
US8741784B2 (en) 2011-09-20 2014-06-03 United Microelectronics Corp. Process for fabricating semiconductor device and method of fabricating metal oxide semiconductor device
US8742498B2 (en) 2011-11-03 2014-06-03 United Microelectronics Corp. High voltage semiconductor device and fabricating method thereof
US8482063B2 (en) 2011-11-18 2013-07-09 United Microelectronics Corporation High voltage semiconductor device
US8587058B2 (en) 2012-01-02 2013-11-19 United Microelectronics Corp. Lateral diffused metal-oxide-semiconductor device
US8492835B1 (en) 2012-01-20 2013-07-23 United Microelectronics Corporation High voltage MOSFET device
US9093296B2 (en) 2012-02-09 2015-07-28 United Microelectronics Corp. LDMOS transistor having trench structures extending to a buried layer
TWI523196B (zh) 2012-02-24 2016-02-21 聯華電子股份有限公司 高壓金氧半導體電晶體元件及其佈局圖案
US8890144B2 (en) 2012-03-08 2014-11-18 United Microelectronics Corp. High voltage semiconductor device
US9236471B2 (en) 2012-04-24 2016-01-12 United Microelectronics Corp. Semiconductor structure and method for manufacturing the same
US9159791B2 (en) 2012-06-06 2015-10-13 United Microelectronics Corp. Semiconductor device comprising a conductive region
US8836067B2 (en) 2012-06-18 2014-09-16 United Microelectronics Corp. Transistor device and manufacturing method thereof
US8674441B2 (en) 2012-07-09 2014-03-18 United Microelectronics Corp. High voltage metal-oxide-semiconductor transistor device
US8643104B1 (en) 2012-08-14 2014-02-04 United Microelectronics Corp. Lateral diffusion metal oxide semiconductor transistor structure
US8729631B2 (en) 2012-08-28 2014-05-20 United Microelectronics Corp. MOS transistor
US8829611B2 (en) 2012-09-28 2014-09-09 United Microelectronics Corp. High voltage metal-oxide-semiconductor transistor device
US9196717B2 (en) 2012-09-28 2015-11-24 United Microelectronics Corp. High voltage metal-oxide-semiconductor transistor device
US8704304B1 (en) 2012-10-05 2014-04-22 United Microelectronics Corp. Semiconductor structure
US20140110777A1 (en) 2012-10-18 2014-04-24 United Microelectronics Corp. Trench gate metal oxide semiconductor field effect transistor and fabricating method thereof
US9224857B2 (en) 2012-11-12 2015-12-29 United Microelectronics Corp. Semiconductor structure and method for manufacturing the same
US9634083B2 (en) 2012-12-10 2017-04-25 United Microelectronics Corp. Semiconductor structure and process thereof
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US9330901B2 (en) 2013-03-01 2016-05-03 Taiwan Semiconductor Manufacturing Company, Ltd. Nitrogen-containing oxide film and method of forming the same
US9035425B2 (en) 2013-05-02 2015-05-19 United Microelectronics Corp. Semiconductor integrated circuit
US8896057B1 (en) 2013-05-14 2014-11-25 United Microelectronics Corp. Semiconductor structure and method for manufacturing the same
US8786362B1 (en) 2013-06-04 2014-07-22 United Microelectronics Corporation Schottky diode having current leakage protection structure and current leakage protecting method of the same
US8941175B2 (en) 2013-06-17 2015-01-27 United Microelectronics Corp. Power array with staggered arrangement for improving on-resistance and safe operating area
US9136375B2 (en) 2013-11-21 2015-09-15 United Microelectronics Corp. Semiconductor structure
US9490360B2 (en) 2014-02-19 2016-11-08 United Microelectronics Corp. Semiconductor device and operating method thereof
US9620611B1 (en) 2016-06-17 2017-04-11 Acorn Technology, Inc. MIS contact structure with metal oxide conductor
US10170627B2 (en) 2016-11-18 2019-01-01 Acorn Technologies, Inc. Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2967538D1 (en) * 1978-06-14 1985-12-05 Fujitsu Ltd Process for producing a semiconductor device having an insulating layer of silicon dioxide covered by a film of silicon oxynitride
JPS63184340A (ja) * 1986-09-08 1988-07-29 Nec Corp 半導体装置
US5254506A (en) * 1988-12-20 1993-10-19 Matsushita Electric Industrial Co., Ltd. Method for the production of silicon oxynitride film where the nitrogen concentration at the wafer-oxynitride interface is 8 atomic precent or less
JP2652108B2 (ja) * 1991-09-05 1997-09-10 三菱電機株式会社 電界効果トランジスタおよびその製造方法
US5250456A (en) * 1991-09-13 1993-10-05 Sgs-Thomson Microelectronics, Inc. Method of forming an integrated circuit capacitor dielectric and a capacitor formed thereby
EP0617461B1 (de) * 1993-03-24 1997-09-10 AT&T Corp. Verfahren zur Bildung dielektrischer Oxynitridschichten bei der Herstellung integrierter Schaltungen
US5407870A (en) * 1993-06-07 1995-04-18 Motorola Inc. Process for fabricating a semiconductor device having a high reliability dielectric material
JP3236706B2 (ja) * 1993-07-30 2001-12-10 三菱電機株式会社 不揮発性半導体記憶装置およびその製造方法
US5596218A (en) * 1993-10-18 1997-01-21 Digital Equipment Corporation Hot carrier-hard gate oxides by nitrogen implantation before gate oxidation
US5397720A (en) * 1994-01-07 1995-03-14 The Regents Of The University Of Texas System Method of making MOS transistor having improved oxynitride dielectric
JPH07335876A (ja) * 1994-06-10 1995-12-22 Sony Corp ゲート絶縁膜の形成方法
US5508532A (en) * 1994-06-16 1996-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with braded silicon nitride
US5674788A (en) * 1995-06-06 1997-10-07 Advanced Micro Devices, Inc. Method of forming high pressure silicon oxynitride gate dielectrics
US5650344A (en) * 1995-07-17 1997-07-22 Harris Corporation Method of making non-uniformly nitrided gate oxide
US5940736A (en) * 1997-03-11 1999-08-17 Lucent Technologies Inc. Method for forming a high quality ultrathin gate oxide layer
TW346666B (en) * 1997-10-29 1998-12-01 United Microelectronics Corp Process for producing dielectric layer in an integrated circuit

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US6245689B1 (en) 2001-06-12
WO1998010464A1 (en) 1998-03-12
JP3976282B2 (ja) 2007-09-12
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US5939763A (en) 1999-08-17
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