JPH1040685A
(ja)
*
|
1996-07-23 |
1998-02-13 |
Mitsubishi Electric Corp |
同期型記憶装置および同期型記憶装置におけるデータ読み出し方法
|
US5717633A
(en)
*
|
1997-02-11 |
1998-02-10 |
Artisan Components, Inc. |
Low power consuming memory sense amplifying circuitry
|
US6034908A
(en)
*
|
1997-02-11 |
2000-03-07 |
Artisan Components, Inc. |
Sense amplifying methods and sense amplification integrated devices
|
US5886929A
(en)
*
|
1997-04-21 |
1999-03-23 |
Artisan Components, Inc. |
High speed addressing buffer and methods for implementing same
|
US5889715A
(en)
*
|
1997-04-23 |
1999-03-30 |
Artisan Components, Inc. |
Voltage sense amplifier and methods for implementing the same
|
KR100422813B1
(ko)
*
|
1997-06-30 |
2004-05-24 |
주식회사 하이닉스반도체 |
반도체 메모리 소자의 입력버퍼
|
US5943252A
(en)
*
|
1997-09-04 |
1999-08-24 |
Northern Telecom Limited |
Content addressable memory
|
US5881008A
(en)
*
|
1997-09-12 |
1999-03-09 |
Artisan Components, Inc. |
Self adjusting pre-charge delay in memory circuits and methods for making the same
|
US5883854A
(en)
*
|
1997-09-12 |
1999-03-16 |
Artisan Components, Inc. |
Distributed balanced address detection and clock buffer circuitry and methods for making the same
|
US5965925A
(en)
*
|
1997-10-22 |
1999-10-12 |
Artisan Components, Inc. |
Integrated circuit layout methods and layout structures
|
US5999482A
(en)
*
|
1997-10-24 |
1999-12-07 |
Artisan Components, Inc. |
High speed memory self-timing circuitry and methods for implementing the same
|
US6066965A
(en)
*
|
1997-12-11 |
2000-05-23 |
Evsx, Inc. |
Method and apparatus for a N-nary logic circuit using 1 of 4 signals
|
US6069497A
(en)
|
1997-12-11 |
2000-05-30 |
Evsx, Inc. |
Method and apparatus for a N-nary logic circuit using 1 of N signals
|
US6118716A
(en)
*
|
1997-12-11 |
2000-09-12 |
Evsx, Inc. |
Method and apparatus for an address triggered RAM circuit
|
US6069836A
(en)
*
|
1997-12-11 |
2000-05-30 |
Evsx, Inc. |
Method and apparatus for a RAM circuit having N-nary word line generation
|
US6044024A
(en)
*
|
1998-01-14 |
2000-03-28 |
International Business Machines Corporation |
Interactive method for self-adjusted access on embedded DRAM memory macros
|
FR2774209B1
(fr)
*
|
1998-01-23 |
2001-09-14 |
St Microelectronics Sa |
Procede de controle du circuit de lecture d'un plan memoire et dispositif de memoire correspondant
|
US6016390A
(en)
|
1998-01-29 |
2000-01-18 |
Artisan Components, Inc. |
Method and apparatus for eliminating bitline voltage offsets in memory devices
|
US6167541A
(en)
*
|
1998-03-24 |
2000-12-26 |
Micron Technology, Inc. |
Method for detecting or preparing intercell defects in more than one array of a memory device
|
US6087858A
(en)
*
|
1998-06-24 |
2000-07-11 |
Cypress Semiconductor Corp. |
Self-timed sense amplifier evaluation scheme
|
US5978280A
(en)
*
|
1998-06-25 |
1999-11-02 |
Cypress Semiconductor Corp. |
Method, architecture and circuit for reducing and/or eliminating small signal voltage swing sensitivity
|
US6122203A
(en)
*
|
1998-06-29 |
2000-09-19 |
Cypress Semiconductor Corp. |
Method, architecture and circuit for writing to and reading from a memory during a single cycle
|
US5986970A
(en)
*
|
1998-06-29 |
1999-11-16 |
Cypress Semiconductor Corp. |
Method, architecture and circuit for writing to a memory
|
IT1301879B1
(it)
*
|
1998-07-30 |
2000-07-07 |
St Microelectronics Srl |
Circuiteria a generatore di impulsi per temporizzare un dispositivodi memoria a basso consumo
|
US5946255A
(en)
*
|
1998-07-31 |
1999-08-31 |
Cypress Semiconductor Corp. |
Wordline synchronized reference voltage generator
|
US6201757B1
(en)
|
1998-08-20 |
2001-03-13 |
Texas Instruments Incorporated |
Self-timed memory reset circuitry
|
US6034917A
(en)
*
|
1998-10-30 |
2000-03-07 |
Stmicroelectronics, Inc. |
Control circuit for terminating a memory access cycle in a memory block of an electronic storage device
|
EP1122739A3
(de)
|
2000-01-31 |
2003-12-17 |
STMicroelectronics S.r.l. |
Beschleunigte Ubertragungserzeugung
|
EP1122735B1
(de)
|
2000-01-31 |
2010-09-01 |
STMicroelectronics Srl |
Verschachtelter Datenpfad und Ausgabesteuerungsarchitektur für einen verschachtelten Speicher sowie Impulsgeber zum Ausgeben von gelesenen Daten
|
EP1122887A1
(de)
|
2000-01-31 |
2001-08-08 |
STMicroelectronics S.r.l. |
Vorladeschaltung für einen Ausgangspuffer
|
US6624679B2
(en)
|
2000-01-31 |
2003-09-23 |
Stmicroelectronics S.R.L. |
Stabilized delay circuit
|
EP1122733A1
(de)
|
2000-01-31 |
2001-08-08 |
STMicroelectronics S.r.l. |
Interne Regeneration eines Adressfreigabesignals (ALE) von einem Steuerprotokoll eines verschachtelten Burst-Speichers sowie entsprechende Schaltung
|
US6452864B1
(en)
|
2000-01-31 |
2002-09-17 |
Stmicroelectonics S.R.L. |
Interleaved memory device for sequential access synchronous reading with simplified address counters
|
EP1122736B1
(de)
|
2000-01-31 |
2009-10-28 |
STMicroelectronics S.r.l. |
Erzeugung eines Addressenübergangssignals (ATD) für eine synchrone Speicheranordnung
|
EP1122737A1
(de)
|
2000-01-31 |
2001-08-08 |
STMicroelectronics S.r.l. |
Schaltung zur Steuerung von Datenströmenübertragung aus mehrerer Quellen eines Systems
|
DE60019081D1
(de)
*
|
2000-01-31 |
2005-05-04 |
St Microelectronics Srl |
Verschachtelter Burst-Speicher mit Burst-Zugriff bei synchronen Lesezyklen, wobei die beiden untergeordneten Speicherfelder unabhängig lesbar sind mit wahlfreiem Zugriff während asynchroner Lesezyklen
|
EP1130517B1
(de)
|
2000-03-02 |
2004-05-26 |
STMicroelectronics S.r.l. |
Redundanzarchitektur bei einem verschachtelten Speicher
|
US6181626B1
(en)
|
2000-04-03 |
2001-01-30 |
Lsi Logic Corporation |
Self-timing circuit for semiconductor memory devices
|
JP3653449B2
(ja)
*
|
2000-06-15 |
2005-05-25 |
シャープ株式会社 |
不揮発性半導体記憶装置
|
JP4894095B2
(ja)
*
|
2001-06-15 |
2012-03-07 |
富士通セミコンダクター株式会社 |
半導体記憶装置
|
JP4339532B2
(ja)
|
2001-07-25 |
2009-10-07 |
富士通マイクロエレクトロニクス株式会社 |
セルフタイミング回路を有するスタティックメモリ
|
US6434074B1
(en)
*
|
2001-09-04 |
2002-08-13 |
Lsi Logic Corporation |
Sense amplifier imbalance compensation for memory self-timed circuits
|
KR100454259B1
(ko)
|
2001-11-02 |
2004-10-26 |
주식회사 하이닉스반도체 |
모니터링회로를 가지는 반도체메모리장치
|
US6885595B2
(en)
*
|
2002-09-12 |
2005-04-26 |
Matsushita Electric Industrial Co., Ltd. |
Memory device
|
JP2004164772A
(ja)
*
|
2002-11-14 |
2004-06-10 |
Matsushita Electric Ind Co Ltd |
半導体記憶装置
|
US6940770B2
(en)
*
|
2003-01-21 |
2005-09-06 |
Hewlett-Packard Development Company, L.P. |
Method for precharging word and bit lines for selecting memory cells within a memory array
|
US7464282B1
(en)
|
2003-09-03 |
2008-12-09 |
T-Ram Semiconductor, Inc. |
Apparatus and method for producing dummy data and output clock generator using same
|
US7089439B1
(en)
|
2003-09-03 |
2006-08-08 |
T-Ram, Inc. |
Architecture and method for output clock generation on a high speed memory device
|
US6891774B1
(en)
|
2003-09-03 |
2005-05-10 |
T-Ram, Inc. |
Delay line and output clock generator using same
|
US6947349B1
(en)
|
2003-09-03 |
2005-09-20 |
T-Ram, Inc. |
Apparatus and method for producing an output clock pulse and output clock generator using same
|
WO2005052944A1
(ja)
*
|
2003-11-28 |
2005-06-09 |
Fujitsu Limited |
セルフタイミング回路を有する半導体メモリ
|
JP4598420B2
(ja)
*
|
2004-03-18 |
2010-12-15 |
富士通セミコンダクター株式会社 |
半導体記憶装置、及びタイミング制御方法
|
EP1630815B1
(de)
*
|
2004-08-24 |
2011-10-05 |
Infineon Technologies AG |
Speicherschaltung mit spannungsversorgungsnachgebiegkeit und einer an spannunasversorgung angepassten leistung
|
KR100541370B1
(ko)
*
|
2004-09-06 |
2006-01-10 |
주식회사 하이닉스반도체 |
반도체메모리소자
|
JP4836162B2
(ja)
*
|
2004-11-26 |
2011-12-14 |
株式会社リコー |
半導体集積回路
|
JP2006164399A
(ja)
*
|
2004-12-07 |
2006-06-22 |
Matsushita Electric Ind Co Ltd |
半導体記憶装置
|
US7221607B1
(en)
*
|
2005-02-09 |
2007-05-22 |
Lattice Semiconductor Corporation |
Multi-port memory systems and methods for bit line coupling
|
US7693002B2
(en)
*
|
2006-10-10 |
2010-04-06 |
Qualcomm Incorporated |
Dynamic word line drivers and decoders for memory arrays
|
US7755964B2
(en)
*
|
2006-10-25 |
2010-07-13 |
Qualcomm Incorporated |
Memory device with configurable delay tracking
|
US7646658B2
(en)
*
|
2007-05-31 |
2010-01-12 |
Qualcomm Incorporated |
Memory device with delay tracking for improved timing margin
|
US7746717B1
(en)
|
2007-09-07 |
2010-06-29 |
Xilinx, Inc. |
Desensitizing static random access memory (SRAM) to process variation
|
US20090109772A1
(en)
*
|
2007-10-24 |
2009-04-30 |
Esin Terzioglu |
Ram with independent local clock
|
US7859920B2
(en)
*
|
2008-03-14 |
2010-12-28 |
Qualcomm Incorporated |
Advanced bit line tracking in high performance memory compilers
|
US7864625B2
(en)
*
|
2008-10-02 |
2011-01-04 |
International Business Machines Corporation |
Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator
|
US8082401B2
(en)
*
|
2009-03-25 |
2011-12-20 |
Qualcomm Incorporated |
Self-timing for a multi-ported memory system
|
JP5452348B2
(ja)
*
|
2009-07-27 |
2014-03-26 |
ルネサスエレクトロニクス株式会社 |
半導体記憶装置
|
US8279659B2
(en)
*
|
2009-11-12 |
2012-10-02 |
Qualcomm Incorporated |
System and method of operating a memory device
|
CN102682827B
(zh)
*
|
2011-03-14 |
2015-03-04 |
复旦大学 |
Dram的读出放大器的控制电路及包括其的dram
|
JP5677205B2
(ja)
*
|
2011-06-13 |
2015-02-25 |
ルネサスエレクトロニクス株式会社 |
半導体記憶装置
|
CN103123806B
(zh)
*
|
2011-11-20 |
2016-08-03 |
复旦大学 |
Dram的列选择信号的控制电路及包括其的存取存储器
|
US8848414B2
(en)
|
2012-10-22 |
2014-09-30 |
International Business Machines Corporation |
Memory system incorporating a circuit to generate a delay signal and an associated method of operating a memory system
|
US9281032B2
(en)
|
2014-04-10 |
2016-03-08 |
Infineon Technologies Ag |
Memory timing circuit
|
KR102491136B1
(ko)
*
|
2015-12-18 |
2023-01-25 |
에스케이하이닉스 주식회사 |
수신 장치, 이를 이용하는 반도체 장치 및 시스템
|
US9852024B2
(en)
*
|
2016-04-19 |
2017-12-26 |
Winbond Electronics Corporation |
Apparatus and method for read time control in ECC-enabled flash memory
|
FR3061798B1
(fr)
*
|
2017-01-10 |
2019-08-02 |
Dolphin Integration |
Circuit de commande d'une ligne d'une matrice memoire
|
US10283191B1
(en)
*
|
2018-03-09 |
2019-05-07 |
Stmicroelectronics International N.V. |
Method and circuit for adaptive read-write operation in self-timed memory
|
US10825489B2
(en)
*
|
2018-08-29 |
2020-11-03 |
Texas Instruments Incorporated |
Latching sense amplifier
|
US11170830B2
(en)
*
|
2020-02-11 |
2021-11-09 |
Taiwan Semiconductor Manufacturing Company Limited |
Word line driver for low voltage operation
|