DE69324074T2 - Verfahren zur Bildung von Kurzschlussgebieten für Halbleiterbauelemente mit isoliertem Gatter - Google Patents

Verfahren zur Bildung von Kurzschlussgebieten für Halbleiterbauelemente mit isoliertem Gatter

Info

Publication number
DE69324074T2
DE69324074T2 DE69324074T DE69324074T DE69324074T2 DE 69324074 T2 DE69324074 T2 DE 69324074T2 DE 69324074 T DE69324074 T DE 69324074T DE 69324074 T DE69324074 T DE 69324074T DE 69324074 T2 DE69324074 T2 DE 69324074T2
Authority
DE
Germany
Prior art keywords
insulated gate
semiconductor components
circuit areas
forming short
short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69324074T
Other languages
English (en)
Other versions
DE69324074D1 (de
Inventor
Tetsujiro Tsunoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69324074D1 publication Critical patent/DE69324074D1/de
Publication of DE69324074T2 publication Critical patent/DE69324074T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66363—Thyristors
    • H01L29/66371—Thyristors structurally associated with another device, e.g. built-in diode
    • H01L29/66378—Thyristors structurally associated with another device, e.g. built-in diode the other device being a controlling field-effect device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/126—Power FETs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thyristors (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
DE69324074T 1992-06-12 1993-06-11 Verfahren zur Bildung von Kurzschlussgebieten für Halbleiterbauelemente mit isoliertem Gatter Expired - Lifetime DE69324074T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4153462A JPH05347413A (ja) 1992-06-12 1992-06-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69324074D1 DE69324074D1 (de) 1999-04-29
DE69324074T2 true DE69324074T2 (de) 1999-08-12

Family

ID=15563094

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69324074T Expired - Lifetime DE69324074T2 (de) 1992-06-12 1993-06-11 Verfahren zur Bildung von Kurzschlussgebieten für Halbleiterbauelemente mit isoliertem Gatter

Country Status (5)

Country Link
US (1) US5286655A (de)
EP (1) EP0578973B1 (de)
JP (1) JPH05347413A (de)
KR (1) KR0161356B1 (de)
DE (1) DE69324074T2 (de)

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US5466951A (en) * 1993-12-08 1995-11-14 Siemens Aktiengesellschaft Controllable power semiconductor element with buffer zone and method for the manufacture thereof
JP3481287B2 (ja) * 1994-02-24 2003-12-22 三菱電機株式会社 半導体装置の製造方法
US5935867A (en) * 1995-06-07 1999-08-10 Advanced Micro Devices, Inc. Shallow drain extension formation by angled implantation
US5698454A (en) * 1995-07-31 1997-12-16 Ixys Corporation Method of making a reverse blocking IGBT
US20040061170A1 (en) * 1995-07-31 2004-04-01 Ixys Corporation Reverse blocking IGBT
US6727527B1 (en) 1995-07-31 2004-04-27 Ixys Corporation Reverse blocking IGBT
JPH09181092A (ja) * 1995-12-27 1997-07-11 Toshiba Corp 半導体装置およびその製造方法
DE19829614B4 (de) * 1998-07-02 2004-09-23 Semikron Elektronik Gmbh Verfahren zur Herstellung eines Leistungshalbleiterbauelementes
US6291856B1 (en) 1998-11-12 2001-09-18 Fuji Electric Co., Ltd. Semiconductor device with alternating conductivity type layer and method of manufacturing the same
JP4447065B2 (ja) 1999-01-11 2010-04-07 富士電機システムズ株式会社 超接合半導体素子の製造方法
JP2001119022A (ja) * 1999-10-20 2001-04-27 Fuji Electric Co Ltd 半導体装置及びその製造方法
JP2001210823A (ja) * 2000-01-21 2001-08-03 Denso Corp 半導体装置
JP4765012B2 (ja) * 2000-02-09 2011-09-07 富士電機株式会社 半導体装置及びその製造方法
US6482681B1 (en) * 2000-05-05 2002-11-19 International Rectifier Corporation Hydrogen implant for buffer zone of punch-through non epi IGBT
US8314002B2 (en) * 2000-05-05 2012-11-20 International Rectifier Corporation Semiconductor device having increased switching speed
US6936908B2 (en) * 2001-05-03 2005-08-30 Ixys Corporation Forward and reverse blocking devices
JP2005057235A (ja) * 2003-07-24 2005-03-03 Mitsubishi Electric Corp 絶縁ゲート型バイポーラトランジスタ及びその製造方法、並びに、インバータ回路
JP4746927B2 (ja) * 2005-07-01 2011-08-10 新電元工業株式会社 半導体装置の製造方法
CN102318071B (zh) * 2008-12-15 2015-08-19 Abb技术有限公司 双极穿通半导体器件和制造这种半导体器件的方法
CN101494239B (zh) * 2009-02-27 2010-12-01 电子科技大学 一种高速igbt
WO2010142342A1 (en) * 2009-06-12 2010-12-16 Abb Research Ltd Power semiconductor device
US9478646B2 (en) 2011-07-27 2016-10-25 Alpha And Omega Semiconductor Incorporated Methods for fabricating anode shorted field stop insulated gate bipolar transistor
DE102013009985B4 (de) 2013-06-14 2019-06-13 X-Fab Semiconductor Foundries Ag IGBT-Leistungstransistor, herstellbar in einer grabenisolierten SOI-Technologie und Verfahren zu seiner Herstellung
CN104282551A (zh) * 2013-07-03 2015-01-14 无锡华润上华半导体有限公司 一种igbt的制造方法
CN104347398A (zh) * 2013-07-25 2015-02-11 无锡华润上华半导体有限公司 一种igbt的制造方法
US9306045B2 (en) * 2013-11-19 2016-04-05 United Microelectronics Corp. Semiconductor power device
KR20150076768A (ko) * 2013-12-27 2015-07-07 삼성전기주식회사 전력 반도체 소자
CN108258029B (zh) * 2016-12-29 2020-06-23 无锡华润华晶微电子有限公司 反向导通绝缘栅双极晶体管及其制备方法
CN107293485A (zh) * 2017-07-21 2017-10-24 电子科技大学 一种低压逆导fs‑igbt的制备方法
CN108428631A (zh) * 2018-03-30 2018-08-21 苏州凤凰芯电子科技有限公司 一种rc-igbt器件背面制作方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IE53895B1 (en) * 1981-11-23 1989-04-12 Gen Electric Semiconductor device having rapid removal of majority carriers from an active base region thereof at device turn-off and method of fabricating this device
DE3583183D1 (de) * 1984-05-09 1991-07-18 Toshiba Kawasaki Kk Verfahren zur herstellung eines halbleitersubstrates.
JPS61208268A (ja) * 1985-03-13 1986-09-16 Toshiba Corp 伝導度変調型半導体装置
JPS61216363A (ja) * 1985-03-22 1986-09-26 Toshiba Corp 伝導度変調型半導体装置
US4757025A (en) * 1985-03-25 1988-07-12 Motorola Inc. Method of making gate turn off switch with anode short and buried base
JP2633536B2 (ja) * 1986-11-05 1997-07-23 株式会社東芝 接合型半導体基板の製造方法
JP2579928B2 (ja) * 1987-02-26 1997-02-12 株式会社東芝 半導体素子およびその製造方法
JPS6480077A (en) * 1987-09-21 1989-03-24 Nissan Motor Conductivity-modulation mosfet
JPH0828506B2 (ja) * 1988-11-07 1996-03-21 三菱電機株式会社 半導体装置およびその製造方法
JPH0691263B2 (ja) * 1988-10-19 1994-11-14 株式会社東芝 半導体装置の製造方法
US5183769A (en) * 1991-05-06 1993-02-02 Motorola, Inc. Vertical current flow semiconductor device utilizing wafer bonding
US5178370A (en) * 1991-08-05 1993-01-12 Motorola Inc. Conductivity modulated insulated gate semiconductor device

Also Published As

Publication number Publication date
EP0578973A1 (de) 1994-01-19
JPH05347413A (ja) 1993-12-27
KR0161356B1 (ko) 1999-02-01
KR940001329A (ko) 1994-01-11
US5286655A (en) 1994-02-15
DE69324074D1 (de) 1999-04-29
EP0578973B1 (de) 1999-03-24

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