DE69123642T2 - MESFET und Verfahren zur Herstellung - Google Patents

MESFET und Verfahren zur Herstellung

Info

Publication number
DE69123642T2
DE69123642T2 DE69123642T DE69123642T DE69123642T2 DE 69123642 T2 DE69123642 T2 DE 69123642T2 DE 69123642 T DE69123642 T DE 69123642T DE 69123642 T DE69123642 T DE 69123642T DE 69123642 T2 DE69123642 T2 DE 69123642T2
Authority
DE
Germany
Prior art keywords
active layer
source region
gate electrode
region
doping concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69123642T
Other languages
German (de)
English (en)
Other versions
DE69123642D1 (de
Inventor
Mitsunori Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69123642D1 publication Critical patent/DE69123642D1/de
Application granted granted Critical
Publication of DE69123642T2 publication Critical patent/DE69123642T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H10D30/0616—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs using processes wherein the final gate is made before the completion of the source and drain regions, e.g. gate-first processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0618—Manufacture or treatment of FETs having Schottky gates of lateral Schottky gate FETs having multiple independently-addressable gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/87—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H10D30/873—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET] having multiple gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/161—Source or drain regions of field-effect devices of FETs having Schottky gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/90—MOSFET type gate sidewall insulating spacer

Landscapes

  • Junction Field-Effect Transistors (AREA)
DE69123642T 1990-06-11 1991-06-05 MESFET und Verfahren zur Herstellung Expired - Fee Related DE69123642T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2153395A JPH0444328A (ja) 1990-06-11 1990-06-11 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69123642D1 DE69123642D1 (de) 1997-01-30
DE69123642T2 true DE69123642T2 (de) 1997-04-17

Family

ID=15561558

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69123642T Expired - Fee Related DE69123642T2 (de) 1990-06-11 1991-06-05 MESFET und Verfahren zur Herstellung

Country Status (4)

Country Link
US (2) US5225703A (enExample)
EP (1) EP0461807B1 (enExample)
JP (1) JPH0444328A (enExample)
DE (1) DE69123642T2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950034830A (ko) * 1994-04-29 1995-12-28 빈센트 비. 인그라시아 전계 효과 트랜지스터 및 이 트랜지스터의 제조 방법
US5965919A (en) * 1995-10-19 1999-10-12 Samsung Electronics Co., Ltd. Semiconductor device and a method of fabricating the same
US5834810A (en) * 1996-10-17 1998-11-10 Mitsubishi Semiconductor America, Inc. Asymmetrical vertical lightly doped drain transistor and method of forming the same
US6830976B2 (en) 2001-03-02 2004-12-14 Amberwave Systems Corproation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6703688B1 (en) 2001-03-02 2004-03-09 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
WO2003105206A1 (en) 2002-06-10 2003-12-18 Amberwave Systems Corporation Growing source and drain elements by selecive epitaxy
US6982474B2 (en) 2002-06-25 2006-01-03 Amberwave Systems Corporation Reacted conductive gate electrodes
CN100437970C (zh) 2003-03-07 2008-11-26 琥珀波系统公司 一种结构及用于形成半导体结构的方法
US8590067B2 (en) * 2005-02-03 2013-11-26 Danco, Inc. Control of toilet bowl fill flow
US20080029484A1 (en) * 2006-07-25 2008-02-07 Applied Materials, Inc. In-situ process diagnostics of in-film aluminum during plasma deposition
CN111627927A (zh) * 2020-05-19 2020-09-04 武汉华星光电半导体显示技术有限公司 一种阵列基板及其制作方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3279663D1 (en) * 1981-06-17 1989-06-01 Hitachi Ltd Heterojunction semiconductor device
JPS59144134A (ja) * 1983-02-08 1984-08-18 Nec Corp フオトマスクエツチング終点判定装置
JPS6292479A (ja) * 1985-10-18 1987-04-27 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6292478A (ja) * 1985-10-18 1987-04-27 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS62113479A (ja) * 1985-11-13 1987-05-25 Fujitsu Ltd 電界効果半導体装置の製造方法
CA1298921C (en) * 1986-07-02 1992-04-14 Madhukar B. Vora Bipolar transistor with polysilicon stringer base contact
JPS6312177A (ja) * 1986-07-03 1988-01-19 Fujitsu Ltd 超高周波トランジスタ
JPS63153864A (ja) * 1986-12-17 1988-06-27 Fujitsu Ltd Ｍｏｓ型半導体装置の製造方法
JPH01303762A (ja) * 1988-05-31 1989-12-07 Nec Corp ショットキー障壁接合ゲート型電界効果トランジスタ
US5196359A (en) * 1988-06-30 1993-03-23 Texas Instruments Incorporated Method of forming heterostructure field effect transistor
JPH02134828A (ja) * 1988-11-15 1990-05-23 Nec Corp ショットキー障壁接合ゲート型電界効果トランジスタの製造方法
JPH02148740A (ja) * 1988-11-29 1990-06-07 Fujitsu Ltd 半導体装置及びその製造方法
US5041393A (en) * 1988-12-28 1991-08-20 At&T Bell Laboratories Fabrication of GaAs integrated circuits
KR910013568A (ko) * 1989-12-31 1991-08-08 김광호 화합물 반도체 장치 및 그 제조방법
JPH03292744A (ja) * 1990-01-24 1991-12-24 Toshiba Corp 化合物半導体装置およびその製造方法
JPH0475351A (ja) * 1990-07-17 1992-03-10 Mitsubishi Electric Corp 化合物半導体装置の製造方法
JPH04167439A (ja) * 1990-10-30 1992-06-15 Mitsubishi Electric Corp 半導体装置の製造方法
JPH04260338A (ja) * 1991-02-14 1992-09-16 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPH0444328A (ja) 1992-02-14
EP0461807A2 (en) 1991-12-18
US5225703A (en) 1993-07-06
DE69123642D1 (de) 1997-01-30
EP0461807A3 (enExample) 1994-03-16
EP0461807B1 (en) 1996-12-18
US5360755A (en) 1994-11-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee