DE69033593D1 - Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einer Isolationszone - Google Patents

Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einer Isolationszone

Info

Publication number
DE69033593D1
DE69033593D1 DE69033593T DE69033593T DE69033593D1 DE 69033593 D1 DE69033593 D1 DE 69033593D1 DE 69033593 T DE69033593 T DE 69033593T DE 69033593 T DE69033593 T DE 69033593T DE 69033593 D1 DE69033593 D1 DE 69033593D1
Authority
DE
Germany
Prior art keywords
manufacturing
integrated circuit
semiconductor integrated
isolation zone
isolation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69033593T
Other languages
English (en)
Other versions
DE69033593T2 (de
Inventor
Kazuo Takeda
Toshimasa Sadakata
Teruo Tabata
Nobuyuki Sekikawa
Tadayoshi Takada
Yasuhiro Tamada
Yoshiaki Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP10078289A external-priority patent/JPH02278833A/ja
Priority claimed from JP1127322A external-priority patent/JPH06101543B2/ja
Priority claimed from JP1127316A external-priority patent/JPH06101539B2/ja
Priority claimed from JP1127321A external-priority patent/JPH06101542B2/ja
Priority claimed from JP1127320A external-priority patent/JPH06101541B2/ja
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of DE69033593D1 publication Critical patent/DE69033593D1/de
Application granted granted Critical
Publication of DE69033593T2 publication Critical patent/DE69033593T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/009—Bi-MOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
DE69033593T 1989-04-20 1990-04-19 Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einer Isolationszone Expired - Fee Related DE69033593T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP10078289A JPH02278833A (ja) 1989-04-20 1989-04-20 半導体集積回路の製造方法
JP1127322A JPH06101543B2 (ja) 1989-05-19 1989-05-19 半導体集積回路の製造方法
JP1127316A JPH06101539B2 (ja) 1989-05-19 1989-05-19 半導体集積回路の製造方法
JP1127321A JPH06101542B2 (ja) 1989-05-19 1989-05-19 半導体集積回路の製造方法
JP1127320A JPH06101541B2 (ja) 1989-05-19 1989-05-19 半導体集積回路の製造方法

Publications (2)

Publication Number Publication Date
DE69033593D1 true DE69033593D1 (de) 2000-08-24
DE69033593T2 DE69033593T2 (de) 2000-11-23

Family

ID=27526023

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69033593T Expired - Fee Related DE69033593T2 (de) 1989-04-20 1990-04-19 Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einer Isolationszone

Country Status (3)

Country Link
US (1) US5141881A (de)
EP (1) EP0398032B1 (de)
DE (1) DE69033593T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06101540B2 (ja) * 1989-05-19 1994-12-12 三洋電機株式会社 半導体集積回路の製造方法
GB2237445B (en) * 1989-10-04 1994-01-12 Seagate Microelectron Ltd A semiconductor device fabrication process
US5198374A (en) * 1990-04-03 1993-03-30 Oki Electric Industry Co., Ltd. Method of making biCMOS integrated circuit with shallow N-wells
US5212112A (en) * 1991-05-23 1993-05-18 At&T Bell Laboratories Selective epitaxy of silicon in silicon dioxide apertures with suppression of unwanted formation of facets
KR0142797B1 (ko) * 1994-06-17 1998-08-17 문정환 실리콘-온-인슐레이터구조의 제조방법
JPH08172139A (ja) * 1994-12-19 1996-07-02 Sony Corp 半導体装置製造方法
EP0818055A4 (de) * 1995-03-27 1998-05-06 Micrel Inc Selbstausrichtende technik für halbleiteranordnungen
JPH09115998A (ja) * 1995-10-16 1997-05-02 Toshiba Corp 半導体集積回路の素子分離構造及び素子分離方法
JPH10189755A (ja) * 1996-12-20 1998-07-21 Nec Corp 半導体装置及びその製造方法
US20010041461A1 (en) * 1998-10-06 2001-11-15 Rodney S. Ridley Process for forming high voltage junction termination extension oxide

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3483446A (en) * 1967-06-15 1969-12-09 Westinghouse Electric Corp Semiconductor integrated circuit including a bidirectional transistor and method of making the same
US3730786A (en) * 1970-09-03 1973-05-01 Ibm Performance matched complementary pair transistors
JPS515277B2 (de) * 1971-12-22 1976-02-18
US3901735A (en) * 1973-09-10 1975-08-26 Nat Semiconductor Corp Integrated circuit device and method utilizing ion implanted and up diffusion for isolated region
US4021270A (en) * 1976-06-28 1977-05-03 Motorola, Inc. Double master mask process for integrated circuit manufacture
JPS5487748A (en) * 1977-12-26 1979-07-12 Shin Etsu Chem Co Ltd Flame-retardant vinyl chloride resin composition
JPS55151349A (en) * 1979-05-15 1980-11-25 Matsushita Electronics Corp Forming method of insulation isolating region
GB2089565B (en) * 1980-12-12 1985-02-20 Gen Electric Co Ltd Transistors
DE3361832D1 (en) * 1982-04-19 1986-02-27 Matsushita Electric Ind Co Ltd Semiconductor ic and method of making the same
JPS6015943A (ja) * 1983-07-07 1985-01-26 Fujitsu Ltd 半導体装置の製造方法
KR850008492A (ko) * 1984-05-25 1985-12-18 아놀드 세일러, 에른스트 알테르 트랜스, 트랜스-8,10-도데카디엔-1-일옥시실란의 제조방법
JPS61134036A (ja) * 1984-12-05 1986-06-21 Fuji Electric Co Ltd 半導体集積回路の製造方法
JPS6237737A (ja) * 1985-08-12 1987-02-18 Matsushita Electric Ind Co Ltd マイクロプロセツサ回路
JPH01290454A (ja) * 1988-05-18 1989-11-22 Rohm Co Ltd サーマルヘッド
US4914051A (en) * 1988-12-09 1990-04-03 Sprague Electric Company Method for making a vertical power DMOS transistor with small signal bipolar transistors

Also Published As

Publication number Publication date
US5141881A (en) 1992-08-25
EP0398032A2 (de) 1990-11-22
EP0398032B1 (de) 2000-07-19
EP0398032A3 (de) 1991-03-20
DE69033593T2 (de) 2000-11-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee