DE69013851D1 - Verfahren zur Herstellung einer keramischen Schaltungsplatte. - Google Patents

Verfahren zur Herstellung einer keramischen Schaltungsplatte.

Info

Publication number
DE69013851D1
DE69013851D1 DE69013851T DE69013851T DE69013851D1 DE 69013851 D1 DE69013851 D1 DE 69013851D1 DE 69013851 T DE69013851 T DE 69013851T DE 69013851 T DE69013851 T DE 69013851T DE 69013851 D1 DE69013851 D1 DE 69013851D1
Authority
DE
Germany
Prior art keywords
manufacturing
circuit board
ceramic circuit
ceramic
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69013851T
Other languages
English (en)
Other versions
DE69013851T2 (de
Inventor
Akira Yamakawa
Mitsuo Osada
Nobuo Ogasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Application granted granted Critical
Publication of DE69013851D1 publication Critical patent/DE69013851D1/de
Publication of DE69013851T2 publication Critical patent/DE69013851T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0116—Porous, e.g. foam
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12—Using specific substances
    • H05K2203/128—Molten metals, e.g. casting thereof, or melting by heating and excluding molten solder
DE1990613851 1989-11-13 1990-11-09 Verfahren zur Herstellung einer keramischen Schaltungsplatte. Expired - Fee Related DE69013851T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29422889A JPH03154395A (ja) 1989-11-13 1989-11-13 回路基板およびその製造方法

Publications (2)

Publication Number Publication Date
DE69013851D1 true DE69013851D1 (de) 1994-12-08
DE69013851T2 DE69013851T2 (de) 1995-03-09

Family

ID=17805000

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1990613851 Expired - Fee Related DE69013851T2 (de) 1989-11-13 1990-11-09 Verfahren zur Herstellung einer keramischen Schaltungsplatte.

Country Status (3)

Country Link
EP (1) EP0428086B1 (de)
JP (1) JPH03154395A (de)
DE (1) DE69013851T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5200249A (en) * 1990-08-15 1993-04-06 W. R. Grace & Co.-Conn. Via metallization for AlN ceramic electronic package
US5214000A (en) * 1991-12-19 1993-05-25 Raychem Corporation Thermal transfer posts for high density multichip substrates and formation method
JP2559977B2 (ja) * 1992-07-29 1996-12-04 インターナショナル・ビジネス・マシーンズ・コーポレイション バイアに係るクラックを除去する方法及び構造、並びに、半導体セラミックパッケージ基板。
WO2012011165A1 (ja) * 2010-07-20 2012-01-26 住友電気工業株式会社 多層プリント配線板およびその製造方法
KR20190048111A (ko) * 2017-10-30 2019-05-09 주식회사 아모센스 양면 세라믹 기판 제조방법, 그 제조방법에 의해 제조되는 양면 세라믹 기판 및 이를 포함하는 반도체 패키지

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4684446A (en) * 1985-09-26 1987-08-04 General Electric Company Secondary metallization by glass displacement in ceramic substrate
US4861641A (en) * 1987-05-22 1989-08-29 Ceramics Process Systems Corporation Substrates with dense metal vias
JPH0636471B2 (ja) * 1988-01-27 1994-05-11 株式会社村田製作所 セラミックグリーンシートの貫通穴への導体充填方法

Also Published As

Publication number Publication date
EP0428086A3 (en) 1992-03-18
EP0428086B1 (de) 1994-11-02
EP0428086A2 (de) 1991-05-22
DE69013851T2 (de) 1995-03-09
JPH03154395A (ja) 1991-07-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee