DE69031609D1 - Halbleiteranordnung - Google Patents
HalbleiteranordnungInfo
- Publication number
- DE69031609D1 DE69031609D1 DE69031609T DE69031609T DE69031609D1 DE 69031609 D1 DE69031609 D1 DE 69031609D1 DE 69031609 T DE69031609 T DE 69031609T DE 69031609 T DE69031609 T DE 69031609T DE 69031609 D1 DE69031609 D1 DE 69031609D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9913089 | 1989-04-19 | ||
JP12583989 | 1989-05-19 | ||
JP02027785A JP3092133B2 (ja) | 1989-04-19 | 1990-02-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69031609D1 true DE69031609D1 (de) | 1997-11-27 |
DE69031609T2 DE69031609T2 (de) | 1998-03-12 |
Family
ID=27285945
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69034088T Expired - Fee Related DE69034088T2 (de) | 1989-04-19 | 1990-04-18 | Halbleiteranordnung |
DE69031609T Expired - Fee Related DE69031609T2 (de) | 1989-04-19 | 1990-04-18 | Halbleiteranordnung |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69034088T Expired - Fee Related DE69034088T2 (de) | 1989-04-19 | 1990-04-18 | Halbleiteranordnung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5136356A (de) |
EP (2) | EP0393620B1 (de) |
DE (2) | DE69034088T2 (de) |
SG (1) | SG67297A1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3266644B2 (ja) * | 1991-04-08 | 2002-03-18 | テキサス インスツルメンツ インコーポレイテツド | ゲートアレイ装置 |
US5275962A (en) * | 1991-04-08 | 1994-01-04 | Texas Instruments Incorporated | Mask programmable gate array base cell |
EP0523967B1 (de) * | 1991-07-18 | 1999-09-22 | Fujitsu Limited | Anordnung von Transistoren zur Fertigung einer Basiszelle für eine integrierte Masterslice-Halbleiteranordnung und integrierte Masterslice-Halbleiteranordnung |
WO1993012582A1 (en) * | 1991-12-13 | 1993-06-24 | Knights Technology, Inc. | Programmable logic device cell and method |
US6160275A (en) * | 1993-04-20 | 2000-12-12 | Hitachi, Ltd. | Semiconductor gate array device |
JPH11121722A (ja) * | 1997-10-17 | 1999-04-30 | Mitsubishi Electric Corp | ゲートアレーおよびゲートアレーを用いる半導体集積回路の製造方法 |
US6387739B1 (en) * | 1998-08-07 | 2002-05-14 | International Business Machines Corporation | Method and improved SOI body contact structure for transistors |
JP2001110903A (ja) * | 1999-10-13 | 2001-04-20 | Matsushita Electric Ind Co Ltd | 集積回路のレイアウト構造、並びにcmos回路のレイアウト設計方法および設計装置 |
JP4521088B2 (ja) * | 2000-03-27 | 2010-08-11 | 株式会社東芝 | 半導体装置 |
JP2002026296A (ja) * | 2000-06-22 | 2002-01-25 | Internatl Business Mach Corp <Ibm> | 半導体集積回路装置 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3066941D1 (en) * | 1979-05-24 | 1984-04-19 | Fujitsu Ltd | Masterslice semiconductor device and method of producing it |
JPS57100746A (en) * | 1980-12-15 | 1982-06-23 | Toshiba Corp | Semiconductor integrated circuit device |
JPS5882533A (ja) * | 1981-07-10 | 1983-05-18 | Hitachi Ltd | 半導体集積回路装置 |
JPS5864047A (ja) * | 1981-10-13 | 1983-04-16 | Nec Corp | マスタ−スライス半導体集積回路装置 |
JPH0828480B2 (ja) * | 1983-09-30 | 1996-03-21 | 富士通株式会社 | 半導体集積回路装置 |
JPS6074644A (ja) * | 1983-09-30 | 1985-04-26 | Fujitsu Ltd | Cmosゲ−トアレ− |
JPS6080251A (ja) * | 1983-10-08 | 1985-05-08 | Fujitsu Ltd | ゲ−トアレイ大規模集積回路装置 |
JPS6114734A (ja) * | 1984-06-29 | 1986-01-22 | Fujitsu Ltd | 半導体集積回路装置及びその製造方法 |
JPS6135535A (ja) * | 1984-07-27 | 1986-02-20 | Fujitsu Ltd | マスタ−スライス集積回路装置 |
US4682201A (en) * | 1984-10-19 | 1987-07-21 | California Devices, Inc. | Gate array cell |
JPS61100947A (ja) * | 1984-10-22 | 1986-05-19 | Toshiba Corp | 半導体集積回路装置 |
JPS61123168A (ja) * | 1984-11-20 | 1986-06-11 | Fujitsu Ltd | 半導体記憶装置 |
JPH0638468B2 (ja) * | 1984-12-18 | 1994-05-18 | 三洋電機株式会社 | 半導体集積回路装置 |
US4924287A (en) * | 1985-01-20 | 1990-05-08 | Avner Pdahtzur | Personalizable CMOS gate array device and technique |
JPS6254450A (ja) * | 1985-09-02 | 1987-03-10 | Nec Corp | マスタ−スライス基板 |
JPS62261144A (ja) * | 1986-05-07 | 1987-11-13 | Mitsubishi Electric Corp | 半導体集積回路 |
US4884118A (en) * | 1986-05-19 | 1989-11-28 | Lsi Logic Corporation | Double metal HCMOS compacted array |
JPS62276852A (ja) * | 1986-05-23 | 1987-12-01 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US4745084A (en) * | 1986-11-12 | 1988-05-17 | Vlsi Technology, Inc. | Method of making a customized semiconductor integrated device |
JPH0194636A (ja) * | 1987-10-06 | 1989-04-13 | Hitachi Ltd | 半導体装置 |
-
1990
- 1990-04-18 SG SG1996001962A patent/SG67297A1/en unknown
- 1990-04-18 DE DE69034088T patent/DE69034088T2/de not_active Expired - Fee Related
- 1990-04-18 US US07/510,888 patent/US5136356A/en not_active Expired - Lifetime
- 1990-04-18 EP EP90107341A patent/EP0393620B1/de not_active Expired - Lifetime
- 1990-04-18 DE DE69031609T patent/DE69031609T2/de not_active Expired - Fee Related
- 1990-04-18 EP EP96101001A patent/EP0712164B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
SG67297A1 (en) | 1999-09-21 |
EP0712164A3 (de) | 1996-10-16 |
DE69034088D1 (de) | 2003-08-07 |
EP0393620A3 (de) | 1991-04-17 |
US5136356A (en) | 1992-08-04 |
EP0712164A2 (de) | 1996-05-15 |
DE69034088T2 (de) | 2004-02-05 |
EP0393620B1 (de) | 1997-10-22 |
EP0393620A2 (de) | 1990-10-24 |
DE69031609T2 (de) | 1998-03-12 |
EP0712164B1 (de) | 2003-07-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |