DE68917792D1 - Speicher. - Google Patents

Speicher.

Info

Publication number
DE68917792D1
DE68917792D1 DE68917792T DE68917792T DE68917792D1 DE 68917792 D1 DE68917792 D1 DE 68917792D1 DE 68917792 T DE68917792 T DE 68917792T DE 68917792 T DE68917792 T DE 68917792T DE 68917792 D1 DE68917792 D1 DE 68917792D1
Authority
DE
Germany
Prior art keywords
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68917792T
Other languages
English (en)
Other versions
DE68917792T2 (de
Inventor
Fumio C O Patents Divis Miyaji
Yukio C O Patents Divisio Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63135101A external-priority patent/JPH023171A/ja
Priority claimed from JP63191547A external-priority patent/JP2759969B2/ja
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE68917792D1 publication Critical patent/DE68917792D1/de
Application granted granted Critical
Publication of DE68917792T2 publication Critical patent/DE68917792T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Power Sources (AREA)
DE68917792T 1988-06-01 1989-06-01 Speicher. Expired - Fee Related DE68917792T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63135101A JPH023171A (ja) 1988-06-01 1988-06-01 スタティックram
JP63191547A JP2759969B2 (ja) 1988-07-29 1988-07-29 内部降圧回路

Publications (2)

Publication Number Publication Date
DE68917792D1 true DE68917792D1 (de) 1994-10-06
DE68917792T2 DE68917792T2 (de) 1995-01-19

Family

ID=26469038

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68917792T Expired - Fee Related DE68917792T2 (de) 1988-06-01 1989-06-01 Speicher.

Country Status (3)

Country Link
US (1) US5046052A (de)
EP (1) EP0345065B1 (de)
DE (1) DE68917792T2 (de)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
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USRE40132E1 (en) 1988-06-17 2008-03-04 Elpida Memory, Inc. Large scale integrated circuit with sense amplifier circuits for low voltage operation
US5262999A (en) * 1988-06-17 1993-11-16 Hitachi, Ltd. Large scale integrated circuit for low voltage operation
US5297097A (en) * 1988-06-17 1994-03-22 Hitachi Ltd. Large scale integrated circuit for low voltage operation
US5430681A (en) * 1989-05-08 1995-07-04 Hitachi Maxell, Ltd. Memory cartridge and its memory control method
JPH03231320A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp マイクロコンピュータシステム
JPH03283562A (ja) * 1990-03-30 1991-12-13 Sony Corp 半導体集積回路装置
JP3124781B2 (ja) * 1990-03-30 2001-01-15 富士通株式会社 半導体集積回路装置
US5063304A (en) * 1990-04-27 1991-11-05 Texas Instruments Incorporated Integrated circuit with improved on-chip power supply control
US5267211A (en) * 1990-08-23 1993-11-30 Seiko Epson Corporation Memory card with control and voltage boosting circuits and electronic appliance using the same
JPH04119595A (ja) * 1990-09-11 1992-04-21 Toshiba Corp 不揮発性半導体メモリ
KR100231393B1 (ko) * 1991-04-18 1999-11-15 나시모토 류조 반도체집적회로장치
JP3379761B2 (ja) * 1991-07-02 2003-02-24 株式会社日立製作所 不揮発性記憶装置
KR930008886B1 (ko) * 1991-08-19 1993-09-16 삼성전자 주식회사 전기적으로 프로그램 할 수 있는 내부전원 발생회로
KR940008286B1 (ko) * 1991-08-19 1994-09-09 삼성전자 주식회사 내부전원발생회로
JP3230848B2 (ja) * 1991-09-20 2001-11-19 三菱電機株式会社 スタティックランダムアクセスメモリ装置
JP3110113B2 (ja) * 1991-11-21 2000-11-20 株式会社東芝 スタティック型メモリ
US5490107A (en) * 1991-12-27 1996-02-06 Fujitsu Limited Nonvolatile semiconductor memory
US5282174A (en) * 1992-01-31 1994-01-25 At&T Bell Laboratories Dual-port memory with read and read/write ports
KR950008453B1 (ko) * 1992-03-31 1995-07-31 삼성전자주식회사 내부전원전압 발생회로
JP3176985B2 (ja) * 1992-05-27 2001-06-18 株式会社東芝 半導体メモリ
JP2752304B2 (ja) * 1992-10-21 1998-05-18 株式会社東芝 半導体記憶装置
US5303190A (en) * 1992-10-27 1994-04-12 Motorola, Inc. Static random access memory resistant to soft error
JP2955156B2 (ja) * 1992-10-29 1999-10-04 三菱電機株式会社 半導体装置
US5532618A (en) * 1992-11-30 1996-07-02 United Memories, Inc. Stress mode circuit for an integrated circuit with on-chip voltage down converter
JP2925422B2 (ja) * 1993-03-12 1999-07-28 株式会社東芝 半導体集積回路
US5298816A (en) * 1993-03-30 1994-03-29 Kaplinsky Cecil H Write circuit for CMOS latch and memory systems
KR0131746B1 (ko) * 1993-12-01 1998-04-14 김주용 내부 강압전원 회로
US5440519A (en) * 1994-02-01 1995-08-08 Micron Semiconductor, Inc. Switched memory expansion buffer
JPH0869693A (ja) * 1994-08-30 1996-03-12 Mitsubishi Electric Corp スタティック型半導体記憶装置
JPH08153388A (ja) * 1994-11-28 1996-06-11 Mitsubishi Electric Corp 半導体記憶装置
JP3633996B2 (ja) * 1995-04-21 2005-03-30 株式会社ルネサステクノロジ 半導体装置
JP4198201B2 (ja) * 1995-06-02 2008-12-17 株式会社ルネサステクノロジ 半導体装置
US5574697A (en) * 1995-08-15 1996-11-12 Micron Technology, Inc. Memory device with distributed voltage regulation system
US6009034A (en) * 1995-08-15 1999-12-28 Micron Technology, Inc. Memory device with distributed voltage regulation system
JPH0973784A (ja) * 1995-09-07 1997-03-18 Nec Corp 半導体装置及びその制御回路
KR100295055B1 (ko) 1998-09-25 2001-07-12 윤종용 전압조정이가능한내부전원회로를갖는반도체메모리장치
DE10014385B4 (de) * 2000-03-23 2005-12-15 Infineon Technologies Ag CMOS-Spannungsteiler
JP2003284322A (ja) * 2002-03-20 2003-10-03 Fujitsu Ltd 電圧監視回路を具備する半導体装置
JP4373154B2 (ja) * 2003-07-18 2009-11-25 株式会社半導体エネルギー研究所 メモリ回路およびそのメモリ回路を有する表示装置、電子機器
JP5100035B2 (ja) * 2005-08-02 2012-12-19 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7352609B2 (en) * 2005-08-15 2008-04-01 International Business Machines Corporation Voltage controlled static random access memory
US7466582B2 (en) * 2005-08-15 2008-12-16 International Business Machines Corporation Voltage controlled static random access memory
US7760576B2 (en) 2007-11-08 2010-07-20 Qualcomm Incorporated Systems and methods for low power, high yield memory
WO2010146640A1 (ja) * 2009-06-15 2010-12-23 パナソニック株式会社 半導体集積回路装置及び電子機器
US9786357B2 (en) * 2016-02-17 2017-10-10 Apple Inc. Bit-cell voltage distribution system

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156940A (en) * 1978-03-27 1979-05-29 Rca Corporation Memory array with bias voltage generator
JPS55149871A (en) * 1978-07-31 1980-11-21 Fujitsu Ltd Line voltage detector
JPS55101185A (en) * 1979-01-29 1980-08-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device
JPS592997B2 (ja) * 1980-05-22 1984-01-21 富士通株式会社 スタテイツクメモリ
JPS5940393A (ja) * 1982-08-31 1984-03-06 Nec Corp メモリ回路
US4585955B1 (en) * 1982-12-15 2000-11-21 Tokyo Shibaura Electric Co Internally regulated power voltage circuit for mis semiconductor integrated circuit
JPS60130161A (ja) * 1983-12-16 1985-07-11 Fujitsu Ltd スタテイツクメモリセル
JPS60253093A (ja) * 1984-05-30 1985-12-13 Fujitsu Ltd 半導体記憶装置
JPS6196588A (ja) * 1984-10-16 1986-05-15 Mitsubishi Electric Corp 半導体記憶装置
JPS61104394A (ja) * 1984-10-22 1986-05-22 Mitsubishi Electric Corp 半導体記憶装置
US4730279A (en) * 1985-03-30 1988-03-08 Kabushiki Kaisha Toshiba Static semiconductor memory device
JPH0770216B2 (ja) * 1985-11-22 1995-07-31 株式会社日立製作所 半導体集積回路
US4740818A (en) * 1985-12-16 1988-04-26 Eastman Kodak Company Electrophotographic reproduction apparatus and method with selective screening
US4699252A (en) * 1986-01-30 1987-10-13 Peter Sing Rolling contact suction system for vehicle braking and adhesion
JPS63104290A (ja) * 1986-10-21 1988-05-09 Nec Corp 半導体記憶装置
JPH01100793A (ja) * 1987-10-13 1989-04-19 Nec Corp Cmos型半導体メモリ回路
JPH01166399A (ja) * 1987-12-23 1989-06-30 Toshiba Corp スタティック型ランダムアクセスメモリ
DE19914627B4 (de) * 1999-03-31 2011-05-12 Heidelberger Druckmaschinen Ag Verfahren und Vorrichtung zur Kompensation der Drehschwingungen einer Druckmaschine

Also Published As

Publication number Publication date
EP0345065A3 (de) 1991-05-08
DE68917792T2 (de) 1995-01-19
EP0345065A2 (de) 1989-12-06
EP0345065B1 (de) 1994-08-31
US5046052A (en) 1991-09-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee