DE602007005717D1 - Halbleiterspeicher und Steuerungsverfahren für den Auffrischungszyklus - Google Patents
Halbleiterspeicher und Steuerungsverfahren für den AuffrischungszyklusInfo
- Publication number
- DE602007005717D1 DE602007005717D1 DE602007005717T DE602007005717T DE602007005717D1 DE 602007005717 D1 DE602007005717 D1 DE 602007005717D1 DE 602007005717 T DE602007005717 T DE 602007005717T DE 602007005717 T DE602007005717 T DE 602007005717T DE 602007005717 D1 DE602007005717 D1 DE 602007005717D1
- Authority
- DE
- Germany
- Prior art keywords
- control method
- semiconductor memory
- refresh cycle
- refresh
- cycle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40626—Temperature related aspects of refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0409—Online test
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5002—Characteristic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4067—Refresh in standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006140605A JP4850578B2 (ja) | 2006-05-19 | 2006-05-19 | 半導体記憶装置及びリフレッシュ周期制御方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602007005717D1 true DE602007005717D1 (de) | 2010-05-20 |
Family
ID=38222548
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602007005717T Active DE602007005717D1 (de) | 2006-05-19 | 2007-04-27 | Halbleiterspeicher und Steuerungsverfahren für den Auffrischungszyklus |
Country Status (7)
Country | Link |
---|---|
US (1) | US7583553B2 (de) |
EP (1) | EP1858024B1 (de) |
JP (1) | JP4850578B2 (de) |
KR (1) | KR100895190B1 (de) |
CN (1) | CN101075478B (de) |
DE (1) | DE602007005717D1 (de) |
TW (1) | TWI330367B (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4603537B2 (ja) * | 2004-06-18 | 2010-12-22 | 富士通セミコンダクター株式会社 | 半導体装置の温度検出器および半導体記憶装置 |
JP4838518B2 (ja) * | 2005-02-22 | 2011-12-14 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
US7383149B1 (en) * | 2006-04-19 | 2008-06-03 | Darryl Walker | Semiconductor device having variable parameter selection based on temperature and test method |
US8049145B1 (en) * | 2006-04-19 | 2011-11-01 | Agerson Rall Group, L.L.C. | Semiconductor device having variable parameter selection based on temperature and test method |
EP2359371A1 (de) | 2008-11-11 | 2011-08-24 | Nokia Corporation | Verfahren und einrichtung zum datenauffrischen auf temperaturbasis in nichtflüchtigen speichern |
KR101559549B1 (ko) | 2008-12-08 | 2015-10-13 | 삼성전자주식회사 | 모바일 SoC 및 모바일 단말기 |
US8786449B1 (en) * | 2009-12-16 | 2014-07-22 | Applied Micro Circuits Corporation | System-on-chip with thermal management core |
JP2011170943A (ja) * | 2010-02-22 | 2011-09-01 | Sony Corp | 記憶制御装置、記憶装置、記憶装置システム |
CN102194513B (zh) * | 2010-03-11 | 2013-07-31 | 复旦大学 | 自动调整存储器刷新操作频率的电路、方法及其存储器 |
JP2012038399A (ja) | 2010-08-11 | 2012-02-23 | Elpida Memory Inc | 半導体装置 |
CN103035282B (zh) * | 2011-09-30 | 2016-01-20 | 群联电子股份有限公司 | 存储器储存装置、存储器控制器与温度管理方法 |
KR20130098473A (ko) * | 2012-02-28 | 2013-09-05 | 삼성전자주식회사 | 테스트 핸들러의 챔버 내부온도 측정방법 및 온도 실시간 조정방법 |
KR20140006219A (ko) * | 2012-06-27 | 2014-01-16 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이의 테스트 회로 |
US9147461B1 (en) | 2012-11-28 | 2015-09-29 | Samsung Electronics Co., Ltd. | Semiconductor memory device performing a refresh operation, and memory system including the same |
KR102098248B1 (ko) * | 2013-06-03 | 2020-04-07 | 삼성전자 주식회사 | 온도에 따라 완화된 타이밍 요건으로 사용되는 메모리 장치 및 이를 이용하는 메모리 콘트롤러 |
KR20150051471A (ko) * | 2013-11-04 | 2015-05-13 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 구동방법 |
KR20150052631A (ko) * | 2013-11-06 | 2015-05-14 | 에스케이하이닉스 주식회사 | 반도체 장치 및 반도체 시스템 |
KR102158266B1 (ko) * | 2014-02-19 | 2020-09-22 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
US9810585B2 (en) | 2014-03-28 | 2017-11-07 | Darryl G. Walker | Semiconductor device having a temperature circuit that provides a plurality of temperature operating ranges |
KR102276249B1 (ko) * | 2014-06-18 | 2021-07-12 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그 동작 방법 |
US20160054378A1 (en) | 2014-08-20 | 2016-02-25 | Darryl G. Walker | Testing and setting performance parameters in a semiconductor device and method therefor |
KR20160069230A (ko) * | 2014-12-08 | 2016-06-16 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 구동방법 |
US10141058B1 (en) | 2015-02-17 | 2018-11-27 | Darryl G. Walker | Multi-chip non-volatile semiconductor memory package including heater and sensor elements |
CN108962306A (zh) * | 2017-05-17 | 2018-12-07 | 上海磁宇信息科技有限公司 | 自动优化写电压的磁性存储器及其操作方法 |
US11798613B2 (en) * | 2018-12-10 | 2023-10-24 | Etron Technology, Inc. | Dynamic memory with long retention time |
KR20210052710A (ko) * | 2019-10-30 | 2021-05-11 | 삼성전자주식회사 | 동작 온도에 기초하여 동작 주기를 조절하는 메모리 장치 |
EP4080511A3 (de) * | 2021-02-04 | 2022-12-28 | Etron Technology, Inc. | Dynamischer speicher mit langer haltezeit |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5784328A (en) * | 1996-12-23 | 1998-07-21 | Lsi Logic Corporation | Memory system including an on-chip temperature sensor for regulating the refresh rate of a DRAM array |
US6281760B1 (en) * | 1998-07-23 | 2001-08-28 | Texas Instruments Incorporated | On-chip temperature sensor and oscillator for reduced self-refresh current for dynamic random access memory |
KR100413761B1 (ko) * | 2001-05-31 | 2003-12-31 | 삼성전자주식회사 | 온도와 공정에 따라 리프레시 사이클이 조절되는 반도체메모리 장치 및 방법 |
JP2003100074A (ja) * | 2001-09-21 | 2003-04-04 | Seiko Epson Corp | 集積回路の温度変化に応じた動作制御 |
JP4021643B2 (ja) * | 2001-10-29 | 2007-12-12 | 富士通株式会社 | 温度検出機能を備えた半導体装置 |
DE10163306A1 (de) * | 2001-12-21 | 2003-04-03 | Infineon Technologies Ag | Dynamischer Speicher mit programmierbarer Auffrischfrequenz |
EP1327870B1 (de) * | 2002-01-11 | 2013-05-08 | Honda Giken Kogyo Kabushiki Kaisha | Sechsachsen-Kraftsensor |
JP2003338177A (ja) * | 2002-05-22 | 2003-11-28 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP4246977B2 (ja) * | 2002-08-29 | 2009-04-02 | 富士通マイクロエレクトロニクス株式会社 | 半導体メモリ |
JP4477429B2 (ja) * | 2003-11-05 | 2010-06-09 | 富士通マイクロエレクトロニクス株式会社 | 半導体集積回路 |
KR100611775B1 (ko) * | 2003-12-29 | 2006-08-10 | 주식회사 하이닉스반도체 | 온도변화에 따라 최적의 리프레쉬 주기를 가지는 반도체메모리 장치 |
JP4094576B2 (ja) * | 2004-03-26 | 2008-06-04 | エルピーダメモリ株式会社 | オシレータ回路 |
JP4603537B2 (ja) * | 2004-06-18 | 2010-12-22 | 富士通セミコンダクター株式会社 | 半導体装置の温度検出器および半導体記憶装置 |
JP4167632B2 (ja) * | 2004-07-16 | 2008-10-15 | エルピーダメモリ株式会社 | リフレッシュ周期発生回路及びそれを備えたdram |
JP4680566B2 (ja) * | 2004-10-26 | 2011-05-11 | 本田技研工業株式会社 | 多軸力センサチップとこれを用いた多軸力センサ |
-
2006
- 2006-05-19 JP JP2006140605A patent/JP4850578B2/ja not_active Expired - Fee Related
-
2007
- 2007-04-26 TW TW096114788A patent/TWI330367B/zh not_active IP Right Cessation
- 2007-04-27 EP EP07107117A patent/EP1858024B1/de not_active Ceased
- 2007-04-27 DE DE602007005717T patent/DE602007005717D1/de active Active
- 2007-05-08 US US11/797,817 patent/US7583553B2/en not_active Expired - Fee Related
- 2007-05-17 CN CN2007101039672A patent/CN101075478B/zh not_active Expired - Fee Related
- 2007-05-17 KR KR1020070048149A patent/KR100895190B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2007310983A (ja) | 2007-11-29 |
US20070268766A1 (en) | 2007-11-22 |
EP1858024B1 (de) | 2010-04-07 |
US7583553B2 (en) | 2009-09-01 |
KR100895190B1 (ko) | 2009-04-24 |
TW200746140A (en) | 2007-12-16 |
CN101075478A (zh) | 2007-11-21 |
KR20070112024A (ko) | 2007-11-22 |
EP1858024A1 (de) | 2007-11-21 |
JP4850578B2 (ja) | 2012-01-11 |
TWI330367B (en) | 2010-09-11 |
CN101075478B (zh) | 2010-10-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE |
|
8364 | No opposition during term of opposition |