DE602005001932D1 - Verfahren zur herstellung eines schaltungsträgers und verwendung des verfahrens - Google Patents

Verfahren zur herstellung eines schaltungsträgers und verwendung des verfahrens

Info

Publication number
DE602005001932D1
DE602005001932D1 DE602005001932T DE602005001932T DE602005001932D1 DE 602005001932 D1 DE602005001932 D1 DE 602005001932D1 DE 602005001932 T DE602005001932 T DE 602005001932T DE 602005001932 T DE602005001932 T DE 602005001932T DE 602005001932 D1 DE602005001932 D1 DE 602005001932D1
Authority
DE
Germany
Prior art keywords
dielectric
primer layer
vias
trenches
deposited onto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005001932T
Other languages
English (en)
Other versions
DE602005001932T2 (de
Inventor
Hannes P Hofmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atotech Deutschland GmbH and Co KG
Original Assignee
Atotech Deutschland GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atotech Deutschland GmbH and Co KG filed Critical Atotech Deutschland GmbH and Co KG
Publication of DE602005001932D1 publication Critical patent/DE602005001932D1/de
Application granted granted Critical
Publication of DE602005001932T2 publication Critical patent/DE602005001932T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/032—Materials
    • H05K2201/0323—Carbon
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/032—Materials
    • H05K2201/0329—Intrinsically conductive polymer [ICP]; Semiconductive polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Laser Beam Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Exchange Systems With Centralized Control (AREA)
DE602005001932T 2004-01-29 2005-01-20 Verfahren zur herstellung eines schaltungsträgers und verwendung des verfahrens Active DE602005001932T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102004005300A DE102004005300A1 (de) 2004-01-29 2004-01-29 Verfahren zum Behandeln von Trägermaterial zur Herstellung von Schltungsträgern und Anwendung des Verfahrens
DE102004005300 2004-01-29
PCT/EP2005/000698 WO2005076681A1 (en) 2004-01-29 2005-01-20 Method of manufacturing a circuit carrier and the use of the method

Publications (2)

Publication Number Publication Date
DE602005001932D1 true DE602005001932D1 (de) 2007-09-20
DE602005001932T2 DE602005001932T2 (de) 2008-04-24

Family

ID=34832500

Family Applications (2)

Application Number Title Priority Date Filing Date
DE102004005300A Withdrawn DE102004005300A1 (de) 2004-01-29 2004-01-29 Verfahren zum Behandeln von Trägermaterial zur Herstellung von Schltungsträgern und Anwendung des Verfahrens
DE602005001932T Active DE602005001932T2 (de) 2004-01-29 2005-01-20 Verfahren zur herstellung eines schaltungsträgers und verwendung des verfahrens

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE102004005300A Withdrawn DE102004005300A1 (de) 2004-01-29 2004-01-29 Verfahren zum Behandeln von Trägermaterial zur Herstellung von Schltungsträgern und Anwendung des Verfahrens

Country Status (13)

Country Link
US (1) US8927899B2 (de)
EP (1) EP1709849B1 (de)
JP (2) JP2007520070A (de)
KR (1) KR101156256B1 (de)
CN (1) CN1914965B (de)
AT (1) ATE369727T1 (de)
BR (1) BRPI0507307A (de)
CA (1) CA2549314C (de)
DE (2) DE102004005300A1 (de)
HK (1) HK1092998A1 (de)
MY (1) MY140133A (de)
TW (1) TWI403240B (de)
WO (1) WO2005076681A1 (de)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101277390B1 (ko) * 2005-05-31 2013-06-20 히다치 비아 메카닉스 가부시키가이샤 프린트 배선판의 제조방법 및 그것에 이용되는 동박을 붙인 적층판 및 처리액
JP4984502B2 (ja) * 2005-11-28 2012-07-25 凸版印刷株式会社 Ｂｇａ型キャリア基板の製造方法及びｂｇａ型キャリア基板
WO2008056403A1 (en) * 2006-11-06 2008-05-15 C. Uyemura & Co., Ltd. Direct plating method and solution for palladium conductor layer formation
US8313891B2 (en) * 2007-05-21 2012-11-20 Vectraone Technologies, Llc Printed circuits and method for making same
US7754417B2 (en) * 2007-05-21 2010-07-13 Steven Lee Dutton Printed circuits and method for making same
KR100872131B1 (ko) 2007-07-10 2008-12-08 삼성전기주식회사 인쇄회로기판 제조방법
US20090128417A1 (en) * 2007-11-16 2009-05-21 Rcd Technology, Inc. Electroless/electrolytic seed layer process
US7909977B2 (en) * 2008-03-27 2011-03-22 Intel Corporation Method of manufacturing a substrate for a microelectronic device, and substrate formed thereby
US8240036B2 (en) 2008-04-30 2012-08-14 Panasonic Corporation Method of producing a circuit board
KR101286867B1 (ko) * 2008-04-30 2013-07-17 파나소닉 주식회사 애디티브법에 의해 회로 기판를 제조하는 방법 및 이 방법에 의해 얻어진 회로 기판과 다층 회로 기판
TW200948238A (en) 2008-05-13 2009-11-16 Unimicron Technology Corp Structure and manufacturing process for circuit board
CN101610635B (zh) * 2008-06-20 2013-09-11 欣兴电子股份有限公司 线路板结构及其工艺
EP2146559A1 (de) * 2008-07-15 2010-01-20 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Verfahren zum Formen einer Struktur mit hoher Dichte
CN101686599B (zh) * 2008-09-24 2011-08-10 欣兴电子股份有限公司 线路板的线路结构及其制作方法
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
WO2010067042A1 (en) * 2008-12-13 2010-06-17 M-Solv Limited Method and apparatus for laser machining relatively narrow and relatively wide structures
CN101808475B (zh) * 2009-02-12 2012-01-18 欣兴电子股份有限公司 线路板及其制备工艺
CN101808474B (zh) * 2009-02-12 2012-05-02 欣兴电子股份有限公司 线路板及其制作工艺
TWI384925B (zh) * 2009-03-17 2013-02-01 Advanced Semiconductor Eng 內埋式線路基板之結構及其製造方法
KR101055509B1 (ko) * 2009-03-19 2011-08-08 삼성전기주식회사 전자부품 내장형 인쇄회로기판
KR101009118B1 (ko) * 2009-06-19 2011-01-18 삼성전기주식회사 랜드리스 인쇄회로기판의 제조방법
US8476530B2 (en) 2009-06-22 2013-07-02 International Business Machines Corporation Self-aligned nano-scale device with parallel plate electrodes
KR101012403B1 (ko) * 2009-10-19 2011-02-09 삼성전기주식회사 인쇄회로기판 및 그 제조방법
EP2392694A1 (de) 2010-06-02 2011-12-07 ATOTECH Deutschland GmbH Verfahren zur Ätzung von Kupfer und Kupferlegierungen
CN101949051B (zh) * 2010-08-27 2011-10-26 昆山元茂电子科技有限公司 镀通孔子篮
EP2448380A1 (de) 2010-10-26 2012-05-02 ATOTECH Deutschland GmbH Verbundtoffbaumaterial zum Einbetten eines Schaltkreises
TWI542264B (zh) * 2010-12-24 2016-07-11 Ｌｇ伊諾特股份有限公司 印刷電路板及其製造方法
TWI542260B (zh) 2010-12-24 2016-07-11 Ｌｇ伊諾特股份有限公司 印刷電路板及其製造方法
US8298943B1 (en) * 2011-05-27 2012-10-30 International Business Machines Corporation Self aligning via patterning
US8904632B2 (en) 2011-09-23 2014-12-09 Harris Corporation Method to make a multilayer circuit board with intermetallic compound and related circuit boards
EP2581469B1 (de) 2011-10-10 2015-04-15 Enthone, Inc. Wässrige Aktivierungslösung und Verfahren zur stromlosen Kupferabscheidung auf direkt laserstrukturierten Substraten
US10300658B2 (en) * 2012-05-03 2019-05-28 Apple Inc. Crack resistant plastic enclosure structures
CN103545225B (zh) * 2012-07-13 2016-12-21 欣兴电子股份有限公司 电子元件封装结构及其封装方法
US9161454B2 (en) 2012-12-24 2015-10-13 Unimicron Technology Corp. Electrical device package structure and method of fabricating the same
KR101339640B1 (ko) * 2013-04-02 2013-12-09 김한주 레이저 직접 구조화 방법
CN104219892A (zh) * 2013-05-29 2014-12-17 富葵精密组件(深圳)有限公司 电路板制作方法
US9646854B2 (en) * 2014-03-28 2017-05-09 Intel Corporation Embedded circuit patterning feature selective electroless copper plating
CN109828700B (zh) * 2014-03-31 2023-05-23 宸盛光电有限公司 电容式触控装置及其制作方法
CN104113980B (zh) * 2014-06-13 2017-06-30 梅州鼎泰电路板有限公司 一种钻孔后可直接进行导电处理的pcb板
WO2016180944A1 (en) 2015-05-13 2016-11-17 Atotech Deutschland Gmbh Method for manufacturing of fine line circuitry
US20170027070A1 (en) * 2015-07-23 2017-01-26 Magna Closures Inc. Housing assembly of a power operated device and method of manufacturing thereof
KR102579880B1 (ko) 2016-05-12 2023-09-18 삼성전자주식회사 인터포저, 반도체 패키지, 및 인터포저의 제조 방법
WO2020215225A1 (zh) * 2019-04-23 2020-10-29 庆鼎精密电子（淮安）有限公司 电路板及其制作方法
EP4018791A1 (de) * 2019-08-19 2022-06-29 Atotech Deutschland GmbH & Co. KG Verfahren zur herstellung einer leiterplatte mit hoher dichte und mit kupfer gefüllter mikrovias
EP4018790A1 (de) * 2019-08-19 2022-06-29 Atotech Deutschland GmbH & Co. KG Fertigungssequenzen für hochdichte verbindungsleiterplatten und hochdichte verbindungsleiterplatte
US11533809B2 (en) 2019-10-11 2022-12-20 Schlumberger Technology Corporation Three dimensional printed resistor for downhole applications
US11523513B2 (en) * 2019-10-11 2022-12-06 Schlumberger Technology Corporation Passive component adapter for downhole application
DE102020122903A1 (de) 2020-09-02 2022-03-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Verfahren zur Strukturierung von Metallschichten durch elektrochemisches Abtragen
DE102020127452B4 (de) 2020-10-19 2024-01-11 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Verfahren zur Strukturierung von Metallschichten durch elektrochemisches Abtragen
CN112165767B (zh) * 2020-10-27 2021-12-07 惠州市特创电子科技股份有限公司 多层线路板以及移动通讯装置
CN117238781B (zh) * 2023-11-16 2024-02-23 江苏芯德半导体科技有限公司 一种晶圆级超薄四边无引脚芯片封装方法及芯片封装结构

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4651417A (en) * 1984-10-23 1987-03-24 New West Technology Corporation Method for forming printed circuit board
JPS61224391A (ja) * 1985-03-28 1986-10-06 株式会社　ヤマトヤ商会 プリント配線板の作成方法およびプリント配線板
JP2536588B2 (ja) 1988-04-25 1996-09-18 三菱電機株式会社 分解除去装置
US5382315A (en) 1991-02-11 1995-01-17 Microelectronics And Computer Technology Corporation Method of forming etch mask using particle beam deposition
JP3212405B2 (ja) 1992-07-20 2001-09-25 富士通株式会社 エキシマレーザ加工方法及び装置
EP0677985B1 (de) * 1994-04-14 1999-05-26 Hewlett-Packard GmbH Verfahren zur Herstellung von Leiterplatten
US5577309A (en) * 1995-03-01 1996-11-26 Texas Instruments Incorporated Method for forming electrical contact to the optical coating of an infrared detector
DE19620095B4 (de) 1996-05-18 2006-07-06 Tamm, Wilhelm, Dipl.-Ing. (FH) Verfahren zur Herstellung von Leiterplatten
DE19625386A1 (de) 1996-06-25 1998-01-02 Siemens Ag Verfahren zur Herstellung einer Leiterplatte
JPH1075038A (ja) * 1996-06-28 1998-03-17 Ngk Spark Plug Co Ltd 配線基板とその製造方法
US5774340A (en) * 1996-08-28 1998-06-30 International Business Machines Corporation Planar redistribution structure and printed wiring device
US5759427A (en) 1996-08-28 1998-06-02 International Business Machines Corporation Method and apparatus for polishing metal surfaces
JP3811233B2 (ja) 1996-10-24 2006-08-16 互応化学工業株式会社 スルーホール付きプリント配線板の製造方法
JP3149808B2 (ja) 1997-02-10 2001-03-26 松下電器産業株式会社 回路形成基板の製造方法
DE19740431C1 (de) 1997-09-11 1998-11-12 Atotech Deutschland Gmbh Verfahren zum Metallisieren eines elektrisch nichtleitende Oberflächenbereiche aufweisenden Substrats
FI982568A (fi) * 1997-12-02 1999-06-03 Samsung Electro Mech Menetelmä monikerroksisen painetun piirilevyn valmistamiseksi
US6240636B1 (en) * 1998-04-01 2001-06-05 Mitsui Mining & Smelting Co., Ltd. Method for producing vias in the manufacture of printed circuit boards
US5968333A (en) 1998-04-07 1999-10-19 Advanced Micro Devices, Inc. Method of electroplating a copper or copper alloy interconnect
JP2000013022A (ja) 1998-06-24 2000-01-14 Shinko Electric Ind Co Ltd 多層配線回路基板及びその製造方法
JP3221427B2 (ja) 1999-01-20 2001-10-22 日本電気株式会社 Ｑスイッチレーザによる穴あけ加工方法
JP3790063B2 (ja) * 1999-03-08 2006-06-28 新光電気工業株式会社 多層配線基板及びその製造方法並びに半導体装置
DE19910482A1 (de) * 1999-03-10 2000-05-04 Stp Elektronische Systeme Gmbh Verfahren zur Herstellung von Leiterplatten-Schaltungsebenen
KR100437526B1 (ko) * 1999-11-10 2004-06-30 마츠시다 덴코 가부시키가이샤 에어로겔 기판 및 그 제조방법
JP3594894B2 (ja) 2000-02-01 2004-12-02 新光電気工業株式会社 ビアフィリングめっき方法
JP2002185137A (ja) 2000-12-11 2002-06-28 Toyota Industries Corp 多層配線基板の製造方法
US6730857B2 (en) * 2001-03-13 2004-05-04 International Business Machines Corporation Structure having laser ablated features and method of fabricating
KR20040005896A (ko) * 2001-03-26 2004-01-16 닛뽕 뻬인또 가부시키가이샤 금속 패턴의 형성 방법
US20020175402A1 (en) * 2001-05-23 2002-11-28 Mccormack Mark Thomas Structure and method of embedding components in multi-layer substrates
US6815709B2 (en) * 2001-05-23 2004-11-09 International Business Machines Corporation Structure having flush circuitry features and method of making
US6967124B1 (en) 2001-06-19 2005-11-22 Amkor Technology, Inc. Imprinted integrated circuit substrate and method for imprinting an integrated circuit substrate
US6987661B1 (en) 2001-06-19 2006-01-17 Amkor Technology, Inc. Integrated circuit substrate having embedded passive components and methods therefor
US7334326B1 (en) 2001-06-19 2008-02-26 Amkor Technology, Inc. Method for making an integrated circuit substrate having embedded passive components
US6930256B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
WO2003009657A1 (en) * 2001-07-19 2003-01-30 Toray Industries, Inc. Circuit board, circuit board-use member and production method therefor and method of laminating fexible film
JP5028722B2 (ja) 2001-07-31 2012-09-19 三菱電機株式会社 レーザ加工方法及びレーザ加工機
JP2003204140A (ja) * 2002-01-10 2003-07-18 Sony Corp 配線基板の製造方法、多層配線基板の製造方法および多層配線基板
KR20030080546A (ko) * 2002-04-09 2003-10-17 삼성전기주식회사 다층 인쇄회로기판의 제조방법
US6930257B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laminated laser-embedded circuit layers
US7028400B1 (en) 2002-05-01 2006-04-18 Amkor Technology, Inc. Integrated circuit substrate having laser-exposed terminals
US7399661B2 (en) 2002-05-01 2008-07-15 Amkor Technology, Inc. Method for making an integrated circuit substrate having embedded back-side access conductors and vias
US7670962B2 (en) 2002-05-01 2010-03-02 Amkor Technology, Inc. Substrate having stiffener fabrication method
US20080043447A1 (en) 2002-05-01 2008-02-21 Amkor Technology, Inc. Semiconductor package having laser-embedded terminals
DE10228716A1 (de) * 2002-06-27 2004-01-29 Carl Freudenberg Kg Verfahren zur Herstellung eines flächigen Schaltungsträgers

Also Published As

Publication number Publication date
DE102004005300A1 (de) 2005-09-08
KR101156256B1 (ko) 2012-06-13
EP1709849A1 (de) 2006-10-11
JP2013065874A (ja) 2013-04-11
CN1914965B (zh) 2011-03-30
EP1709849B1 (de) 2007-08-08
JP5568618B2 (ja) 2014-08-06
CA2549314A1 (en) 2005-08-18
CA2549314C (en) 2013-03-12
DE602005001932T2 (de) 2008-04-24
HK1092998A1 (en) 2007-02-16
ATE369727T1 (de) 2007-08-15
TWI403240B (zh) 2013-07-21
WO2005076681A1 (en) 2005-08-18
BRPI0507307A (pt) 2007-06-26
MY140133A (en) 2009-11-30
JP2007520070A (ja) 2007-07-19
US20070163887A1 (en) 2007-07-19
TW200539774A (en) 2005-12-01
CN1914965A (zh) 2007-02-14
KR20060133544A (ko) 2006-12-26
US8927899B2 (en) 2015-01-06

Similar Documents

Publication Publication Date Title
DE602005001932D1 (de) Verfahren zur herstellung eines schaltungsträgers und verwendung des verfahrens
ATE541320T1 (de) Beleuchter und verfahren zur herstellung eines derartigen beleuchters
WO2010059441A3 (en) Methods of forming a masking pattern for integrated circuits
WO2006033852A3 (en) Structured surface using ablatable radiation sensitive material
DE602005004586D1 (de) Substrat mit hoher Zuverlässigkeit der elektrischen Verbindung einer mit Verdrahtungen verbundenen Durchkontaktierung und Verfahren zur Herstellung desselben
WO2005039868A3 (de) Strukturierung von elektrischen funktionsschichten mittels einer transferfolie und strukturierung des klebers
TW200616513A (en) Forming electrical conductors on a substrate
EP4344794A3 (de) Verfahren zur herstellung von platten und dadurch erhaltene platte
WO2007142788A3 (en) Laser ablation resist
DE602005022701D1 (de) Verfahren zur herstellung von mehrschichtigen cholesterischen optischen flüssigkristallkörpern
TW200632391A (en) Methods of forming optical devices
ATE490037T1 (de) Verfahren zur herstellung einer mikronadel oder eines mikroimplantats
EP1355519A3 (de) Verbessertes Verfahren zum Einbetten von Dickschichtkomponenten
DE602005008346D1 (de) Organische lichtemittierende Vorrichtung mit einer Kathode, die eine Magnesium-Calcium Schicht enthält und Verfahren zur Herstellung dieser Vorrichtung
DE69935333D1 (de) Verbessertes verfahren zur herstellung leitender spuren und so hergestellte gedruckte leiterplatten
EP1950587A3 (de) Verfahren zur Herstellung von Leiterplatten mit eingebetteten optischen Wellenleitern
WO2007140388A3 (en) Ablation based laser machining of biomolecule patterns on substrates
ATE228753T1 (de) Verfahren zum einbringen von durchkontaktierungslöchern in ein beidseitig mit metallschichten versehenes, elektrisch isolierendes basismaterial
ATE380066T1 (de) Verfahren zur herstellung von membranen
ATE407098T1 (de) Verfahren zur herstellung von mustern auf einer substratfläche
SG147418A1 (en) Method of forming an in-situ recessed structure
DE60239007D1 (de) Verfahren zur herstellung eines kontinuierlichen überzugs an der oberfläche eines bauteils
DE502004003175D1 (de) Verfahren zur herstellung einer multifunktionellen dielektrikumsschicht auf einem substrat
ATE375703T1 (de) Mehrschichtige schaltungsanordnung und verfahren zu deren herstellung
EP1696481A3 (de) Verfahren zur Integration eines elektronischen Bauteils in einer Substratkavität

Legal Events

Date Code Title Description
8364 No opposition during term of opposition