ATE375703T1 - Mehrschichtige schaltungsanordnung und verfahren zu deren herstellung - Google Patents

Mehrschichtige schaltungsanordnung und verfahren zu deren herstellung

Info

Publication number
ATE375703T1
ATE375703T1 AT03783214T AT03783214T ATE375703T1 AT E375703 T1 ATE375703 T1 AT E375703T1 AT 03783214 T AT03783214 T AT 03783214T AT 03783214 T AT03783214 T AT 03783214T AT E375703 T1 ATE375703 T1 AT E375703T1
Authority
AT
Austria
Prior art keywords
layer circuit
substrate
production
circuit arrangement
processes
Prior art date
Application number
AT03783214T
Other languages
English (en)
Inventor
Kevin Olson
Alan Wang
Original Assignee
Ppg Ind Ohio Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ppg Ind Ohio Inc filed Critical Ppg Ind Ohio Inc
Application granted granted Critical
Publication of ATE375703T1 publication Critical patent/ATE375703T1/de

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D5/00—Coating compositions, e.g. paints, varnishes or lacquers, characterised by their physical nature or the effects produced; Filling pastes
    • C09D5/44—Coating compositions, e.g. paints, varnishes or lacquers, characterised by their physical nature or the effects produced; Filling pastes for electrophoretic applications
    • C09D5/4488—Cathodic paints
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09554—Via connected to metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0582—Coating by resist, i.e. resist used as mask for application of insulating coating or of second resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1333—Deposition techniques, e.g. coating
    • H05K2203/135—Electrophoretic deposition of insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4608—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated comprising an electrically conductive base or core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Organic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
AT03783214T 2002-11-08 2003-11-07 Mehrschichtige schaltungsanordnung und verfahren zu deren herstellung ATE375703T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/291,876 US7228623B2 (en) 2001-03-08 2002-11-08 Process for fabricating a multi layer circuit assembly

Publications (1)

Publication Number Publication Date
ATE375703T1 true ATE375703T1 (de) 2007-10-15

Family

ID=32312132

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03783214T ATE375703T1 (de) 2002-11-08 2003-11-07 Mehrschichtige schaltungsanordnung und verfahren zu deren herstellung

Country Status (11)

Country Link
US (1) US7228623B2 (de)
EP (1) EP1561368B1 (de)
KR (1) KR100718393B1 (de)
CN (1) CN1711811A (de)
AT (1) ATE375703T1 (de)
AU (1) AU2003290633A1 (de)
CA (1) CA2505315C (de)
DE (1) DE60316832T2 (de)
ES (1) ES2294343T3 (de)
TW (1) TWI321431B (de)
WO (1) WO2004045262A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005048774B4 (de) * 2005-10-07 2009-04-02 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Substrat, das zumindest bereichsweise an einer Oberfläche mit einer Beschichtung eines Metalls versehen ist, sowie dessen Verwendung
US7867688B2 (en) * 2006-05-30 2011-01-11 Eastman Kodak Company Laser ablation resist
US8008188B2 (en) * 2007-06-11 2011-08-30 Ppg Industries Ohio, Inc. Method of forming solid blind vias through the dielectric coating on high density interconnect substrate materials
US20080302564A1 (en) * 2007-06-11 2008-12-11 Ppg Industries Ohio, Inc. Circuit assembly including a metal core substrate and process for preparing the same
DE112009000008T5 (de) * 2008-03-14 2010-09-30 Murata Mfg. Co., Ltd., Nagaokakyo-shi Verfahren zum Glätten einer Elektrode, Verfahren zum Herstellen eines Keramiksubstrats und Keramiksubstrat
US8441775B2 (en) * 2009-12-15 2013-05-14 Empire Technology Development, Llc Conformal deposition of dielectric composites by eletrophoresis
CN106471158B (zh) * 2014-06-23 2019-05-31 惠普发展公司有限责任合伙企业 制造多层涂层的方法以及涂覆的基材
EP3269215B1 (de) * 2015-03-12 2020-04-22 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Leiterplatte und herstellungsverfahren dieser leiterplatte

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3451793A (en) 1966-02-12 1969-06-24 Toko Inc Magnetic thin film wire with multiple laminated film coating
US3469982A (en) 1968-09-11 1969-09-30 Jack Richard Celeste Process for making photoresists
US3738835A (en) 1971-10-21 1973-06-12 Ibm Electrophoretic photoresist composition and a method of forming etch resistant masks
US3934334A (en) 1974-04-15 1976-01-27 Texas Instruments Incorporated Method of fabricating metal printed wiring boards
US4137211A (en) 1977-05-24 1979-01-30 International Business Machines Corporation Wire coating solution
US4343885A (en) 1978-05-09 1982-08-10 Dynachem Corporation Phototropic photosensitive compositions containing fluoran colorformer
US4378264A (en) 1980-05-27 1983-03-29 E. I. Du Pont De Nemours And Company Integrated laminating process
US4457956A (en) * 1980-08-11 1984-07-03 Union Carbide Corporation Method for autodeposition onto a non-metallic surface
US4592816A (en) 1984-09-26 1986-06-03 Rohm And Haas Company Electrophoretic deposition process
US5065227A (en) 1990-06-04 1991-11-12 International Business Machines Corporation Integrated circuit packaging using flexible substrate
US5298685A (en) 1990-10-30 1994-03-29 International Business Machines Corporation Interconnection method and structure for organic circuit boards
US5129142A (en) * 1990-10-30 1992-07-14 International Business Machines Corporation Encapsulated circuitized power core alignment and lamination
US5229550A (en) * 1990-10-30 1993-07-20 International Business Machines Corporation Encapsulated circuitized power core alignment and lamination
US5166037A (en) * 1991-02-14 1992-11-24 International Business Machines Corporation Method of additive circuitization of circuit boards with high adhesion, voidless copper leads
KR940007461B1 (ko) 1991-05-16 1994-08-18 금성일렉트론 주식회사 코일이 집적된 반도체 장치
US5153986A (en) 1991-07-17 1992-10-13 International Business Machines Method for fabricating metal core layers for a multi-layer circuit board
US5242780A (en) 1991-10-18 1993-09-07 Industrial Technology Research Institute Electrophoretic positive working photosensitive composition comprising as the photosensitive ingredient an aliphatic polyester having o-quinone diazide on the side chain and end groups
US5224265A (en) 1991-10-29 1993-07-06 International Business Machines Corporation Fabrication of discrete thin film wiring structures
US5232548A (en) 1991-10-29 1993-08-03 International Business Machines Corporation Discrete fabrication of multi-layer thin film, wiring structures
US5291066A (en) 1991-11-14 1994-03-01 General Electric Company Moisture-proof electrical circuit high density interconnect module and method for making same
US5224548A (en) * 1991-12-26 1993-07-06 Dankovich Ii Kalman E Apparatus and method for retrieving lost materials in slanted boreholes
US5374344A (en) * 1993-07-27 1994-12-20 International Business Machines, Inc. Method and apparatus for electrodeposition of a metallurgically bondable circuitized flexible substrate
US5590460A (en) 1994-07-19 1997-01-07 Tessera, Inc. Method of making multilayer circuit
US5574630A (en) * 1995-05-11 1996-11-12 International Business Machines Corporation Laminated electronic package including a power/ground assembly
US5879808A (en) 1995-10-27 1999-03-09 Alpha Metals, Inc. Parylene polymer layers
US6147870A (en) * 1996-01-05 2000-11-14 Honeywell International Inc. Printed circuit assembly having locally enhanced wiring density
US5830374A (en) 1996-09-05 1998-11-03 International Business Machines Corporation Method for producing multi-layer circuit board and resulting article of manufacture
US5847327A (en) 1996-11-08 1998-12-08 W.L. Gore & Associates, Inc. Dimensionally stable core for use in high density chip packages
US6105243A (en) 1996-12-05 2000-08-22 International Business Machines, Corp. Method of fabricating multilayer printed circuit board
JP3244024B2 (ja) 1997-06-20 2002-01-07 日本電気株式会社 半導体装置の製造方法
JP4067604B2 (ja) 1997-08-20 2008-03-26 松下電器産業株式会社 回路形成基板および回路形成基板の製造方法
US6090474A (en) 1998-09-01 2000-07-18 International Business Machines Corporation Flowable compositions and use in filling vias and plated through-holes
JP3629375B2 (ja) 1998-11-27 2005-03-16 新光電気工業株式会社 多層回路基板の製造方法
US6671950B2 (en) 2001-03-08 2004-01-06 Ppg Industries Ohio, Inc. Multi-layer circuit assembly and process for preparing the same

Also Published As

Publication number Publication date
CN1711811A (zh) 2005-12-21
CA2505315C (en) 2010-02-02
US7228623B2 (en) 2007-06-12
WO2004045262A1 (en) 2004-05-27
DE60316832T2 (de) 2008-07-17
ES2294343T3 (es) 2008-04-01
DE60316832D1 (de) 2007-11-22
KR100718393B1 (ko) 2007-05-14
AU2003290633A1 (en) 2004-06-03
US20030140490A1 (en) 2003-07-31
KR20050084990A (ko) 2005-08-29
EP1561368B1 (de) 2007-10-10
TWI321431B (en) 2010-03-01
CA2505315A1 (en) 2004-05-27
TW200414852A (en) 2004-08-01
EP1561368A1 (de) 2005-08-10

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