DE112006002913B4 - Speicherzelle, Verfahren zu ihrer Herstellung und Speicherzellenmatrix - Google Patents

Speicherzelle, Verfahren zu ihrer Herstellung und Speicherzellenmatrix Download PDF

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Publication number
DE112006002913B4
DE112006002913B4 DE112006002913.4T DE112006002913T DE112006002913B4 DE 112006002913 B4 DE112006002913 B4 DE 112006002913B4 DE 112006002913 T DE112006002913 T DE 112006002913T DE 112006002913 B4 DE112006002913 B4 DE 112006002913B4
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Germany
Prior art keywords
memory cell
thyristor
matrix
substrate
conductive plug
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DE112006002913.4T
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German (de)
English (en)
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DE112006002913T5 (de
Inventor
Chandra Mouli
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Micron Technology Inc
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Micron Technology Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H10B99/20—Subject matter not provided for in other groups of this subclass comprising memory cells having thyristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors
    • H10D18/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/80—PNPN diodes, e.g. Shockley diodes or break-over diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Thyristors (AREA)
DE112006002913.4T 2005-10-31 2006-09-26 Speicherzelle, Verfahren zu ihrer Herstellung und Speicherzellenmatrix Active DE112006002913B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/263,254 US7655973B2 (en) 2005-10-31 2005-10-31 Recessed channel negative differential resistance-based memory cell
US11/263,254 2005-10-31
PCT/US2006/037750 WO2007055817A2 (en) 2005-10-31 2006-09-26 Recessed channel negative differential resistance-based memory cell

Publications (2)

Publication Number Publication Date
DE112006002913T5 DE112006002913T5 (de) 2008-09-25
DE112006002913B4 true DE112006002913B4 (de) 2015-09-17

Family

ID=37995128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112006002913.4T Active DE112006002913B4 (de) 2005-10-31 2006-09-26 Speicherzelle, Verfahren zu ihrer Herstellung und Speicherzellenmatrix

Country Status (7)

Country Link
US (4) US7655973B2 (enExample)
JP (1) JP4893971B2 (enExample)
KR (1) KR100989772B1 (enExample)
CN (2) CN101300665B (enExample)
DE (1) DE112006002913B4 (enExample)
TW (1) TWI334139B (enExample)
WO (1) WO2007055817A2 (enExample)

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US8035126B2 (en) * 2007-10-29 2011-10-11 International Business Machines Corporation One-transistor static random access memory with integrated vertical PNPN device
US8138541B2 (en) * 2009-07-02 2012-03-20 Micron Technology, Inc. Memory cells
US8021943B2 (en) * 2009-11-25 2011-09-20 International Business Machines Corporation Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology
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CN101814503B (zh) * 2010-04-08 2012-05-23 复旦大学 一种互补栅控pnpn场效应晶体管及其制造方法
US8535992B2 (en) 2010-06-29 2013-09-17 Micron Technology, Inc. Thyristor random access memory device and method
US8455919B2 (en) * 2010-07-19 2013-06-04 Micron Technology, Inc. High density thyristor random access memory device and method
DE102011009373B4 (de) * 2011-01-25 2017-08-03 Austriamicrosystems Ag Fotodiodenbauelement
US8525245B2 (en) 2011-04-21 2013-09-03 International Business Machines Corporation eDRAM having dynamic retention and performance tradeoff
US8816470B2 (en) 2011-04-21 2014-08-26 International Business Machines Corporation Independently voltage controlled volume of silicon on a silicon on insulator chip
US8492207B2 (en) 2011-04-21 2013-07-23 International Business Machines Corporation Implementing eFuse circuit with enhanced eFuse blow operation
US8456187B2 (en) 2011-04-21 2013-06-04 International Business Machines Corporation Implementing temporary disable function of protected circuitry by modulating threshold voltage of timing sensitive circuit
US8541773B2 (en) * 2011-05-02 2013-09-24 Intel Corporation Vertical tunneling negative differential resistance devices
JP2012256390A (ja) * 2011-06-08 2012-12-27 Elpida Memory Inc 半導体装置
CN102842340B (zh) * 2011-06-22 2015-09-23 中国科学院微电子研究所 基于pnpn结构的sram电路及其读写方法
US8609492B2 (en) 2011-07-27 2013-12-17 Micron Technology, Inc. Vertical memory cell
US8853021B2 (en) 2011-10-13 2014-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded transistor
US9634134B2 (en) 2011-10-13 2017-04-25 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded transistor
US11315931B2 (en) 2011-10-13 2022-04-26 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded transistor
US8633564B2 (en) 2011-12-02 2014-01-21 Micron Technology, Inc. Semicondutor isolation structure
KR20130072524A (ko) * 2011-12-22 2013-07-02 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
KR101862345B1 (ko) 2012-02-27 2018-07-05 삼성전자주식회사 모오스 전계효과 트랜지스터를 포함하는 반도체 장치 및 그 제조 방법
KR20130138045A (ko) * 2012-06-08 2013-12-18 국립대학법인 울산과학기술대학교 산학협력단 Ｎｄｒ 소자 및 그 제작공정
CN104425388B (zh) * 2013-09-06 2017-04-05 苏州东微半导体有限公司 一种半浮栅器件的制造方法及器件
US9553171B2 (en) * 2014-02-14 2017-01-24 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (FinFET) device and method for forming the same
US20150333068A1 (en) 2014-05-14 2015-11-19 Globalfoundries Singapore Pte. Ltd. Thyristor random access memory
US9773681B2 (en) * 2015-06-05 2017-09-26 Vanguard International Semiconductor Corporation Semiconductor device with a trench and method for manufacturing the same
FR3038774B1 (fr) * 2015-07-08 2018-03-02 Stmicroelectronics (Rousset) Sas Procede de realisation d'un transistor haute tension a encombrement reduit, et circuit integre correspondant
US9899390B2 (en) * 2016-02-08 2018-02-20 Kilopass Technology, Inc. Methods and systems for reducing electrical disturb effects between thyristor memory cells using heterostructured cathodes
JP2017174906A (ja) * 2016-03-22 2017-09-28 富士ゼロックス株式会社 発光部品、プリントヘッド及び画像形成装置
KR101928629B1 (ko) 2016-12-01 2018-12-12 한양대학교 산학협력단 2단자 수직형 1t-디램 및 그 제조 방법
WO2019245702A1 (en) * 2018-06-19 2019-12-26 Applied Materials, Inc. Pulsed plasma deposition etch step coverage improvement
KR102552464B1 (ko) 2018-11-19 2023-07-06 삼성전자 주식회사 반도체 소자
KR102156685B1 (ko) 2018-11-27 2020-09-16 한양대학교 산학협력단 2단자 수직형 사이리스터 기반 1t 디램
FR3095891B1 (fr) * 2019-05-09 2023-01-13 St Microelectronics Sa Circuit électronique
US11183095B2 (en) * 2019-12-31 2021-11-23 Micron Technology, Inc. Dynamic screen refresh rate for an electronic device

Citations (4)

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US20010024841A1 (en) * 1998-05-13 2001-09-27 Noble Wendell P. High density vertical sram cell using bipolar latchup induced by gated diode breakdown
US20020195665A1 (en) * 2001-03-14 2002-12-26 Chartered Semiconductor Manufacturing Ltd. Novel umos-like gate-controlled thyristor structure for ESD protection
US20050093147A1 (en) * 2003-10-29 2005-05-05 Taiwan Semiconductor Manufacturing Co. Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same
US7081378B2 (en) * 2004-01-05 2006-07-25 Chartered Semiconductor Manufacturing Ltd. Horizontal TRAM and method for the fabrication thereof

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US20010024841A1 (en) * 1998-05-13 2001-09-27 Noble Wendell P. High density vertical sram cell using bipolar latchup induced by gated diode breakdown
US20020195665A1 (en) * 2001-03-14 2002-12-26 Chartered Semiconductor Manufacturing Ltd. Novel umos-like gate-controlled thyristor structure for ESD protection
US20050093147A1 (en) * 2003-10-29 2005-05-05 Taiwan Semiconductor Manufacturing Co. Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same
US7081378B2 (en) * 2004-01-05 2006-07-25 Chartered Semiconductor Manufacturing Ltd. Horizontal TRAM and method for the fabrication thereof

Also Published As

Publication number Publication date
JP4893971B2 (ja) 2012-03-07
US7915673B2 (en) 2011-03-29
WO2007055817A3 (en) 2007-07-05
US20130140601A1 (en) 2013-06-06
JP2009514212A (ja) 2009-04-02
US20100133607A1 (en) 2010-06-03
CN102339856A (zh) 2012-02-01
CN101300665A (zh) 2008-11-05
US8119459B2 (en) 2012-02-21
TWI334139B (en) 2010-12-01
US20110151629A1 (en) 2011-06-23
TW200731259A (en) 2007-08-16
US7655973B2 (en) 2010-02-02
CN102339856B (zh) 2016-02-24
DE112006002913T5 (de) 2008-09-25
CN101300665B (zh) 2011-12-07
WO2007055817A2 (en) 2007-05-18
KR100989772B1 (ko) 2010-10-26
KR20080066742A (ko) 2008-07-16
US20070096203A1 (en) 2007-05-03
US8686494B2 (en) 2014-04-01

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