DE10224003B4 - Halbleitervorrichtung und Verfahren für ihre Herstellung - Google Patents
Halbleitervorrichtung und Verfahren für ihre Herstellung Download PDFInfo
- Publication number
- DE10224003B4 DE10224003B4 DE10224003A DE10224003A DE10224003B4 DE 10224003 B4 DE10224003 B4 DE 10224003B4 DE 10224003 A DE10224003 A DE 10224003A DE 10224003 A DE10224003 A DE 10224003A DE 10224003 B4 DE10224003 B4 DE 10224003B4
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor substrate
- trench
- conductive film
- main surface
- type impurity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/051—Manufacture or treatment of isolation region based on field-effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/50—Isolation regions based on field-effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
Landscapes
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001-332172 | 2001-10-30 | ||
| JP2001332172A JP3701227B2 (ja) | 2001-10-30 | 2001-10-30 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE10224003A1 DE10224003A1 (de) | 2003-05-15 |
| DE10224003B4 true DE10224003B4 (de) | 2011-06-16 |
Family
ID=19147629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE10224003A Expired - Lifetime DE10224003B4 (de) | 2001-10-30 | 2002-05-29 | Halbleitervorrichtung und Verfahren für ihre Herstellung |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6909142B2 (https=) |
| JP (1) | JP3701227B2 (https=) |
| KR (1) | KR100500096B1 (https=) |
| DE (1) | DE10224003B4 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7638841B2 (en) | 2003-05-20 | 2009-12-29 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
| JP2005101334A (ja) * | 2003-09-25 | 2005-04-14 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
| JP5135663B2 (ja) * | 2004-10-21 | 2013-02-06 | 富士電機株式会社 | 半導体装置およびその製造方法 |
| JP4825424B2 (ja) * | 2005-01-18 | 2011-11-30 | 株式会社東芝 | 電力用半導体装置 |
| KR101296984B1 (ko) | 2005-06-10 | 2013-08-14 | 페어차일드 세미컨덕터 코포레이션 | 전하 균형 전계 효과 트랜지스터 |
| US7560787B2 (en) * | 2005-12-22 | 2009-07-14 | Fairchild Semiconductor Corporation | Trench field plate termination for power devices |
| EP2357670B1 (en) | 2008-12-10 | 2015-04-01 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device |
| JP5601863B2 (ja) * | 2010-03-29 | 2014-10-08 | 三菱電機株式会社 | 電力半導体装置 |
| US8264047B2 (en) * | 2010-05-10 | 2012-09-11 | Infineon Technologies Austria Ag | Semiconductor component with a trench edge termination |
| JP2013055347A (ja) * | 2012-11-08 | 2013-03-21 | Sanken Electric Co Ltd | 半導体装置 |
| KR20150078449A (ko) | 2013-12-30 | 2015-07-08 | 현대자동차주식회사 | 반도체 소자 및 그 제조 방법 |
| CN108133966B (zh) * | 2018-01-22 | 2024-07-05 | 芯合半导体(合肥)有限公司 | 一种集成了周边RC snubber结构的碳化硅SBD器件元胞结构 |
| JP7337619B2 (ja) | 2019-09-17 | 2023-09-04 | 株式会社東芝 | 半導体装置 |
| JP7280213B2 (ja) | 2020-03-04 | 2023-05-23 | 株式会社東芝 | 半導体装置 |
| JP7334678B2 (ja) * | 2020-06-04 | 2023-08-29 | 三菱電機株式会社 | 半導体装置 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5614751A (en) * | 1995-01-10 | 1997-03-25 | Siliconix Incorporated | Edge termination structure for power MOSFET |
| US5877528A (en) * | 1997-03-03 | 1999-03-02 | Megamos Corporation | Structure to provide effective channel-stop in termination areas for trenched power transistors |
| WO2000042665A1 (de) * | 1999-01-11 | 2000-07-20 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Mos-leistungsbauelement und verfahren zum herstellen desselben |
| US6100572A (en) * | 1997-03-20 | 2000-08-08 | International Rectifier Corp. | Amorphous silicon combined with resurf region for termination for MOSgated device |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5168331A (en) * | 1991-01-31 | 1992-12-01 | Siliconix Incorporated | Power metal-oxide-semiconductor field effect transistor |
| JPH04328860A (ja) * | 1991-04-30 | 1992-11-17 | Hitachi Ltd | 半導体集積回路装置及びその製造方法 |
| US5233215A (en) * | 1992-06-08 | 1993-08-03 | North Carolina State University At Raleigh | Silicon carbide power MOSFET with floating field ring and floating field plate |
| US5316959A (en) * | 1992-08-12 | 1994-05-31 | Siliconix, Incorporated | Trenched DMOS transistor fabrication using six masks |
| JP3275536B2 (ja) * | 1994-05-31 | 2002-04-15 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
| JP3111827B2 (ja) * | 1994-09-20 | 2000-11-27 | 株式会社日立製作所 | 半導体装置及びそれを使った電力変換装置 |
| JP3424635B2 (ja) | 1994-09-20 | 2003-07-07 | 株式会社日立製作所 | 半導体装置及びそれを使った電力変換装置 |
| JPH09283754A (ja) | 1996-04-16 | 1997-10-31 | Toshiba Corp | 高耐圧半導体装置 |
| US5907776A (en) * | 1997-07-11 | 1999-05-25 | Magepower Semiconductor Corp. | Method of forming a semiconductor structure having reduced threshold voltage and high punch-through tolerance |
| US6031265A (en) * | 1997-10-16 | 2000-02-29 | Magepower Semiconductor Corp. | Enhancing DMOS device ruggedness by reducing transistor parasitic resistance and by inducing breakdown near gate runners and termination area |
| JP2000012350A (ja) * | 1998-06-22 | 2000-01-14 | Koito Mfg Co Ltd | 変圧器 |
| US5998833A (en) | 1998-10-26 | 1999-12-07 | North Carolina State University | Power semiconductor devices having improved high frequency switching and breakdown characteristics |
| EP1078402B1 (de) * | 1999-01-07 | 2006-08-30 | Infineon Technologies AG | Halbleiteranordnung mit gräben zur trennung von dotierten gebieten |
| US6413822B2 (en) * | 1999-04-22 | 2002-07-02 | Advanced Analogic Technologies, Inc. | Super-self-aligned fabrication process of trench-gate DMOS with overlying device layer |
| US6593619B1 (en) * | 1999-06-03 | 2003-07-15 | General Semiconductor, Inc. | High voltage power MOSFET having low on-resistance |
| JP2001102572A (ja) | 1999-09-29 | 2001-04-13 | Toyota Autom Loom Works Ltd | トレンチゲートを有するパワーmosトランジスタ |
| KR100343151B1 (ko) * | 1999-10-28 | 2002-07-05 | 김덕중 | Sipos를 이용한 고전압 반도체소자 및 그 제조방법 |
| US6580123B2 (en) * | 2000-04-04 | 2003-06-17 | International Rectifier Corporation | Low voltage power MOSFET device and process for its manufacture |
| US6555895B1 (en) * | 2000-07-17 | 2003-04-29 | General Semiconductor, Inc. | Devices and methods for addressing optical edge effects in connection with etched trenches |
| JP2002270844A (ja) * | 2001-03-07 | 2002-09-20 | Toshiba Corp | 半導体装置及びその製造方法 |
| US6683363B2 (en) * | 2001-07-03 | 2004-01-27 | Fairchild Semiconductor Corporation | Trench structure for semiconductor devices |
| JP3906052B2 (ja) * | 2001-10-15 | 2007-04-18 | 株式会社東芝 | 絶縁ゲート型半導体装置 |
| JP3825688B2 (ja) * | 2001-12-25 | 2006-09-27 | 株式会社東芝 | 半導体装置の製造方法 |
| US6849529B2 (en) * | 2002-10-25 | 2005-02-01 | Promos Technologies Inc. | Deep-trench capacitor with hemispherical grain silicon surface and method for making the same |
| US6908833B1 (en) * | 2003-02-14 | 2005-06-21 | National Semiconductor Corporation | Shallow self isolated doped implanted silicon process |
-
2001
- 2001-10-30 JP JP2001332172A patent/JP3701227B2/ja not_active Expired - Lifetime
-
2002
- 2002-04-29 US US10/133,422 patent/US6909142B2/en not_active Expired - Lifetime
- 2002-05-29 DE DE10224003A patent/DE10224003B4/de not_active Expired - Lifetime
- 2002-06-19 KR KR10-2002-0034338A patent/KR100500096B1/ko not_active Expired - Lifetime
-
2005
- 2005-05-06 US US11/123,192 patent/US7189620B2/en not_active Expired - Lifetime
- 2005-06-03 US US11/143,734 patent/US20050233542A1/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5614751A (en) * | 1995-01-10 | 1997-03-25 | Siliconix Incorporated | Edge termination structure for power MOSFET |
| US5877528A (en) * | 1997-03-03 | 1999-03-02 | Megamos Corporation | Structure to provide effective channel-stop in termination areas for trenched power transistors |
| US6100572A (en) * | 1997-03-20 | 2000-08-08 | International Rectifier Corp. | Amorphous silicon combined with resurf region for termination for MOSgated device |
| WO2000042665A1 (de) * | 1999-01-11 | 2000-07-20 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Mos-leistungsbauelement und verfahren zum herstellen desselben |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100500096B1 (ko) | 2005-07-11 |
| JP3701227B2 (ja) | 2005-09-28 |
| US6909142B2 (en) | 2005-06-21 |
| US20050233542A1 (en) | 2005-10-20 |
| DE10224003A1 (de) | 2003-05-15 |
| US7189620B2 (en) | 2007-03-13 |
| US20050208723A1 (en) | 2005-09-22 |
| JP2003133555A (ja) | 2003-05-09 |
| KR20030035800A (ko) | 2003-05-09 |
| US20030080375A1 (en) | 2003-05-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| R018 | Grant decision by examination section/examining division | ||
| R020 | Patent grant now final |
Effective date: 20110917 |
|
| R071 | Expiry of right |