DE102006025162B3 - Flip-Chip-Bauelement und Verfahren zur Herstellung - Google Patents

Flip-Chip-Bauelement und Verfahren zur Herstellung Download PDF

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Publication number
DE102006025162B3
DE102006025162B3 DE102006025162A DE102006025162A DE102006025162B3 DE 102006025162 B3 DE102006025162 B3 DE 102006025162B3 DE 102006025162 A DE102006025162 A DE 102006025162A DE 102006025162 A DE102006025162 A DE 102006025162A DE 102006025162 B3 DE102006025162 B3 DE 102006025162B3
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Germany
Prior art keywords
component
support frame
chip
carrier substrate
bumps
Prior art date
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Active
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DE102006025162A
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German (de)
English (en)
Inventor
Alois Stelzl
Christian Bauer
Hans Krüger
Robert Hammedinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SnapTrack Inc
Original Assignee
Epcos AG
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Filing date
Publication date
Application filed by Epcos AG filed Critical Epcos AG
Priority to DE102006025162A priority Critical patent/DE102006025162B3/de
Priority to PCT/DE2007/000970 priority patent/WO2007137568A1/de
Priority to JP2009512410A priority patent/JP5220004B2/ja
Application granted granted Critical
Publication of DE102006025162B3 publication Critical patent/DE102006025162B3/de
Priority to US12/277,927 priority patent/US7673386B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
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    • H01L23/3185Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49155Manufacturing circuit on or in base

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
DE102006025162A 2006-05-30 2006-05-30 Flip-Chip-Bauelement und Verfahren zur Herstellung Active DE102006025162B3 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE102006025162A DE102006025162B3 (de) 2006-05-30 2006-05-30 Flip-Chip-Bauelement und Verfahren zur Herstellung
PCT/DE2007/000970 WO2007137568A1 (de) 2006-05-30 2007-05-30 Flip-chip-bauelement und verfahren zur herstellung
JP2009512410A JP5220004B2 (ja) 2006-05-30 2007-05-30 フリップチップ素子及びその製造方法
US12/277,927 US7673386B2 (en) 2006-05-30 2008-11-25 Flip-chip component production method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102006025162A DE102006025162B3 (de) 2006-05-30 2006-05-30 Flip-Chip-Bauelement und Verfahren zur Herstellung

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DE102006025162B3 true DE102006025162B3 (de) 2008-01-31

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DE102006025162A Active DE102006025162B3 (de) 2006-05-30 2006-05-30 Flip-Chip-Bauelement und Verfahren zur Herstellung

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US (1) US7673386B2 (enExample)
JP (1) JP5220004B2 (enExample)
DE (1) DE102006025162B3 (enExample)
WO (1) WO2007137568A1 (enExample)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008016487A1 (de) * 2008-03-31 2009-10-01 Osram Opto Semiconductors Gmbh Optoelektronisches Halbleiterbauteil und Verfahren zur Herstellung eines optoelektronischen Halbleiterbauteils
WO2012013416A1 (de) 2010-07-28 2012-02-02 Epcos Ag Modul und herstellungsverfahren
DE102010033551A1 (de) * 2010-08-05 2012-02-09 Epcos Ag Verfahren zur Herstellung einer Mehrzahl von elektronischen Bauelementen mit elektromagnetischer Schirmung und elektronisches Bauelement mit elektromagnetischer Schirmung
WO2012079927A1 (de) * 2010-12-16 2012-06-21 Epcos Ag Gehäustes elektrisches bauelement
DE102010056431A1 (de) * 2010-12-28 2012-06-28 Epcos Ag Bauelement und Verfahren zum Herstellen eines Bauelements
US8318540B2 (en) 2008-05-19 2012-11-27 Infineon Technologies Ag Method of manufacturing a semiconductor structure
US8558356B2 (en) 2007-04-30 2013-10-15 Epcos Ag Electrical Component
US9386734B2 (en) 2010-08-05 2016-07-05 Epcos Ag Method for producing a plurality of electronic devices
DE102015204698A1 (de) * 2015-03-16 2016-09-22 Disco Corporation Verfahren zum Teilen eines Wafers
DE102015122434A1 (de) * 2015-12-21 2017-06-22 Snaptrack, Inc. MEMS Bauelement
DE102012110188B4 (de) 2011-10-27 2019-07-18 Infineon Technologies Ag Elektronische Vorrichtung
DE102019115131A1 (de) * 2019-06-05 2020-12-10 RF360 Europe GmbH Elektrisches Bauteil, elektrische Vorrichtung und Verfahren zur Herstellung einer Vielzahl von elektrischen Bauteilen

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