CN1918702B - 采用多孔载体的管芯包封 - Google Patents

采用多孔载体的管芯包封 Download PDF

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Publication number
CN1918702B
CN1918702B CN2005800043966A CN200580004396A CN1918702B CN 1918702 B CN1918702 B CN 1918702B CN 2005800043966 A CN2005800043966 A CN 2005800043966A CN 200580004396 A CN200580004396 A CN 200580004396A CN 1918702 B CN1918702 B CN 1918702B
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CN
China
Prior art keywords
adhesive
carrier
porous carrier
integrated circuit
tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN2005800043966A
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English (en)
Chinese (zh)
Other versions
CN1918702A (zh
Inventor
欧文·R.·费伊
克雷格·S.·阿姆里尼
凯文·R.·里施
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NXP USA Inc
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Freescale Semiconductor Inc
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Publication date
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Publication of CN1918702A publication Critical patent/CN1918702A/zh
Application granted granted Critical
Publication of CN1918702B publication Critical patent/CN1918702B/zh
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Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
CN2005800043966A 2004-02-09 2005-01-12 采用多孔载体的管芯包封 Expired - Fee Related CN1918702B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/774,977 2004-02-09
US10/774,977 US7015075B2 (en) 2004-02-09 2004-02-09 Die encapsulation using a porous carrier
PCT/US2005/001529 WO2005076794A2 (en) 2004-02-09 2005-01-12 Die encapsulation using a porous carrier

Publications (2)

Publication Number Publication Date
CN1918702A CN1918702A (zh) 2007-02-21
CN1918702B true CN1918702B (zh) 2010-05-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2005800043966A Expired - Fee Related CN1918702B (zh) 2004-02-09 2005-01-12 采用多孔载体的管芯包封

Country Status (6)

Country Link
US (1) US7015075B2 (enExample)
EP (1) EP1721332A2 (enExample)
JP (1) JP4555835B2 (enExample)
CN (1) CN1918702B (enExample)
TW (1) TWI389221B (enExample)
WO (1) WO2005076794A2 (enExample)

Families Citing this family (88)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930256B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
US9691635B1 (en) 2002-05-01 2017-06-27 Amkor Technology, Inc. Buildup dielectric layer having metallization pattern semiconductor package fabrication method
US7633765B1 (en) 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US7361533B1 (en) 2002-11-08 2008-04-22 Amkor Technology, Inc. Stacked embedded leadframe
US6905914B1 (en) 2002-11-08 2005-06-14 Amkor Technology, Inc. Wafer level package and fabrication method
US7723210B2 (en) 2002-11-08 2010-05-25 Amkor Technology, Inc. Direct-write wafer level chip scale package
US10811277B2 (en) 2004-03-23 2020-10-20 Amkor Technology, Inc. Encapsulated semiconductor package
US11081370B2 (en) 2004-03-23 2021-08-03 Amkor Technology Singapore Holding Pte. Ltd. Methods of manufacturing an encapsulated semiconductor device
US7572681B1 (en) 2005-12-08 2009-08-11 Amkor Technology, Inc. Embedded electronic component package
US20070212813A1 (en) * 2006-03-10 2007-09-13 Fay Owen R Perforated embedded plane package and method
US7902660B1 (en) 2006-05-24 2011-03-08 Amkor Technology, Inc. Substrate for semiconductor device and manufacturing method thereof
TWI570900B (zh) 2006-09-29 2017-02-11 半導體能源研究所股份有限公司 半導體裝置的製造方法
US8137417B2 (en) 2006-09-29 2012-03-20 Semiconductor Energy Laboratory Co., Ltd. Peeling apparatus and manufacturing apparatus of semiconductor device
US7550857B1 (en) 2006-11-16 2009-06-23 Amkor Technology, Inc. Stacked redistribution layer (RDL) die assembly package
US7588951B2 (en) * 2006-11-17 2009-09-15 Freescale Semiconductor, Inc. Method of packaging a semiconductor device and a prefabricated connector
US7696016B2 (en) * 2006-11-17 2010-04-13 Freescale Semiconductor, Inc. Method of packaging a device having a tangible element and device thereof
US7476563B2 (en) 2006-11-17 2009-01-13 Freescale Semiconductor, Inc. Method of packaging a device using a dielectric layer
US7807511B2 (en) 2006-11-17 2010-10-05 Freescale Semiconductor, Inc. Method of packaging a device having a multi-contact elastomer connector contact area and device thereof
US20080182363A1 (en) * 2007-01-31 2008-07-31 Freescale Semiconductor, Inc. Method for forming a microelectronic assembly including encapsulating a die using a sacrificial layer
TWI360207B (en) * 2007-10-22 2012-03-11 Advanced Semiconductor Eng Chip package structure and method of manufacturing
US7802359B2 (en) * 2007-12-27 2010-09-28 Freescale Semiconductor, Inc. Electronic assembly manufacturing method
US8609471B2 (en) * 2008-02-29 2013-12-17 Freescale Semiconductor, Inc. Packaging an integrated circuit die using compression molding
EP2291858B1 (en) 2008-06-26 2012-03-28 Nxp B.V. Packaged semiconductor product and method for manufacture thereof
US7741151B2 (en) * 2008-11-06 2010-06-22 Freescale Semiconductor, Inc. Integrated circuit package formation
JP5586920B2 (ja) * 2008-11-20 2014-09-10 株式会社半導体エネルギー研究所 フレキシブル半導体装置の作製方法
US7960827B1 (en) 2009-04-09 2011-06-14 Amkor Technology, Inc. Thermal via heat spreader package and method
US8623753B1 (en) 2009-05-28 2014-01-07 Amkor Technology, Inc. Stackable protruding via package and method
US8222538B1 (en) 2009-06-12 2012-07-17 Amkor Technology, Inc. Stackable via package and method
TWI456715B (zh) * 2009-06-19 2014-10-11 日月光半導體製造股份有限公司 晶片封裝結構及其製造方法
TWI466259B (zh) * 2009-07-21 2014-12-21 日月光半導體製造股份有限公司 半導體封裝件、其製造方法及重佈晶片封膠體的製造方法
TWI405306B (zh) * 2009-07-23 2013-08-11 日月光半導體製造股份有限公司 半導體封裝件、其製造方法及重佈晶片封膠體
US8471154B1 (en) 2009-08-06 2013-06-25 Amkor Technology, Inc. Stackable variable height via package and method
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
US20110084372A1 (en) * 2009-10-14 2011-04-14 Advanced Semiconductor Engineering, Inc. Package carrier, semiconductor package, and process for fabricating same
US8378466B2 (en) * 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8327532B2 (en) * 2009-11-23 2012-12-11 Freescale Semiconductor, Inc. Method for releasing a microelectronic assembly from a carrier substrate
TWI497679B (zh) * 2009-11-27 2015-08-21 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
US8372689B2 (en) * 2010-01-21 2013-02-12 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof
US8536462B1 (en) 2010-01-22 2013-09-17 Amkor Technology, Inc. Flex circuit package and method
US8320134B2 (en) * 2010-02-05 2012-11-27 Advanced Semiconductor Engineering, Inc. Embedded component substrate and manufacturing methods thereof
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8624374B2 (en) 2010-04-02 2014-01-07 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof
US8278746B2 (en) 2010-04-02 2012-10-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages including connecting elements
US8324511B1 (en) 2010-04-06 2012-12-04 Amkor Technology, Inc. Through via nub reveal method and structure
US8300423B1 (en) 2010-05-25 2012-10-30 Amkor Technology, Inc. Stackable treated via package and method
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8338229B1 (en) 2010-07-30 2012-12-25 Amkor Technology, Inc. Stackable plasma cleaned via package and method
US8440554B1 (en) 2010-08-02 2013-05-14 Amkor Technology, Inc. Through via connected backside embedded circuit features structure and method
US8717775B1 (en) 2010-08-02 2014-05-06 Amkor Technology, Inc. Fingerprint sensor package and method
US8487445B1 (en) 2010-10-05 2013-07-16 Amkor Technology, Inc. Semiconductor device having through electrodes protruding from dielectric layer
US8337657B1 (en) 2010-10-27 2012-12-25 Amkor Technology, Inc. Mechanical tape separation package and method
US8482134B1 (en) 2010-11-01 2013-07-09 Amkor Technology, Inc. Stackable package and method
US9748154B1 (en) 2010-11-04 2017-08-29 Amkor Technology, Inc. Wafer level fan out semiconductor device and manufacturing method thereof
US8525318B1 (en) 2010-11-10 2013-09-03 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8941222B2 (en) 2010-11-11 2015-01-27 Advanced Semiconductor Engineering Inc. Wafer level semiconductor package and manufacturing methods thereof
US8557629B1 (en) 2010-12-03 2013-10-15 Amkor Technology, Inc. Semiconductor device having overlapped via apertures
US8791501B1 (en) 2010-12-03 2014-07-29 Amkor Technology, Inc. Integrated passive device structure and method
US8535961B1 (en) 2010-12-09 2013-09-17 Amkor Technology, Inc. Light emitting diode (LED) package and method
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US8390130B1 (en) 2011-01-06 2013-03-05 Amkor Technology, Inc. Through via recessed reveal structure and method
US9721872B1 (en) 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US9013011B1 (en) 2011-03-11 2015-04-21 Amkor Technology, Inc. Stacked and staggered die MEMS package and method
KR101140113B1 (ko) 2011-04-26 2012-04-30 앰코 테크놀로지 코리아 주식회사 반도체 디바이스
US8653674B1 (en) 2011-09-15 2014-02-18 Amkor Technology, Inc. Electronic component package fabrication method and structure
US8633598B1 (en) 2011-09-20 2014-01-21 Amkor Technology, Inc. Underfill contacting stacking balls package fabrication method and structure
US9029962B1 (en) 2011-10-12 2015-05-12 Amkor Technology, Inc. Molded cavity substrate MEMS package fabrication method and structure
US8552548B1 (en) 2011-11-29 2013-10-08 Amkor Technology, Inc. Conductive pad on protruding through electrode semiconductor device
TWI449152B (zh) 2011-12-21 2014-08-11 財團法人工業技術研究院 半導體元件堆疊結構
JP5903920B2 (ja) * 2012-02-16 2016-04-13 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
US9129943B1 (en) 2012-03-29 2015-09-08 Amkor Technology, Inc. Embedded component package and fabrication method
US9048298B1 (en) 2012-03-29 2015-06-02 Amkor Technology, Inc. Backside warpage control structure and fabrication method
KR101429344B1 (ko) 2012-08-08 2014-08-12 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
KR20140038116A (ko) 2012-09-20 2014-03-28 제이앤제이 패밀리 주식회사 Ｌｅ ｄ 램프
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
KR101366461B1 (ko) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
KR101488590B1 (ko) 2013-03-29 2015-01-30 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
WO2015019971A1 (en) 2013-08-06 2015-02-12 Semiconductor Energy Laboratory Co., Ltd. Peeling method
TW201943069A (zh) 2013-09-06 2019-11-01 日商半導體能源研究所股份有限公司 發光裝置以及發光裝置的製造方法
KR101607981B1 (ko) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지
US9937698B2 (en) 2013-11-06 2018-04-10 Semiconductor Energy Laboratory Co., Ltd. Peeling method and light-emitting device
US10147630B2 (en) * 2014-06-11 2018-12-04 John Cleaon Moore Sectional porous carrier forming a temporary impervious support
TWI695525B (zh) 2014-07-25 2020-06-01 日商半導體能源研究所股份有限公司 剝離方法、發光裝置、模組以及電子裝置
JP6822858B2 (ja) 2016-01-26 2021-01-27 株式会社半導体エネルギー研究所 剥離の起点の形成方法及び剥離方法
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5474958A (en) * 1993-05-04 1995-12-12 Motorola, Inc. Method for making semiconductor device having no die supporting surface
US5620928A (en) * 1995-05-11 1997-04-15 National Semiconductor Corporation Ultra thin ball grid array using a flex tape or printed wiring board substrate and method
CN1337738A (zh) * 2000-08-09 2002-02-27 株式会社Kostat半导体 用于半导体封装处理的具有可注入导电区的带及其制造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918811A (en) 1986-09-26 1990-04-24 General Electric Company Multichip integrated circuit packaging method
US5032543A (en) 1988-06-17 1991-07-16 Massachusetts Institute Of Technology Coplanar packaging techniques for multichip circuits
US5250843A (en) 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
US5144747A (en) 1991-03-27 1992-09-08 Integrated System Assemblies Corporation Apparatus and method for positioning an integrated circuit chip within a multichip module
US5866952A (en) 1995-11-30 1999-02-02 Lockheed Martin Corporation High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate
US5841193A (en) 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
US5830800A (en) * 1997-04-11 1998-11-03 Compeq Manufacturing Company Ltd. Packaging method for a ball grid array integrated circuit without utilizing a base plate
DE19752195A1 (de) * 1997-11-25 1999-06-17 Siemens Ag Halbleiterelement mit einer Tragevorrichtung und einem Zuleitungsrahmen und einem damit verbundenen Halbleiterchip
KR100266138B1 (ko) * 1998-06-24 2000-09-15 윤종용 칩 스케일 패키지의 제조 방법
US6613413B1 (en) * 1999-04-26 2003-09-02 International Business Machines Corporation Porous power and ground planes for reduced PCB delamination and better reliability
US6370293B1 (en) * 1999-09-16 2002-04-09 Lucent Technologies, Inc. Flexible optical circuits having optical fibers encapsulated between porous substrates and methods for fabricating same
JP2001313350A (ja) * 2000-04-28 2001-11-09 Sony Corp チップ状電子部品及びその製造方法、並びにその製造に用いる疑似ウエーハ及びその製造方法
US6528145B1 (en) * 2000-06-29 2003-03-04 International Business Machines Corporation Polymer and ceramic composite electronic substrates
US6734534B1 (en) 2000-08-16 2004-05-11 Intel Corporation Microelectronic substrate with integrated devices
JP2002362677A (ja) * 2001-06-06 2002-12-18 Nitto Denko Corp チップ状電子部品のキャリアテープ及びその使用方法
JP4100936B2 (ja) * 2002-03-01 2008-06-11 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
JP2003303919A (ja) * 2002-04-10 2003-10-24 Hitachi Ltd 半導体装置及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5474958A (en) * 1993-05-04 1995-12-12 Motorola, Inc. Method for making semiconductor device having no die supporting surface
US5620928A (en) * 1995-05-11 1997-04-15 National Semiconductor Corporation Ultra thin ball grid array using a flex tape or printed wiring board substrate and method
CN1337738A (zh) * 2000-08-09 2002-02-27 株式会社Kostat半导体 用于半导体封装处理的具有可注入导电区的带及其制造方法

Also Published As

Publication number Publication date
US7015075B2 (en) 2006-03-21
CN1918702A (zh) 2007-02-21
TWI389221B (zh) 2013-03-11
WO2005076794A3 (en) 2006-01-19
JP2007522675A (ja) 2007-08-09
JP4555835B2 (ja) 2010-10-06
TW200531189A (en) 2005-09-16
WO2005076794A2 (en) 2005-08-25
US20050176180A1 (en) 2005-08-11
EP1721332A2 (en) 2006-11-15

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Granted publication date: 20100526

Termination date: 20170112