CN1898785B - 外延沉积的源极/漏极 - Google Patents
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Abstract
可以为金属氧化物半导体场效应晶体管形成外延沉积的源极/漏极扩展。可以形成牺牲层并且蚀刻掉所述的牺牲层来在栅电极下面底切。然后，可以沉积外延硅的源极/漏极扩展以在所述栅电极的边缘下面延伸。由此，通过控制牺牲材料的蚀刻，可以控制源极/漏极扩展在栅极下面延伸的程度。它的厚度和深度可以通过控制沉积过程来控制。此外，可以独立于随后形成的深的或者重掺杂的源极/漏极结的特性来控制所述源极/漏极、扩展的特性。
Description
背景
本发明一般涉及金属氧化物半导体场效应晶体管。
金属氧化物半导体场效应晶体管包括与源极/漏极自对准的栅极。源极/漏极可以包括较深或者重掺杂的区域以及较浅和轻微掺杂的区域，有时被称为末端(tip)或者源极/漏极扩展(extension)。
栅极下重叠(underlap)是在离子注入以及随后的热处理之后，源极/漏极材料在栅极下面扩散的量。注入之后，被注入的材料被暴露给热，所述热导致所述材料向下移动到衬底中，并且在较小程度上，横向地在所述栅极下面移动。因此，在使用离子注入的源极/漏极扩展的系统中，下扩散(underdiffusion)的量被确定为结深(junction depth)的函数。
对于源极/漏极扩展而言，希望具有相对浅的结深，以支持较小的晶体管尺寸。通常，在源极/漏极扩展注入技术中，最小的末端结深由必要的栅极下重叠确定。
源极/漏极扩展越浅，一般地，可被利用的栅长(gate length)越短，而不增大断路状态(off-state)漏电流。需要在栅极边缘下面的扩展掺杂，以确保在栅极下面的反型层(inversion layer)与高掺杂的源极/漏极扩展区域之间具有低电阻通道。对于高驱动电流而言，低电阻是所需要的，所述高驱动电流对于高电路切换速度是关键性的。
因此，需要更好的方式来制造场效应晶体管的源极/漏极结。
附图简要说明
图1是在加工的一个阶段大大地放大的剖视图；
图2是根据本发明的一个实施方案，在随后的加工阶段放大的剖视图；
图3是根据本发明的一个实施方案，在更加随后的加工阶段放大的剖视图；
图4是根据本发明的一个实施方案，在随后的加工阶段放大的剖视图；以及
图5是根据本发明的一个实施方案，在更加随后的加工阶段放大的剖视图；
具体实施方式
参见图1，重掺杂半导体衬底12可以被牺牲的、未掺杂的或者轻微掺杂的外延硅层18覆盖。在一个实施方案中，层18的厚度可以小于500埃。可以在外延硅层18上确定包括栅极16的栅电极结构，所述栅极16形成在栅极介电质14上。
例如，在单个晶片化学汽相沉积反应器中使用二氯硅烷基化学，可以实现牺牲的外延硅层18的选择性沉积，所述单个晶片化学汽相沉积反应器例如是Epsilon 3000外延反应器，可以从荷兰Bilthoven的ASM International NV获得。在825℃，20托的处理压力下，可以用150-200sccm二氯硅烷、100-150sccm HCl、20slm H2的气流沉积所述膜。在这些处理条件下，对间隔件(spacer)和氧化物区域获得选择性的同时，硅在暴露的衬底上可以获得每分钟10-15纳米的沉积速率。还可以使用其他沉积技术。
图1所示的结构有时被称为δ掺杂的晶体管。因为在外延层18下面存在相对高的掺杂，所以在衬底12和外延硅层18之间的界面处发生了大的浓度增量(δ)或者变化。
图1所示的结构可以被间隔件材料覆盖，然后被各向异性地蚀刻，以形成图2所示的侧壁间隔件(sidewall spacer)28。取决于所述隔离层蚀刻的选择性，外延硅18的一些有限的蚀刻可以同时进行。
间隔件形成之后，选择性湿法蚀刻可以将外延硅层18的暴露部分去除，并且可以继续在栅极16下面蚀刻，以获得图3所示的底切(undercut)结构。栅极16底切的程度可以通过调整蚀刻时间来控制。
例如，用各种氢氧化物基溶液可以选择性地蚀刻外延硅层18。然而，对于未掺杂或者轻微掺杂的层18相对于重掺杂的衬底12的高选择性而言，可以采用相对较温和的处理条件。
在一个实施方案中，在20℃下，体积浓度2到10％范围内的氢氧化铵水溶液可以与声波降解(sonication)一起使用。在本发明的一个实施方案中，声波降解可以通过换能器(transducer)来提供，所述换能器以每平方厘米.5至5瓦特的功率来散发超声或者兆声能。因为δ掺杂的晶体管在未掺杂区域下面具有重掺杂区域，所以它可以为湿法蚀刻充当蚀刻终止层。
在湿法蚀刻底切之后，可以生长掺杂的选择性外延硅层50。浅的、高掺杂的源极/漏极扩展50a在栅极16边缘和侧壁间隔件28下面横向地延伸所希望的距离，如图4中示出的那样。较厚的源极/漏极区域50b与间隔件28的边缘对准并且从间隔件28延伸出去。间隔件28使得扩展50a的长度能够被调整，并且允许层50的厚度扩大而不与栅极16短路。较厚的区域50b降低了区域50的电阻，并且使得该较低电阻的区域靠近栅极16的边缘。
作为一个实施例，在形成P型MOS(PMOS)晶体管时，源极/漏极扩展50a和凸起的源极/漏极50b可以通过选择性地沉积外延的硼掺杂的硅或者具有高达30％锗浓度的硅锗来形成。在一个实施方案中，在100sccm二氯硅烷，20slm H2，750-800℃，20托，150-220sccm HCl，150-200sccm二硼烷流，以及150-200sccm GeH4流的处理条件下，可以获得具有每分钟20纳米的沉积速率、1E20cm-3硼浓度和20％锗浓度的高掺杂的硅锗膜。0.7-0.9mOhm-cm的低电阻率由所述膜的高硼浓度产生。。
在一些实施方案中，低电阻率提供了在所述的扩展区域和源极/漏极区域中高电导率的益处。这个降低的电阻率可以降低外电阻。在一些实施方案中，源极/漏极区域50b中存在的较大的硅锗单元晶胞可以在沟道上施加压缩应变，这一点又可以导致增强的迁移性和晶体管性能。
在一个实施方案中，在N型晶体管(NMOS)中，源极/漏极50b和源极/漏极扩展50a可以使用原位沉积的磷掺杂的硅来形成。硅可以在750℃和20托，具有20slm H2气体运载流(carrier flow)的100sccm二氯硅烷，25-50sccm HCl，200-300sccm 1％的PH3的处理条件下被选择性地沉积。在一个实施方案中，可以在沉积的膜中获得具有0.4-0.6mOhm-cm电阻率的2E20cm-3的磷浓度。
此后，第二薄间隔件34可以使用图5所示的常规技术来形成。深的源极/漏极32可以使用间隔件28和34以及栅极16作为掩模，通过离子注入来形成。所述深的源极/漏极32的退火可以以这样的方式来完成，即，使包括层50中的掺杂剂的掺杂剂扩散降低或者最小化。
浅的源极/漏极扩展50a的特性以及它们下重叠栅极16的程度可以独立于深的源极/漏极结32的特性。源极/漏极扩展50a的栅极16扩展欠重叠的范围可以按要求来控制。
虽然，已经针对有限数量的实施方案对本发明进行了描述，但本领域的技术人员将从中意识到许多修改和变化。所附的权利要求书意欲覆盖所有这些落入本发明真正的精神和范围内的修改和变化。
Claims (15)
1.一种用于制造场效应晶体管的方法，包括：
在衬底上形成牺牲的外延沉积的材料层，在所述外延沉积的材料层上形成栅电极，在所述栅电极上形成侧壁间隔件，使用所述栅电极作为掩膜来蚀刻所述外延沉积的材料层，并且在所述侧壁间隔件下面蚀刻，并且选择性地湿法蚀刻所述外延沉积的材料以底切所述栅电极，从而形成具有外延沉积的源极/漏极的金属氧化物半导体场效应晶体管，所述外延沉积的源极/漏极在栅电极的边缘下面延伸。
2.如权利要求1所述的方法，包括形成在栅电极的边缘下面延伸的源极/漏极扩展。
3.如权利要求1所述的方法，其中形成牺牲的外延沉积的材料包括外延沉积硅材料。
4.如权利要求1所述的方法，包括使用声波降解来选择性地湿法蚀刻所述材料。
5.如权利要求1所述的方法，包括在所述衬底上沉积外延材料并且在所述栅电极下面延伸。
6.如权利要求5所述的方法，包括形成掺杂的外延材料。
7.如权利要求1所述的方法，包括将所述外延材料形成为靠近所述栅电极是较薄的、而离开所述栅电极是较厚的。
8.如权利要求1所述的方法，包括形成δ掺杂的晶体管。
9.一种用权利要求1所述的方法制成的场效应晶体管。
10.如权利要求9所述的晶体管，其中所述外延沉积的源极/漏极具有源极/漏极扩展，所述源极/漏极扩展由掺杂的外延半导体材料形成并且在所述栅电极的边缘下面延伸。
11.如权利要求10所述的晶体管，其中所述掺杂的外延半导体材料在靠近所述栅电极处具有第一厚度和在离开所述栅电极处具有第二厚度，所述第二厚度大于所述第一厚度。
12.如权利要求11所述的晶体管，包括侧壁间隔件，并且所述掺杂的外延半导体材料在所述侧壁间隔件下面延伸。
13.如权利要求12所述的晶体管，其中具有第二厚度的所述掺杂的外延半导体材料与所述侧壁间隔件对准。
14.如权利要求9所述的晶体管，其中所述晶体管是δ掺杂的晶体管。
15.如权利要求10所述的晶体管，包括在所述掺杂的外延半导体材料下面的离子注入的源极/漏极。
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| US10/692,696 US7060576B2 (en) | 2003-10-24 | 2003-10-24 | Epitaxially deposited source/drain |
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| PCT/US2004/035204 WO2005041288A1 (en) | 2003-10-24 | 2004-10-22 | Epitaxially deposited source/drain |
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| KR (1) | KR100841806B1 (zh) |
| CN (1) | CN1898785B (zh) |
| DE (1) | DE112004002017B4 (zh) |
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| Publication number | Publication date |
|---|---|
| US20060197164A1 (en) | 2006-09-07 |
| WO2005041288A1 (en) | 2005-05-06 |
| DE112004002017T5 (de) | 2006-08-31 |
| CN1898785A (zh) | 2007-01-17 |
| DE112004002017B4 (de) | 2009-03-05 |
| KR20060060058A (ko) | 2006-06-02 |
| TW200515596A (en) | 2005-05-01 |
| US7060576B2 (en) | 2006-06-13 |
| KR100841806B1 (ko) | 2008-06-26 |
| US20050087801A1 (en) | 2005-04-28 |
| TWI260776B (en) | 2006-08-21 |
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