CN1729568A - 具有连接外部元件的引片的半导体装置 - Google Patents
具有连接外部元件的引片的半导体装置 Download PDFInfo
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- CN1729568A CN1729568A CNA200380107276XA CN200380107276A CN1729568A CN 1729568 A CN1729568 A CN 1729568A CN A200380107276X A CNA200380107276X A CN A200380107276XA CN 200380107276 A CN200380107276 A CN 200380107276A CN 1729568 A CN1729568 A CN 1729568A
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
半导体装置包括具有至少两个反向主电极和一个控制电极的半导体芯片。具有基础部分和接触部分的导电引片通过一层导电材料在其基础部分与各电极相连。钝化层置于至少一个电极之上,并环绕导电材料层。引片的基础部分和接触部分通过延伸部分连接,其中延伸部分在半导体芯片的主表面间延展。
Description
本发明涉及由Martin Standing和Hazel D.Schofield在2001年3月28日提交的序列号为09/819,774的美国申请,名称是芯片规模表面组装器件及其制造过程。
技术领域
本发明涉及半导体装置,更具体地,涉及具有连接外部元件的引片的表面组装半导体装置。
背景技术
电子电路中一般使用到的半导体芯片被封装以形成可以直接与基板上的导电垫片这样的外部元件连接的半导体装置。电子器件的封装提供了一些功能。保护半导体芯片不变潮湿和不因其它环境要素而被损坏,电连接到外部元件,以及对半导体芯片产生的热量进行散热管理是电子封装最重要的功能。常规封装,如DIP和SOIC封装,也具备上述这些功能。这些封装通常使用一种引脚框架结构,这种结构有时是半导体芯片大小的4-5倍。所以,根据常规设计的半导体芯片封装通常会导致半导体装置比芯片本身大许多。
电子系统小型化的趋势迫使空间利用的最大化。一种增大空间使用的方法就是减小装置中组件的大小从而增大组件的密度。虽然增大组件的密度将使空间使用最大化,然而在任一设计中都必然遇到这样的挑战,即有效降低热度和由于连接电阻引起的寄生电效应。
发明内容
根据本发明,半导体装置包括半导体芯片,其含有至少两个置于主表面上的反向的主电极。每一个电极都连有一个导电引片。每一个引片包括一个与外部元件(例如,基板上的导电垫片)电接触的接触部分和一个与电极连接的基础部分。引片的接触部分都位于半导体芯片的一侧。为了实现这种安排,为至少一个引片提供了一种能将基础部分与接触部分连接起来的延伸部分,该延伸部分在芯片的主表面间延展。引片提供了芯片背面电极到外部元件的最短的可能路径,从而减少封装中由连接本身引起的寄生电阻和电感。
根据本发明,为了减少半导体装置的占用面积,可以当该装置与基板上的导电垫片连接时,引片的接触部分直接置于半导体芯片下方。
作为选择,含有延伸部分的引片的接触部分可以与芯片下的区域相分离,为芯片下面的基板上的导电衬垫提供更多的空间。
根据本发明的半导体装置还可以使用变形的引片。例如,在第一实施例中,每一个引片可以包括由延伸部分连接和区隔的基础部分与接触部分。在其它实施例中,一些引片还可以包括平的基础部分和直接置于基础部分上的接触部分。其中,接触部分可以是半球型的,圆柱型的,或者由平的基础部分延伸的凸起部分。
通过以下的详细说明,并结合附图,可以更清楚地理解本发明的其他特点和优点。
附图说明
图1A示出了根据本发明第一实施例的半导体装置的侧视图;
图1B示出了图1A所示的装置的底视图;
图2A示出了图1A所示的装置中使用的引片的侧视图;
图2B示出了图2A中沿2B-2B线方向的引片的视图;
图3A示出了图1A所示的装置中所使用的引片的侧视图;
图3B示出了图3A中沿3B-3B线方向的引片的视图;
图3C示出了图3A中沿3C-3C线方向的引片的视图;
图4示出了根据现有技术制成的包含多个半导体芯片的半导体晶圆;
图5示出了图4所示的包含钝化层的晶圆,该钝化层形成于半导体芯片的顶部电极暴露部分的开孔上;
图6示出了图5所示的晶圆,其包含连接半导体芯片顶部电极的引片;
图7A示出了根据本发明的第二实施例的半导体装置的底视图;
图7B示出了图7中沿8-8线方向的装置的侧视图;
图8A和8B分别示出了本发明第二实施例中使用的引片的顶视图和侧视图(图8A中8B-8B方向);
图8C和8D分别示出了本发明第二实施例中使用的引片的顶视图和侧视图(图8C中8D-8D方向);
图9示出了图7中沿9-9线方向的装置的剖视图;
图10A和10B分别示出了本发明第二实施例中使用的引片的顶视图和侧视图;
图11A和11B分别示出了可以用于本发明第二实施例中的引片的另一实施例的顶视图和侧视图;
图12A和12B分别示出了可以用于本发明第二实施例中的引片的另一实施例的顶视图和侧视图;
图13示出了置于基板上的第一实施例的半导体装置;和
图14示出了置于基板上的第二实施例的半导体装置。
具体实施方式
参照图1A和1B,根据本发明的半导体装置的第一实施例包括半导体芯片10。根据一个优选的实施例,半导体芯片10可以是功率MOSFET。然而,本发明并不仅限于功率MOSFET。其它的电子半导体芯片,例如IGBT、功率二极管等也可以用于替代MOSFET。
半导体芯片10包括两个反向的主表面。半导体10在第一主表面上有第一主电极12,在第二主表面上有第二主电极14。半导体芯片10也包括控制电极16,该控制电极16在半导体芯片10的第一主表面上且与第一主电极12绝缘。在优选实施例所使用的MOSFET中,当控制电极16按惯例作为栅极电极时,第一和第二主电极可以分别作为源极和漏极接触。
控制电极16接收来自外部控制器的控制信号,当本发明所述的半导体装置8并入电子电路中相应的位置时,该控制信号切换流动于第一主电极12和第二主电极14间的电流。
根据第一实施例,半导体装置8包括多个的引片18、20和22。每一个引片包括基础部分24、26、28和接触部分30、32、34。接触部分30、32、34实现与外部元件电接触的功能。基础部分24、26、28分别通过如焊料或载银环氧材料树脂这样的导电性环氧材料树脂等芯片附着材料36与第二主电极14、第一主电极12和控制电极16电连接。除了其上有导电附着材料并分别与引片20、22的基础部分26、28电连接的部分,钝化层38还覆盖了第一主电极12和控制电极16。
每一个引片18、20、22也包括延伸部分19、21、23,其分别将基础部分24、26、28与接触部分30、32、34连接在一起。在优选实施例中,延伸部分19、21、23分别从引片18、20、22的基础部分24、26、28的边缘垂直延展。优选地,接触部分30、32、34通过延伸部分19、21、23分别与基础部分24、26、28分隔但平行。
接触部分30、32、34优选地相互共面,并且反向放置在芯片的主电极上。实现该安排的本发明的一个新特征是延伸部分19,其在半导体芯片10的第一主表面和第二主表面间进行延展,并将基础部分24连接到接触部分30,从而为从芯片10的第一主表面和第二主表面之上的位置延展的电连接提供了路径。这种结构考虑到了基板上半导体装置8的表面组装。
根据本发明的另一方面,基础部分,如26、28,可以包含比实现半导体芯片10的电极电连接所必需的区域更大的区域。例如,与半导体芯片10的电极电连接的引片22的基础部分28,可以比与控制电极16电连接的必需区域更大。一层粘合剂可以加在额外的区域下以进一步增强引片22到半导体芯片10顶部的连接。
参考图2A至2B和图3A至3C,分别与第一主电极12和控制电极16连接的引片20、22,是通过弯曲如一片铜这样的一片材料来形成的整体,并提供了通过延伸部分21、23分别连接与间隔的基础部分26、28和接触部分32、34,其延伸部分是从基础部分26、28的边缘延展到接触部分32、34的边缘。在第一实施例中使用的引片18可以根据所述的其它引片20、22的相同制作方法制得。
根据本发明的半导体装置可通过以下过程制造。参照图4,半导体晶圆40,例如硅晶圆,其上包含多个独立的半导体芯片10。晶圆40中的半导体芯片10是相同的,且可以是根据任何已知方法在硅基板上形成MOSFET,IGBT,功率二极管等。半导体芯片被间隔42分开,该间隔是从晶圆40的一个边缘到另一边缘。每一个半导体芯片至少包括一个第一主电极12和一个控制电极16。半导体芯片10的第二主电极14位于晶圆8的反面(未示出)。电极12、16和14优选是可焊接的。
接着参照图5,形成钝化层38,其包含分别在第一主电极12和控制电极16上的开孔44、46(图1)。钝化层38可以通过将如公知的ElectraEP2793这种材料的光敏环氧材料沉积在晶圆40的整个上表面并覆盖第一主电极12和控制电极16及其间的所有区域而形成。然后,环氧材料可以被干燥和暴露在穿过掩模的紫外线光线中来标识和分隔将被移除的区域以形成开孔44、46。如此被标识的区域被移除来创建分别暴露了第一主电极12和控制电极16的部分的开孔44、46。接着,感光性环氧材料通过如加热的方式来固化以创建含开孔44、46的钝化层38(图1)。
开孔44、46所需的区域只要与为第一主电极12和控制电极16与各引片的基础部分间提供良好电接触所必需的区域大小相同,而不需要延展到电极的整个表面。此外,开孔44、46不需要暴露与引片基础部分连接的相等的电极区域。还有,本发明不是仅仅限定在创建钝化层38(图1)的前述过程中,任何其它的适当的方法也可以被用于创建含开孔44、46的钝化层38(图1)。
开孔44、46一旦形成,导电附着材料36(图1A)就沉积在第一主电极12和控制电极16的暴露部分上。焊料或导电环氧材料可以被用作导电附着材料36(图1A)。
下面参照图6,导电引片位于导电附着材料36的上面,其中导电附着材料在电极12、16的暴露部分之上。例如,图6示出了引片20、22,其参照根据本发明的第一实施例的半导体装置8进行了描述,该引片20、22通过导电附着材料36(图1A)分别将各自的基础部分26、28连接到半导体芯片10的第一主电极12和控制电极16。一旦导电引片(如,引片20、22)在适当的位置上,如果焊料被用作附着材料,它就回流(reflown),如果导电环氧材料作为导电附着材料,它就被固化。如果引片的基础部分比暴露区域大,粘合层可以被置于暴露区域以外的基础部分中,以增强导电引片和半导体芯片间的连接强度。任选地,液体环氧材料可以沉积在晶圆上,至少覆盖引片基础部分和晶圆的其它区域,以提高半导体芯片10上引片的组装强度。其后,晶圆40被沿间隔42切割成方块,以制成单个的半导体芯片10,每一个都至少含有一个与第一主电极12和控制电极16连接的导电引片。
根据本发明第一实施例的半导体装置8(图1A),另一个引片,如引片18,通过焊料或导电环氧材料这样的导电附着材料36(图1A)电连接到半导体芯片10的第二主电极14上。其可以通过选取单个芯片10,将第二主电极14放置在引片18的基础部分24上,再由一层如焊料或导电环氧材料这样的导电附着材料36(图1A)连接来实现。再者,如果使用焊料,则它就回流;如果使用导电环氧材料,则它就被固化。
作为选择,在钝化层中形成开孔后,芯片首先被切割机划片,然后使用导电附着材料将引片粘附于每个芯片的电极上。
引片18、20、22可以从铜矩阵引脚框架中切割出,其中引脚框架含有常规封装中使用的铜焊带或桥的相似形式。引片18、20、22可以使用常规芯片粘结工艺中的桥式冲压(brigde punch)和位置类型操作(place type opertion)放入适当的位置。根据优选的方法,芯片10放在引片18上,并通过适当的导电附着材料与其基础部分24连接,导电附着材料回流或固化,然后从焊带上裁减出引片以获得半导体装置8。
根据本发明的半导体装置可以由上述过程制得,且包括不同形式的引片。参照图7和图8,其中相同数字标识相同的特征,根据本发明第二实施例,半导体装置48包括含引片50、52、54的半导体芯片10,其中导电引片与电极相连。参照图9,其中相同数字标识相同特征,引片50、52和54分别包括基础部分51、53和55。通过导电附着材料36与第二主电极14连接的引片50包括延伸部分56,该延伸部分将基础部分51连接到接触部分58。延伸部分56与引片50的基础部分51和接触部分58形成整体。应该指出,延伸部分在半导体芯片10的主表面间延展。
引片52的基础部分53位于含多个接触件60的表面之上。基础部分55也位于含接触件60的表面之上。接触件60是从各基础部分53、55的开孔表面延展的凸起部分。引片52、54的基础部分53、55是通过沉积在钝化层38的各开孔中的一层导电附着材料36与第一主电极12和控制电极16进行电连接的。引片51优选地由铜和镀银组成。引片50的基础部分51可以比芯片略大一些,以至在两者粘贴时,在围绕芯片的边缘形成框架。额外的区域可以有更厚的附着材料环绕在芯片的边缘。这样将使得附着材料有效地被控制并阻止其流到芯片的边缘上。
事实上,本发明的不同实施例可以使用其它形状的引片由上述过程制得。例如,参照图10A至10B,11A至11B,和12A至12B,所用的引片可以变为包括圆柱状的接触件62(如图11A至11B所示其包含平接触表面63)来代替如图10A至10B所示的应用在第二实施例中的含半球形的接触件60,或者接触件60可以被多个具有平接触表面65的凸起部分64替代。
与芯片的电极相连的引片52、54的基础部分53、55的边可以是平的或微微凸起。凸起的边可以以引片50基础部分51额外区域中相同方式帮助控制附着材料的流动。引片52、53也可以由铜和成品银形成。
本发明的第二实施例可以在钝化层和开孔形成后,先由晶圆划片制得。每个划片都通过载银环氧材料这样适当的导电附着材料与引片50的基础部分51连接。然后,引片52、53使用相同的附着材料或合适的焊料被附着。根据第二实施例,引片50作为半导体装置的引脚框架的基础。在所引用的制造方式中,引片50将以高密度矩阵的形式出现,而引片52、53将使用桥冲压组件(bridge punch assembly)与芯片的相关电极粘合。
参照图13,所示半导体装置8表面组装于基板66上。特别地,接触件30、32、34与导电垫片68、70、72电接触,其中导电垫片将半导体装置8的电极连接在电子电路中合适的位置上(未示出)。
参照图14,根据第二实施例,所示半导体装置48表面组装于基板66上。类似半导体装置8,半导体装置48是通过导电衬垫68、70、72与电子电路相连的表面组装装置,其中导电垫片分别与引片50、52、54的接触件58、60接触。由于这种安排,根据本发明,当半导体装置8、48置于基板上时,热量可以通过引片18、50的基础部分24、51从半导体芯片10的第二主电极14消散掉。
应该指出,半导体装置8(图13)的接触部分30在半导体芯片10的其它引片20、22粘附的相同主表面下放置它的方向上延展。这种结构具有减少半导体装置占用面积的优点。另一方面,半导体装置48(图14)的接触部分58在半导体芯片10中远离其它引片粘附的主表面下区域的方向中延展。虽然这种结构增加了半导体装置48的占用面积,但其使得导电垫片70、72在半导体装置48下有更大的区域。同样地,它的制造更加简单,当芯片的第二主电极与其各自的引片粘附时,它不要求精确对准。
根据本发明的半导体装置中的芯片和管脚比为90%。根据本发明的装置的散热也改善了,这使得装置可以在更高的温度下运行。根据本发明,在装置中使用的芯片可以只有0.100毫米厚,这远比常规封装中所用的芯片要薄很多。根据本发明,装置能有不同的占用面积。同样地,根据本发明的装置被装配时,由不同的基板间的热不匹配产生的应力被吸收。因为这些特征,根据本发明的装置相比常规装置而言,能在更困难和更粗糙的条件下运行。
对于本领域的普通技术人员,根据本发明,不同形式的导电引片可以联合使用以设计半导体装置是显而易见的;所以,这里所示的装置不能理解为限制了本发明的范围。因此,虽然本发明被描述为与特定实施例有关,但是对本发明进行各种变化、改进和其他应用对本领域技术人员也是显见的。因此,本发明不仅限于这里的具体公开,而仅由所附的权利要求及其等同来限定。
Claims (28)
1.一种半导体装置,包括:
半导体芯片,其包括第一主表面和与所述第一主表面反向的第二主表面;
控制电极,置于半导体芯片的第一主表面上的第一主电极,和置于半导体芯片的第二主表面上的第二主电极;
多个导电引片,其每一个上都具有与一个电极电连接的基础部分,以及与外部元件电接触的基础部分;
其中所述的第二主电极与导电引片连接,该导电引片包括连接基础部分和接触部分的延伸部分,而延伸部分至少在半导体芯片的第一主表面和第二主表面间延展。
2.根据权利要求1所述的半导体装置,其中所述的多个导电引片,每一个都包括将接触部分与基础部分区隔的延伸部分。
3.根据权利要求2所述的半导体装置,其中所述的每个导电引片的延伸部分与基础部分基本垂直,而其接触部分与基础部分基本平行。
4.根据权利要求1所述的半导体装置,其中所述半导体芯片为MOSFET。
5.根据权利要求1所述的半导体装置,其中钝化层在控制电极和第一主电极之上,并且各导电引片的基础部分通过钝化层中的开孔与控制电极和第一主电极电连接。
6.根据权利要求5所述的半导体装置,其中一层粘合剂加在至少一个导电引片的基础部分与半导体芯片间,以增强导电引片与半导体芯片的连接强度。
7.根据权利要求1所述的半导体装置,其中一层导电附着材料将每个导电引片的基础部分与各电极相连。
8.根据权利要求7所述的半导体装置,其中所述的导电附着材料层包含焊料。
9.根据权利要求7所述的半导体装置,其中所述导电附着材料层包含导电环氧材料。
10.根据权利要求1所述的半导体装置,其中所述多个导电引片包括将其基础部分与接触部分连接的延伸部分,其中每个延伸部分与基础部分和接触部分为一整体。
11.根据权利要求1所述的半导体装置,其中至少一个导电引片包括基础部分和至少一个在平的基础部分表面上的接触部分。
12.根据权利要求11所述的半导体装置,其中所述的至少一个接触部分为凸起。
13.根据权利要求11所述的半导体装置,其中所述的至少一个接触部分为圆柱形并且有一个平的接触面。
14.根据权利要求11所述的半导体装置,其中所述的至少一个接触部分为具有平接触面的凸起部分。
15.半导体装置,包括:
半导体芯片,其包括第一主表面和与所述第一主表面反向的第二主表面;
置于半导体芯片的第一主表面上的第一主电极,和置于半导体芯片的第二主表面上的第二主电极;
至少一个导电引片,其具有与一个电极电连接的基础部分,和与外部元件电接触的基础部分,所述的至少一个导电引片包括连接基础部分和接触部分的延伸部分,所述的延伸部分至少在半导体芯片的第一主表面和第二主表面间延展;和
至少另一个导电引片,其具有连接半导体芯片主表面上一个电极的基础部分,其中半导体芯片的主表面与电极相对,且与至少一个导电引片电连接,所述至少另一个导电引片包括与外部元件电接触的接触部分。
16.根据权利要求15所述的半导体装置,其中所述的半导体芯片为MOSFET。
17.根据权利要求15所述的半导体装置,其中所述的钝化层在至少一个电极上,围绕导电层的钝化层与一个导电引片的基础部分和电极电连接。
18.根据权利要求17所述的半导体装置,其中所述的一层粘合剂加在基础部分与电极间,以增强导电引片与半导体芯片间的导电强度。
19.根据权利要求17所述的半导体装置,其中所述的导电层包括焊料。
20.根据权利要求17所述的半导体装置,其中所述的导电层包括导电环氧材料。
21.根据权利要求19所述的半导体装置,其中所述的至少另一个导电引片包括连接基础部分与接触部分的延伸部分,所述的延伸部分与基础部分和接触部分为一个整体。
22.根据权利要求19所述的半导体装置,其中所述的至少另一个导电引片包括平的基础部分和至少一个在所述平的基础部分表面上的接触部分。
23.根据权利要求22所述的半导体装置,其中所述的至少一个接触部分是凸起。
24.根据权利要求22所述的半导体装置,其中所述的至少一个接触部分为圆柱形并且有一个平的接触面。
25.根据权利要求22所述的半导体装置,其中所述的至少一个基础部分为具有平接触面的凸起部分。
26.根据权利要求15所述的半导体装置,其中所述的导电引片的接触部分在主表面之下。
27.根据权利要求15所述的半导体装置,其中所述的至少一个导电引片的基础部分位于与至少另一个导电引片连接的主表面之下。
28.根据权利要求15所述的半导体装置,其中所述的至少一个导电引片基础部分从主表面下的区域延展,该主表面与至少另一个导电引片连接。
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2003
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101964332A (zh) * | 2009-07-22 | 2011-02-02 | 万国半导体股份有限公司 | 芯片级表面封装的半导体器件封装及其制备过程 |
CN101964332B (zh) * | 2009-07-22 | 2013-03-13 | 万国半导体股份有限公司 | 芯片级表面封装的半导体器件封装及其制备过程 |
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JP4327096B2 (ja) | 2009-09-09 |
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TW200414533A (en) | 2004-08-01 |
AU2003295783A1 (en) | 2004-06-18 |
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