CN1282241C - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1282241C
CN1282241C CNB021506507A CN02150650A CN1282241C CN 1282241 C CN1282241 C CN 1282241C CN B021506507 A CNB021506507 A CN B021506507A CN 02150650 A CN02150650 A CN 02150650A CN 1282241 C CN1282241 C CN 1282241C
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China
Prior art keywords
electrode tip
conductive pattern
chip
tip holders
semiconductor chip
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Expired - Fee Related
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CNB021506507A
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CN1420559A (zh
Inventor
浅野哲郎
榊原干人
猪爪秀行
境春彦
木村茂夫
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Publication of CN1420559A publication Critical patent/CN1420559A/zh
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Abstract

一种半导体装置。把化合物半导体芯片固定在冲裁框架的岛上、树脂密封的封装结构有封装尺寸的小型化不进展的问题。反向控制型的情况下，形成芯片尺寸变大、重新作图形成本也会增大的原因。本发明把两个图形在芯片下延伸、芯片固定在图形上，控制端子调换连接处。这样使用同一芯片同一图形、仅以焊接位置就可调换一般图形和反向控制型的图形，所以对用户的要求可迅速并灵活地应对，还可大幅度降低成本。由于是CSP，所以可大大有助于封装的小型化。

Description

半导体装置
技术领域
本发明涉及半导体装置，特别是涉及可使用同一图形的芯片及导电图形通过线焊接的固定位置而容易地变更切换电路装置中控制端子的引线端子的半导体装置。
背景技术
手机等移动通讯器材中多使用GHz带的微波，在天线的切换电路和收发的切换电路等中多使用用于将这些高频信号切换的切换元件(例如特开平9-181642号)。作为该元件由于是处理高频，所以多使用采用砷化镓(GaAs)的场效应晶体管(以下称FET)，随之将所述切换电路自身集成化的单片微波集成电路(MMIC)的开发在进展中。
现在作为半导体装置的封装一般是在引线和同一材料的岛上进行芯片焊接、进行树脂密封的结构。下面对该半导体装置以化合物半导体GaAs的切换电路为例进行说明。
图8是表示现有化合物半导体切换电路装置的电路图。第一FET1和第二FET2的源极电极(或漏极电极)连接在共同输入端子IN上，FET1及FET2的栅极电极分别通过电阻R1、R2连接在第一和第二控制端子Ct1-1、Ct1-2上，且FET1及FET2的漏极电极(或源极电极)连接在第一和第二输出端子OUT1、OUT2上。施加在第一和第二控制端子Ct1-1、Ct1-2上的控制信号是互补信号，使施加有H电平信号的FET开启(ON)、将施加在共同输入端子IN上的输入信号向某一输出端子传递。电阻R1、R2是以防止高频信号通过栅极电极相对成为交流接地的控制端子Ct1-1、Ct1-2的直流电位漏出为目的设置的。
图9表示了把该化合物半导体切换电路装置集成化的化合物半导体芯片的一例。
把在GaAs基片上进行切换的FET1及FET2配置在中央部，电阻R1、R2连接在各FET的栅极电极上。与共同输入端子IN、输出端子OUT1、OUT2、控制端子Ct1-1、Ct1-2对应的底座I、O1、O2、C1、C2设置在基片的周边。用虚线表示的第二层配线是在形成各FET栅极电极时同时形成的栅极金属层(Ti/Pt/Au)20，用实线表示的第三层配线是进行连接各元件及形成底座的底座金属层(Ti/Pt/Au)40。与第一层基片欧姆接触的欧姆金属层(AuGe/Ni/Au)形成各FET的源极电极、漏极电极及各电阻两端的取出电极，图9中因与底座金属层重叠所以未图示。
图10表示了将控制端子Ct1-1的位置从图8向FET2移动、将控制端子Ct1-2的位置从图8向FET1移动的切换电路图。按照用户的要求也有必要组成与图8及图9所示图形的电路逻辑(以下称此为一般图形的切换电路装置)相反的逻辑。即是在输出端子OUT1上通过信号时向从输出端子OUT1移远的控制端子Ct1-1上施加例如3V、向控制端子Ct1-2上施加以0V，相反地在输出端子OUT2上通过信号时向从输出端子OUT2移远的控制端子Ct1-2上施加3V、向Ct1-1上施加0V偏置信号的逻辑(以下称此为反向控制切换电路)，这时有必要变更芯片内的配置。
图11表示了把反向控制型的切换电路装置集成化的化合物半导体芯片的一例。在GaAs基片上把进行切换的FET1及FET2配置在中央部，电阻R1、R2连接在各FET的栅极电极上。与共同输入端子IN、输出端子OUT1、OUT2、控制端子Ct1-1、Ct1-2对应的底座在基片的周边设置在FET1及FET2的周围。用虚线表示的第二层配线是在形成各FET栅极电极时同时形成的栅极金属层(Ti/Pt/Au)20，用实线表示的第三层配线是进行连接各元件及形成底座的底座金属层(Ti/Pt/Au)30。与第一层基片欧姆接触的欧姆金属层(AuGa/Ni/Au)10形成各FET的源极电极、漏极电极及各电阻两端的取出电极，图11中因与底座金属层重叠所以未图示。
在芯片内部配置了与共同输入端子IN、控制端子Ct1-1及Ct1-2或输出端子OUT1及OUT2对应的底座I、C1、C2、O1、O2。在反向控制型的切换电路中与图9一样，FET1的栅极电极和与控制端子Ct1-1对应的底座C1用电阻R1连接，FET2的栅极电极和与控制端子Ct1-2对应的底座C2用电阻R2连接，但从图9底座C1移到FET2侧、底座C2移到FET1侧。
图12表示安装了上述切换电路装置的结构。图12(A)是俯视图，图12(B)表示的是B-B线的剖面图。
形成切换元件的化合物半导体芯片63用焊锡等导电膏70固定安装在引线架的岛62e上，化合物半导体芯片63的各电极座I、C1、C2、O1、O2和引线62用焊接线64连接。这样控制端子Ct1-1与引线62a、输入端子IN与引线62b、控制端子Ct1-2与引线62c、输出端子OUT1与引线62d、OUT20与引线62f分别连接。固定着半导体芯片63的岛62e成为GND端子。半导体芯片63的周边部分被与密封模具形状一致的树脂75包覆，引线62的前端部分被引出到树脂75的外部。
根据用户的要求有时如图11所示要提供把连接在FET上的控制端子Ct1-1及Ct1-2的位置调换的反向控制型切换电路装置，这时需要从晶片开始重新投入。但当根据要求个个应对时，晶片的制作大致要1～2个月、组装要1个月，所以不能快速应对，且有需很大成本的问题。
当想把图9所示的一般图形的切换电路装置的布置图变换成图11所示的反向控制型逻辑电路的布置图时，由于芯片内部没有空间，所以要沿芯片外周配置电阻。但若按该配置例如就要分别在芯片的X方向(左右)增大25μm、Y方向增大50μm，为此芯片尺寸就增大了。
还有，在现有的化合物半导体切换电路装置的封装结构中需要通用地使用各种大小的半导体芯片，所以采用了适合大芯片尺寸的引线架。这是由于若采用适合各个尺寸的引线架时，就要相应增加成本。
现在硅半导体芯片性能的提高也是惊人的，在高频带利用的可能性正在提高。例如使用fT(遮断频率)25GHz以上的硅半导体晶体管的本机振荡电路，通过对应用电路下功夫可产生与使用GaAs FET的本机振荡电路相近的性能。现在硅芯片在高频带的利用难、是在利用昂贵的化合物半导体芯片，但若硅半导体芯片的性能提高、产生利用的可能性时，当然高价化合物半导体芯片、连晶片自身也会在价格竞争中败北。即缩小芯片尺寸以谋求低价格化成为重要课题。而且即使化合物半导体芯片的小型化及低价格化在进展、而封装外形却原样大，小型化的芯片的优越性就完全不能发挥，所以在芯片小型化的同时也在强烈期望封装的小型化。
发明内容
本发明是鉴于上述情况而开发的，本发明的半导体装置包括：绝缘性支承基片；半导体芯片，表面上有多个电极座；导电图形，设在基片上、与多个电极座一一对应；连接装置，连接多个电极座与导电图形。导电图形中至少有两个导电图形向与导电图形对应的至少两个电极座延伸接近，把至少两个导电图形与至少两个电极座用连接装置连接时，通过选择某一导电图形调换至少两个与电极座对应的连接端子的位置，这样来解决上述问题。这样用同一封装和同一芯片可提供一般的切换电路装置和反向控制切换电路装置这两者。而且由于是芯片尺寸封装，所以可大大有利于实现芯片小型化、封装小型化、削减成本及用户安装的小型化。
附图说明
图1是用于说明本发明的(A)为平面图、(B)为立体图；
图2是用于说明本发明的平面图；
图3是用于说明本发明的平面图；
图4是用于说明本发明的剖面图；
图5是用于说明本发明的剖面图；
图6是用于说明本发明的平面图；
图7是用于说明本发明的平面图；
图8是用于说明现有技术的电路图；
图9是用于说明现有技术的平面图；
图10是用于说明现有技术的电路图；
图11是用于说明现有技术的平面图；
图12是用于说明现有技术的(A)为平面图、(B)为剖面图。
具体实施方式
下面详细说明本发明的实施例。
本发明的半导体装置包括绝缘基片1、导电图形2、半导体芯片3、连接装置4、通孔5和外部连接电极6。
参照图1至图4详细说明本发明的第一实施例。
图1(A)是基片1上所设导电图形2的一部分。基片1是由陶瓷和玻璃环氧树脂等构成的大张绝缘基片，其由一张或数张重叠、具有可维持制造工序中机械强度的合计板厚是180～250μm的板厚。
导电图形2由设在绝缘基片1上的六条引线2构成、设置成与半导体芯片上配置的电极座相对应。导电图形2由镀金形成，其中两条引线2延伸至用虚线表示的半导体芯片固定区域11，配置成这两条引线2的两端从半导体芯片固定区域11露出的形状。半导体芯片的固定区域11没有相当于现在的岛部的部位，半导体芯片用绝缘性树脂固定在延伸的两条引线2上。这些导电图形2在每个用点划线表示的各封装区域10内是同一形状，设置成用连结部12连接。各封装区域10具有例如长边×短边是1.2mm×0.8mm的矩形形状，固定区域11例如是0.30mm×0.37mm，但该固定区域11随半导体芯片的大小而不同。各封装区域10的导电图形2相互隔开100μm的间隔纵横配置。所述间隔在安装工序中成为切割线。这里各图形2是通过镀金设置的，但无电解镀也可，这时因无连接的必要所以各导电图形是个别地设置。
如图1(B)所示，基片1上纵横配置有多个(例如100个)与一个半导体芯片对应的封装区域10。
图2表示半导体芯片3。半导体芯片3是化合物半导体切换电路装置，背面是半绝缘性的GaAs基片。该切换电路装置在GaAs基片上把进行切换的FET1及FET2配置在中央部，电阻R1、R2连接在各FET的栅极电极17上。与共同输入端子IN、输出端子OUT1、OUT2对应的电极座I、O1、O2和分别与控制端子Ct1-1、Ct1-2对应的电极座C1、C2设置在基片的周边。控制端子用电极座C1连接在FET1的栅极电极17上，控制端子用电极座C2连接在FET2的栅极电极17上。控制端子用电极座C1、C2上还分别连接有控制端子Ct1-1、Ct1-2。这里与输入端子及输出端子对应的电极座上固定有后面要说明的连接引线。
用虚线表示的第二层配线是形成各FET通道区域14和形成肖特基结的栅极电极17时同时形成的栅极金属层(Ti/Pt/Au)20，用实线表示的第三层配线是进行各元件连接及底座形成的底座金属层(Ti/Pt/Au)40。与第一层基片欧姆接触的欧姆金属层(AuGe/Ni/Au)形成各FET的源极电极13、漏极电极15及各电阻两端的取出电极，图2中因与底座金属层重叠所以未图示。本发明实施例的电路图与图8一样，所以说明省略。
图3表示了把半导体芯片3固定在绝缘基片1上的例子。
如图3(A)所示，半导体芯片3固定在镀金层的引线2c、2a上。引线2c、2a配置成延伸接近于控制端子用电极座C1、C2，各自的两端从芯片边缘露出。这里引线2c、2a露出的位置并不限于图示位置，但引线2c及引线2a从芯片边缘露出的部分必须在对应的两个电极座近旁，而且为了焊接必须有足够的面积。
引线2b与输入端子IN、引线2d与输出端子OUT1、引线2f与输出端子OUT2对应，引线2c与控制端子Ct1-2、引线2a与控制端子Ct1-1对应。半导体芯片用绝缘性粘接剂固定在引线2c、2a上。
焊接线4把半导体芯片3的各电极座I、O1、O2、C1、C2与引线2连接。把控制端子用电极座C1与近旁的从芯片露出的引线2a连接，把控制端子用电极座C2与近旁的从芯片露出的引线2c连接。把输入端子用电极座I与引线2b、输出端子用电极座O1与引线2d、输出端子用电极座O2与引线2f连接。半导体芯片3背面是半绝缘性基片、引线2e是GND电位。
通过在该位置进行线焊接，引线2c与FET2的控制端子用电极座C2连接并与控制端子Ct1-2对应，引线2a与FET1的控制端子用电极座C1连接并与控制端子Ct1-1对应。即在与现有技术相同的芯片图形(一般图形)的情况下，可实现图10及图11所示的反向控制型的切换电路装置。
另一方面，图3(B)表示在图8的电路图所示的一般图形中使用该芯片的情况。这时把控制端子用电极座C1与近旁的从芯片露出的引线2c连接，把控制端子用电极座C2与近旁的从芯片露出的引线2a连接。
通过在该位置进行线焊接，引线2c与FET1的控制端子用电极座C1连接并与控制端子Ct1-1对应，引线2a与FET2的控制端子用电极座C2连接并与控制端子Ct1-2对应。
这样通过把设在绝缘基片上的控制端子用导电图形在芯片下延伸并从芯片边缘把两端露出、选择用焊接线连接的引线，可在同一芯片图形同一导电图形的情况下容易地调换连接在FET1、FET2上的控制端子Ct1-1、Ct1-2的位置。即通过调换与两个引线连接的焊接线的位置，可把两个控制端子用电极座C1、C2的排列顺序和对应的控制端子Ct1-1、Ct1-2的排列顺序正反变换配置。因此可在同一芯片图形(一般的芯片图形)及同一导电图形的情况下，仅通过调换焊接线的连接处，而实现一般的切换电路装置和反向控制型的切换电路装置。
这里该导电图形2在形成镀敷图形时，使用了厚膜印刷，所以图形(引线)间的最小间隔可制成75μm。这与采用现有的框架时冲压的框架冲裁界限是框架的板厚(150μm)×0.8、其最小间隔是120μm相比，可大幅度缩小引线间距离，可大大有助于封装的小型化。
图4表示将上述化合物半导体芯片3组入封装形成的化合物半导体切换电路装置，是图3的A-A线所示的剖面。
基片1上设有与各引线2对应的通孔5。通孔5贯通基片1、内部埋设有钨等导电材料。背面有与各通孔5对应的外部连接电极6。
化合物半导体芯片3用绝缘性粘接剂50横跨固定在两条引线2a、2c上，芯片3的各电极座I、O1、O2、C1、C2分别通过线4、引线2、通孔5和与各自位置对应位置的外部连接电极6电连接。
即六个外部连接电极6以对封装外形的中心线左右(上下)对称的图形配置。具体说就是沿封装侧面的一边按控制端子Ct1-1(或Ct1-2)、输入端子IN、控制端子Ct1-2(或Ct1-1)，沿封装侧面的另一边按输出端子OUT1、GND端子、输出端子OUT2的顺序配置。
封装的四周侧面由树脂层15和绝缘基片1的截面形成，封装的上面由平坦化的树脂层15的表面形成，封装的下面由绝缘基片1的背面形成。
该化合物半导体切换电路装置在绝缘基片1上有0.3mm左右的树脂层15包覆、把化合物半导体芯片3密封。化合物半导体芯片3有约130μm左右的厚度。
封装的正面整个面是树脂层15，背面绝缘基片1的外部连接电极6以左右(上下)对称的图形配置，电极的极性判断困难，所以最好在树脂层15的表面形成凹部或印刷等、刻印表示极性的标记。
如上所述，本发明的特征就在于制成不使用冲裁框架的芯片尺寸封装，把控制端子连接的两条引线延伸并在其上面固定半导体芯片，使这各引线的两端从芯片的边缘露出。这样使用同一芯片图形同一导电图形，仅调换用焊接线连接的引线就可容易地实现一般的图形和反向控制型的图形，可迅速、通用地应对用户的要求。
在把芯片固定在现有的冲裁框架上的结构中，为实现反向控制型的图形不得不变更芯片图形，所以不但半导体芯片的尺寸变大而且封装外形也变大，根据本发明的结构，由于又实现封装的小型化、半导体芯片又一个图形便可，所以可大大有助于削减成本。
这里参照图5及图6表示本发明的第二实施例。平面图与图3所示第一实施例相同故省略，图5是图3的A-A线的剖面图。第二实施例是将第一实施例CSP多芯片模块化了，是把导电图形埋入成为支承基片的绝缘性树脂内的结构。
成为支承基片的绝缘树脂21把半导体芯片23及多个导电图形(引线)22完全包覆，绝缘性树脂21填充在引线22间的分离槽31内，与引线22侧面的弯曲结构(图示省略了，但实际上引线侧面是弯曲的)配合牢固地结合。并且由绝缘性树脂21支承引线22。固定在引线22上的半导体芯片23也一并被覆盖、共同密封。作为树脂材料环氧树脂等热硬性树脂可用传递模实现，聚酰亚胺树脂、聚亚苯基硫醚等热塑性树脂可用注射模实现。
绝缘性树脂21的厚度调整为包覆距半导体芯片23的焊接线24的最顶部约50μm左右。该厚度考虑到强度制厚些、制薄些都可。绝缘性树脂21的表面通过退火而平坦化。这是绝缘性树脂21在有大面积形成时，特别是由于引线22的材料即导电箔30与形成绝缘性树脂21的密封树脂的热膨胀系数和反流后温度降低时的成型收缩率的不同，导电箔30发生翘曲。即为抑制绝缘性树脂21的表面发生翘曲，通过退火使其平坦化。
焊接线24把半导体芯片23的各电极座I、O1、O2、C1、C2与各引线22连接。通过基于热压接的球焊及基于超声波的楔焊一并进行线焊接，这样控制端子Ct1-1、输入端子IN、Ct1-2、输出端子OUT1、OUT2被连接在各引线22上。引线中的一条连接在半导体芯片背面成为GND端子。
导电图形22被埋入绝缘树脂21，与配置在半导体芯片23上的电极座对应设置。固定区域没有相当于现有的岛部，半导体芯片23用绝缘性粘接剂50固定在延伸至固定区域大致中央的引线22a、22c上。
后面要叙述，但如图5(B)所示导电图形22是导电箔30。设有分离槽31的导电箔30通过把背面进行研磨、磨削、腐蚀、激光的金属蒸发等进行化学的及/或物理的清除，作为导电图形22被分离。这样成为导电图形22的背面在绝缘性树脂21上露出的结构。成为填充在分离槽31内的绝缘性树脂21的表面与导电图形22的表面实际上是一致的结构。
半导体芯片23与第一实施例相同，所以省略详述，但这里是化合物半导体的切换电路装置，背面是半绝缘性的GaAs基片。因为是切换电路装置，所以与输入端子IN、控制端子Ct1-1、Ct1-2、输出端子OUT1、OUT2连接的五个电极座I、C1、C2、O1、O2围住芯片外周配置在芯片表面。而且是与FET1连接的控制端子用电极座C1与Ct1-1连接，与FET2连接的控制端子用电极座C2与Ct1-2分别连接的一般图形的芯片。用绝缘性粘接剂固定在成为控制端子Ct1-1或Ct1-2的引线22a、22c上，用各个焊接线24连接电极座与引线22。
外部连接电极26设置成用保护层27覆盖导电图形即各引线22，在希望的位置开口供给焊锡。这样在装配时因焊锡等的表面张力、可原状地水平移动，有可自身调整的特点。
图6表示形成导电图形的导电箔30。导电箔30的厚度考虑到以后的腐蚀以10μm～300μm左右为好，这里采用了70μm(2盎司)的铜箔。但无论是300μm以上还是10μm以下，只要能形成比导电箔30的厚度浅的分离槽31便可。这样多个(这里是4～5个)形成多个固定区域的块32在长条状的导电箔30上分开排列(图6(A))。
图6(B)表示具体的导电图形22。本图是将图6(A)所示的块32的一个放大了。用虚线表示的部分是一个封装区域10，一个块32上矩阵状地配列多个导电图形22。导电图形22至少将形成导电图形22以外的区域的导电箔30腐蚀形成分离槽31、制成导电图形22。该导电箔30考虑焊料的附着性、焊接性、镀敷性而选择其材料，作为材料以铜为主材料的导电箔、以Al为主材料的导电箔或由Fe-Ni等合金构成的导电箔等被采用。
导电图形22可用腐蚀形成，所以与现有的冲裁框架、框架的板厚(150μm)×0.8是图形间距离界限的相比，可大幅度缩小图形间距离，可大大有助于封装的小型化。
第二实施例的特征在于在包覆绝缘性树脂21之前，成为导电图形22的导电箔30成为支承基片，成为支承基片的导电箔30作为电极材料是必需的材料。因此有能最大限度节省结构材料而操作的优点，也能实现降低成本。
分离槽31形成得比导电箔30的厚度浅，所以导电箔30并不作为导电图形22而个个分离。从而作为片状的导电箔30而一体处理，封装绝缘性树脂21时有往模具的搬运、往模具的安装操作非常方便的特点。
本实施例中对导电箔30的情况作了说明，但可以说基片是由硅晶片、陶瓷基片、铜框架等材料构成时也同样。
如图7所示，引线沿芯片外周配置也可。本发明中只要能把与控制端子用底座C1、C2分别对应的控制端子Ct1-1、Ct1-2的位置用调换焊接线的连接处来选择的话便可，延伸引线2a及2c接近控制端子用底座C1及C2便可。
即如图所示即使是沿芯片外周配置的图形，也可通过选择某一引线来调换与两个电极座分别对应的连接端子的位置。
这里任一实施例中可安装的元件不限于化合物半导体切换电路装置、其它的集成电路、晶体管、二极管等半导体芯片，片状电容、片状电阻、片状电感器等无源元件及厚度虽厚但CSP、GBA等倒装的半导体元件等表面安装元件都可以。
本发明的特征在于不使用冲裁框架的CSP，把成为控制端子的两个导电图形在半导体芯片的下面延伸并从芯片将其端部露出。
这样，第一，使用同一图形的芯片及导电图形利用线焊接的固定位置可容易地变更切换电路装置控制端子的引线端子配置。即把与控制端子对应的引线通过芯片的下面并从芯片边缘露出，通过用焊接线选择该引线的某一条就可调换与控制端子用电极座对应的连接端子的位置。在使用现有的冲裁框架的结构中不得不变更芯片内的图形，所以芯片尺寸变大、成本也提高了。但根据本发明的结构，在同一芯片图形(一般的芯片图形)及同一导电图形的情况下，仅通过调换焊接线的连接处就可实现一般的切换电路装置和反向控制型的切换电路装置。目前需要变更芯片内的图形，从晶片开始投入要1～2个月、组装要1个月，但仅变更焊接位置用1/6左右的TAT就可迅速应对。即具有对用户的要求能以非常低的成本迅速灵活应对的优点。
第二，封装的构造是CSP，与现在使用引线、树脂密封的封装结构相比可大幅度地把封装尺寸小型化。现在在通用地使用冲裁框架，所以对芯片尺寸来说是超出需要的大引线，而且引线导出至密封树脂的外部，所以封装外形变得超出需要的大，但若是CSP的话，可抑制到需要最小限度的大小。
第三，可缩小图形的最小间隔，所以通过这点也可实现封装的小型化。这是由于与现在采用冲裁框架、用冲压冲裁时的界限是板厚×0.8(μm)相对，本发明中是通过镀层的厚膜印刷或导电箔的腐蚀而形成图形的。具体说就是可把框架时120μm的最小间隔缩小到75μm，可大大助于封装小型化。
第四，特别是当半导体芯片是化合物半导体切换电路装置时通过把在高频成为GND电位的控制端子Ct1-1、Ct1-2、及GND端子配置在成为RF线的输入端子IN、输出端子OUT1、OUT2间，成为遮断高频信号的结构，所以有提高绝缘特性的优点。

Claims (11)

1.一种半导体装置，包括：绝缘性支承基片；半导体芯片，表面上有多个电极座；导电图形，设在所述基片上、与所述多个电极座一一对应；连接装置，连接所述多个电极座与所述导电图形，其特征在于，所述导电图形中两个导电图形向与该导电图形对应的两个所述电极座延伸接近，把所述两个导电图形与所述两个电极座用所述连接装置连接时，通过选择某一导电图形来调换与所述两个电极座对应的连接端子的位置。
2.如权利要求1所述的半导体装置，其特征在于，所述半导体芯片是由背面为半绝缘性的化合物半导体基片构成。
3.如权利要求1所述的半导体装置，其特征在于，所述半导体芯片用绝缘性树脂固定在两个所述导电图形上，所述两个导电图形其两端分别从所述芯片边缘露出。
4.如权利要求1所述的半导体装置，其特征在于，通过调换与所述两个电极座连接的连接装置的位置，可把所述两个电极座的排列顺序和对应的所述连接端子的排列顺序正反配置。
5.如权利要求1所述的半导体装置，其特征在于，所述半导体芯片是切换电路装置，所述切换电路装置的控制端子连接在所述两个导电图形上。
6.一种半导体装置，包括：绝缘基片；化合物半导体芯片，固定在该绝缘基片表面上，其表面有多个电极座；导电图形，设在所述绝缘基片表面上，与所述多个电极座一一对应；连接装置，连接所述多个电极座与所述导电图形，通孔，与所述导电图形对应、贯通所述绝缘基片；外部连接电极，与该通孔对应设在所述绝缘基片的背面，其特征在于，所述导电图形中的两个导电图形向与该导电图形对应的两个所述电极座延伸接近，把所述两个导电图形与所述两个电极座用所述连接装置连接时，通过选择某一导电图形来调换与所述两个电极座对应的形成连接端子的所述外部连接电极的位置。
7.一种半导体装置，包括：绝缘树脂；化合物半导体芯片，埋入该绝缘树脂内，其表面有多个电极座；导电图形，埋入所述绝缘树脂内，与所述多个电极座一一对应；连接装置，连接所述多个电极座与所述导电图形；外部连接电极，与从所述绝缘树脂背面露出的导电图形对应，其特征在于，所述导电图形中的两个导电图形向与该导电图形对应的两个所述电极座延伸接近，把所述两个导电图形与所述电极座用所述连接装置连接时，通过选择某一导电图形来调换与所述两个电极座对应的形成连接端子的所述外部连接电极的位置。
8.如权利要求6或7所述的半导体装置，其特征在于，所述化合物半导体芯片用绝缘性树脂固定在两个所述导电图形上，所述两个导电图形从所述芯片一侧的边缘延伸至另一侧的边缘并从所述芯片露出。
9.如权利要求6或7所述的半导体装置，其特征在于，通过调换与所述两个电极座连接的连接装置的位置可把所述两个电极座的排列顺序和对应的所述连接端子的排列顺序正反配置。
10.如权利要求6或7所述的半导体装置，其特征在于，所述化合物半导体芯片的背面是半绝缘性基片。
11.如权利要求6或7所述的半导体装置，其特征在于，所述化合物半导体芯片是切换电路装置，所述切换电路装置的两个控制端子分别连接在所述两个导电图形上。
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