CN1809923A - 微引线框封装及制造微引线框封装的方法 - Google Patents

微引线框封装及制造微引线框封装的方法 Download PDF

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CN1809923A
CN1809923A CNA2004800176395A CN200480017639A CN1809923A CN 1809923 A CN1809923 A CN 1809923A CN A2004800176395 A CNA2004800176395 A CN A2004800176395A CN 200480017639 A CN200480017639 A CN 200480017639A CN 1809923 A CN1809923 A CN 1809923A
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substrate
leadframe substrate
semiconductor dice
leadframe
interim
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CNA2004800176395A
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CN100435329C (zh
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戴维·吉廷
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PAI Capital LLC
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Power One Inc
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Abstract

本发明包括一种适合于接收半导体单元片和多个无源元件的引线框基片。引线框基片优选地由单片导电材料如铜形成，并且可以安装到引线框封装中或直接安装到电路板上。引线框基片包括适合于接收半导体单元片和无源元件的安装表面。安装表面通过临时和/或永久连接条链接到一起。一种制造引线框封装的方法其中包括步骤：形成引线框基片、将模制料应用到引线框基片上以将每个安装表面和连接条固定在适当位置、去除临时连接条、将半导体元件安装到引线框基片上，以及在引线框基片上应用封装材料以封装半导体元件。

Description

微引线框封装及制造微引线框封装的方法
技术领域
本发明一般地涉及微引线框设计封装及组装领域。更特别地，本发明包括适合于接收至少一个半导体芯片和多个分立无源元件的微引线框基片，其可安装到引线框中或直接安装到电路板上。
背景技术
在热消散和热管理方面，现今功率应用中的多芯片模组(MCM)面临重大挑战。连同需要以具有低热阻抗的均匀方式消散热量，还需要减小空间和成本。封装MCM的常规方法采用焊区栅格阵列(LGA)或球状栅格阵列(BGA)型基片形式，其包括布置在层压基片上的多个芯片(半导体单元片)加上无源元件。基片材料按惯例具有高的热阻抗，甚至借助热管理技术加强后仍然不能满足引线框设计的低热阻抗。
关于功率部件安装表面，常规引线框器件具有优秀热导性和最佳热消散。但是，常规引线框设计及制造方法限制其在封装中安装多个无源元件的能力。制造适合于接收功率半导体芯片和无源元件的引线框经常关联着长的制造时间、增加的费用，从而一般地不认为是高效的制造选择。常规引线框适合于仅接收功率半导体芯片。因此，外部元件必须连接到引线框以确保操作有效性，这也增加成本(购买、布局等)和客户板子的空间。
图1A-1B说明常规引线框封装10。引线框包括半导体芯片盘14和布置在引线框10周边附近的多个引线16。制造图1A-1B中所示的无引线半导体芯片封装的常规方法包括步骤：(1)将半导体芯片12贴附到引线框10的单元片盘14上，其中引线框10包括布置在单元片盘14周边附近的多个引线16；(2)将引线框10的引线焊接到半导体单元片上的焊接盘(如图1b中的线18所示)；以及(3)以这样的方式在半导体单元片12和引线框10上形成封装体20，即引线框10的每个引线16至少有一部分17从封装体的底部暴露。该常规引线框封装10仅支持单个半导体单元片12。封装10不能支持任何无源元件。因此，无源元件(例如，电阻器和电容器)必然在封装10的外部。
发明内容
通过提供一种适合于接收分立无源元件的并可布置到微引线框封装中或直接布置到电路板上的引线框基片，以及进一步提供一种制造引线框的方法，所提出的发明解决这些问题中的许多。
本发明的一个方面在于提供一种成本相对低的具有相对简单结构的并在封装中集成功率半导体单元片和无源元件的引线框封装。在一种实施方案中，包括电连接到多个终端盘的半导体单元片盘的微引线框基片(“MLF基片”)安装在引线框上。半导体单元片盘适合于接收功率半导体单元片(例如，MOSFET)、控制器ASIC、PWM控制器等。终端盘适合于接收分立无源元件(例如，电阻器和电容器)或焊线。因此所有半导体元件都位于相同封装中。
本发明的另一个方面在于提供一种可配置MLF基片以满足特定封装要求的封装。在一种实施方案中，MLF基片中的终端盘通过临时和永久连接条的组合链接到一起。临时连接条为MLF基片提供刚性，并在最后被去除。临时连接条不提供最终引线框封装中的终端盘之间的电连接。永久连接条将半导体单元片盘和终端盘电连接到一起。
本发明的又一个方面在于提供一种用于半导体封装的MLF基片。在一种实施方案中，引线框包括具有中心盘的外壳以及在其周边附近的引线。MLF基片安装到引线框的中心盘上，并电连接到引线。因此，引线框封装包括分立无源元件，并节省客户板子空间。在另一种实施方案中，MLF基片直接安装到客户板子上，使得功率半导体单元片所产生的热量直接消散到客户板子中。在又一种实施方案中，仅MLF基片的半导体单元片盘和引线接触客户板子。MLF基片的底面具有台阶特性，由此接触盘(例如，功率半导体单元片盘、控制器盘，以及引线)比MLF基片的非接触部分(例如，永久连接条)厚。
本发明的再一个方面在于提供一种制造包括功率半导体单元片和多个无源元件的引线框封装的方法。在一种实施方案中，MLF基片从单片材料冲压出。可选地，可以通过刻蚀或激光制造方法形成MLF基片。模制料应用到MLF基片上以支撑半导体单元片和终端盘。优选地，在半导体元件安装到MLF基片上之前去除临时连接条。在另一种实施方案中，在半导体元件安装到MLF基片上之后去除临时连接条。半导体元件通过表面安装技术安装到MLF基片上。
本发明的另一个方面在于使用上述MLF基片制造引线框封装，包括步骤：在MLF基片上应用模制料以便为终端盘、半导体单元片盘、临时连接条和永久连接条提供支撑。一旦已应用模制料，可以去除临时连接条。每个功率半导体单元片安装到半导体单元片盘上，并且跨越特定终端盘安装无源元件。在安装好半导体元件并且终端盘和半导体单元片焊接到引线上之后，模制料应用到MLF基片上以封装半导体元件和焊线。
附图说明
图1A-1B说明根据现有技术的常规引线框；
图2是根据本发明的MLF基片的一种实施方案的平面图；
图3是图2中所示的MLF基片的部分平面图；
图4是图2中所示的MLF基片的部分平面图，其说明应用到MLF基片上的模制料；
图5是图4中所示的MLF基片的平面图，其说明在已去除临时连接条之后的MLF基片；
图6是图5中所示的MLF基片的平面图，其说明安装在MLF基片上的几个分立无源元件；
图7是包含MLF基片的引线框封装的一种实施方案的平面图；
图8A-8C说明根据本发明的MLF基片的第二实施方案；以及
图9A-9B说明根据本发明的MLF基片的第三实施方案。
具体实施方式
现在将参考图2-9描述本发明的几种实施方案。总的来说，本发明提供一种允许在同一封装中安装功率半导体元件以及无源元件的MLF基片。本发明可以应用于但不局限于，在需要多个或单个硅单元片与单个或多个无源元件组合的封装中提供最佳热性能。通过在封装中布置外部元件，本发明可以代替需要外部无源的现有微引线框产品，从而减小空间和成本。
图2说明根据本发明一种实施方案的引线框模板100。引线框模板100优选地由单片导热和导电材料101制成。铜(Cu)、Cu基合金、铁-镍(Fe-Ni)、Fe-Ni基合金等优选地用作引线框模板材料101。引线框模板100包含其他材料处于本发明的范围和本质之内。单片材料101优选地具有适合于焊接或施加其他导电和导热粘附材料(例如，导电环氧树脂)的表面材料抛光。
在该实施方案中，四个MLF基片102已在单片材料101中形成。引线框模板100可以包括多于或少于四个MLF基片102。仅作为例子，可以通过冲压、刻蚀、研磨或激光制造方法形成每个MLF基片102。每个MLF基片102优选地通过多个临时连接条104连上单片材料101。临时连接条104将MLF基片102紧固于关于单片材料101的适当位置。如随后将描述的，临时连接条104最后从每个MLF基片102中去除，而不打算用来提供最终封装中的半导体元件之间的电连接。
每个MLF基片102的配置可以改变。将安装到MLF基片102上的半导体元件的个数由半导体封装的设计要求规定。图2说明MLF基片102的一种实施方案。在该实施方案中，MLF基片102包括半导体单元片盘106a，106b，106c、终端盘108、临时连接条104，以及永久连接条110。图2中所示的终端盘108形状基本上为矩形。终端盘108包括其他形状例如但不局限于椭圆形、正方形或圆形处于本发明的范围和本质内。
一般地，每个MLF基片102的设计或布局可以预先确定，以满足半导体封装的特定电气要求。例如，如果每个MLF基片102从材料片101冲压出，那么可以配置冲压模以形成半导体封装所需的准确数目的半导体单元片盘106和终端盘108。在每个MLF基片102之间留下一条材料101，使得多个MLF基片102可以单片转移。
终端盘108在MLF基片102中形成图案或矩阵。如上面所讨论的，终端盘108的图案或矩阵可以很大程度地改变。终端盘108一般地提供两个功能：(1)提供无源元件(例如，图6中所示的电阻器R1，R2，R3，R4)的安装表面；以及(2)提供焊线240的安装表面。不管图案如何，终端盘108通过至少一个临时连接条104和/或至少一个永久连接条110链接到一起。终端盘108可以通过多个临时连接条104和/或多个永久连接条110链接到相邻终端盘108。开始时，临时连接条104和永久连接条110为MLF基片102提供刚性。
图3更详细地说明终端盘108之间的连接。一般地，相邻终端盘108可以用两种方式的一种链接到一起：(1)相邻终端盘108通过临时连接条104链接(例如，终端盘108a和108g)；或者(2)相邻终端盘108通过永久连接条110链接(例如，终端盘108g和108h)。可以从终端盘108延伸出多个临时连接条104和/或永久连接条110。
图3中所示的MLF基片102的部分包括十二个终端盘108a-108l。现在将描述几个终端盘108之间的连接，以便提供终端盘108如何可以链接到一起的例子。终端盘108a具有从其延伸出的四个临时连接条104和一个永久连接条110。一个临时连接条104将终端盘108a与终端盘108b链接。第二个临时连接条104将终端盘108a链接到终端盘108g。第三和第四个临时连接条104将终端盘108a链接到与终端盘108a相邻的永久连接条110。永久连接条110将终端盘108a与终端盘108i链接。四个临时连接条104将终端盘108a固定在关于MLF基片102周围元件(例如，终端盘108b，108g)的适当位置，并建立这些元件之间的电连接。
终端盘108f说明可以用更少的连接条链接终端盘108。终端盘108f通过永久连接条110链接到终端盘108e，并通过临时连接条104链接到终端盘108l。永久连接条110和临时连接条104将终端盘108e固定在适当位置。一般地，相邻终端盘108通过单个连接条连接到一起。通过多个连接条将相邻终端盘链接到一起处于本发明的范围和本质内。
相邻终端盘108可以通过全是临时连接条104或全是永久连接条110链接到一起。例如，终端盘108l通过四个临时连接条104链接到相邻终端盘。可选地，终端盘108e仅通过永久连接条110链接到相邻终端盘。每个临时连接条104显示为具有与永久连接条110不同的性状，这只是为了说明哪些连接条是临时的以及哪些连接条是永久的。临时和永久连接条104，110具有相同性状或具有与图3所示不同的性状处于本发明的本质和范围内。
图4说明应用到MLF基片102上的模制料(molding compound)112。模制料112将MLF基片102内的每个元件(例如，终端盘108、半导体单元片盘106，以及连接条104，110)固定到模制料112中。在优选实施方案中，模制料112填充到MLF基片102各处的空白空间或间隙中。MLF基片102中的间隙由MLF基片102中没有布置半导体单元片盘106、终端盘108或连接条104、110的区域定义。模制料112为MLF基片102提供永久连接条110和临时连接条104之外的额外刚性。模制料112优选地是环氧树脂或其他电绝缘材料。
当应用到MLF基片102上时，模制料112优选地不覆盖半导体单元片盘106或终端盘的顶面或底面，因为它们提供半导体单元片和无源元件的安装表面。因此，模制料112优选地比材料片101薄。如果模制料112最初覆盖半导体单元片盘106或终端盘108，那么可以研磨或腐蚀盘的表面以去除模制料112。在优选实施方案中，临时连接条104和永久连接条110也不被模制料112覆盖。但是，用模制料112覆盖临时和永久连接条104、110处于本发明的本质和范围内。
图5说明优选地在已应用模制料112之后从MLF基片102中去除临时连接条104。这样地，MLF基片102的元件(例如，终端盘108、连接条110，以及半导体单元片盘106)主要通过模制料112保持在适当位置。如图5中所示，如果链接的话，终端盘108仅通过永久连接条110链接到相邻终端盘108。其余的永久连接条110提供链接的终端盘108之间的电连接。例如，当MLF基片102最初形成时，终端盘108a最初具有从其延伸出四个临时连接条104和一个永久连接条110(参见图2-3)。一旦去除临时连接条104，终端盘108a仅通过单个永久连接条110链接到终端盘108i。
临时连接条104可以在制造过程的后期去除。临时连接条104仅必须在封装的电测试之前去除。否则，临时连接条104将提供终端盘108之间不需要的电连接。在可选实施方案中，在半导体元件安装到MLF基片102上之后，临时连接条104通过后刻蚀方法去除(随后讨论)。
优选地由环氧树脂、聚酰胺树脂、聚酯树脂等制成的粘合带(没有显示)可以贴附到MLF基片102的底表面上，以进一步使MLF基片102稳固。粘合带是本领域技术人员已知的，因此不需要进一步公开。如果粘合带应用于MLF基片102上，优选地在将半导体元件安装到MLF基片102之前将它应用到MLF基片102上。
在粘合带应用到MLF基片102的底面上(参见图8B)之后，半导体元件安装到MLF基片102的顶面上(参见图8B)。本领域中已知有许多方法用于在封装中安装半导体元件。仅作为例子，MLF基片102可以按照与待安装到终端盘108上的无源元件的图案相对应的图案丝网印刷上焊锡膏。然后，每个无源元件放置到相应的一对终端盘108上，并且使用常规表面安装技术回流焊锡。可选地，无源元件的安装表面可以印刷上焊锡膏，然后安装到一对终端盘108上。用于安装半导体元件的其他方法在本领域中是已知的，因此不需要进一步公开。
图6说明无源元件布置在几个终端盘108之间的MLF基片102的一种实施方案。在该实施方案中，电阻器R1，R2，R3，R4布置在几个终端盘108之间。每个电阻器通过其引线电连接到终端盘108上。例如，电阻器R1通过其引线E1连接到终端盘108a，并通过其引线E2连接到终端盘108g。类似地，电阻器R2通过其引线E1连接到终端盘108h，并通过其引线E2连接到终端盘108i。
如先前所讨论的，终端盘108a和108i以及终端盘108g和108h每个都通过永久连接条110电连接到一起。电阻器R1将终端盘108a和108g电连接到一起。电阻器R2将终端盘108h和108i电连接到一起。电阻器R1和R2因此电连接到一起。电阻器R3和R4类似地电连接到一起。
在该实施方案中，无源元件不安装到终端盘108b，108c，108f，108l上。这样，终端盘108b，108c，108f，108l提供焊线的安装表面。焊线240如金线使用常规焊接方法连接在每个终端盘108b，108c，108f和108l跟半导体封装200的外部引线232(参见图7)之间。
每个半导体单元片盘106适合于接收功率半导体单元片210(例如，MOSFET)或控制器器件212(例如，PWM控制器、控制器ASIC等)。功率半导体单元片210和控制器器件212可以在无源元件(例如，R1-R4)安装到MLF基片102之前或之后安装到每个半导体单元片盘106上。如图7中所示，MLF基片102包括两个功率半导体单元片210，一个安装在半导体单元片盘106b上，而一个安装在半导体单元片盘106c上。控制器器件212安装在半导体单元片盘106a上。每个功率半导体单元片210包括焊接盘(没有显示)。焊线240将功率半导体单元片210的焊接盘电连接到引线框230的引线232。图7中所示的实施方案只是说明性的。半导体封装200的配置可以根据封装的性能要求而改变。
在无源元件、功率半导体单元片210和控制器器件212安装到MLF基片102上以及焊接完成之后，MLF基片102的顶面用模制料密封。在模制料固化之后，粘合带从MLF基片102的底面去除。
如先前所讨论的，临时连接条104不一定要在模制料112应用到MLF基片102之后马上从MLF基片102中去除。在上面所讨论的所有制造步骤中临时连接条104可以保留在MLF基片102中。在可选实施方案中，在粘合带从MLF基片102去除之后去除临时连接条104。在去除粘合带之后执行后刻蚀过程，以便从MLF基片102去除临时连接条104。后刻蚀过程去除临时连接条104的地方在模制料112中形成孔洞。优选地，通过将另外的模制料应用到MLF基片102的背面来填充孔洞。
图7说明包含MLF基片102的引线框封装200。引线框封装200包括在其周边附近具有引线232的外壳230。材料片101最后分成单个单元，每个单元包括单个MLF基片102。该方法在行业内通常称作单体化。然后每个单元安装到外壳230上。引线框封装200优选地以这样的方式封装到封装体中，即每个引线232的底面至少有一部分从封装体的底部暴露，以便形成外部电连接。模制料已被去除，以便说明引线框封装200的内部。
图7中所示的引线框封装200包括两个功率半导体单元片210。每个半导体单元片210可以用粘结剂如银膏贴附到半导体单元片盘106上，银膏在单元片贴附之后固化。每个半导体单元片210的有效表面包括多个焊接盘(没有显示)。每个焊接盘通过焊线240电连接到引线232。其上没有安装无源元件的终端盘108为焊线240提供安装表面。几个终端盘108显示为通过焊线240电连接到引线232。图7中所示的引线框封装200的配置可以改变，而不打算用来限制本发明的范围。封装200包括功率半导体元件和无源元件，然后可以安装到客户电路板上。
图8A-8C说明MLF基片的另一种实施方案。在该实施方案中，MLF基片302直接安装到客户电路板上。MLF基片302的配置基本上类似于先前在图2-6中所示的MLF基片102。类似于MLF基片102的MLF基片302中的元件(例如，终端盘108、永久连接条110等)保持相同的参考数字。
类似于MLF基片102，MLF基片302包括来自材料片301的单体结构。不管制造过程如何，图8A中所示的每个MLF基片302包括将MLF基片302连接到单片材料301的外框架304(参见图9A)。外框架304包括永久引线303和临时引线305。临时引线305固定MLF基片302，并且类似于临时连接条104最后在MLF基片302进行电测试之前从MLF基片302去除。临时连接条104和临时引线305可以同时或者在制造过程的不同阶段去除。如图8A和8C中所示，半导体单元片210和终端盘108经由至少一个焊线240直接电连接到永久引线303。
从MLF基片302去除临时引线305实际上将MLF基片302转变成无引线封装(参见图8C)。MLF基片302因此可以直接安装到客户电路板上。如先前所讨论的，模制料112填充到MLF基片的间隙中，并且不覆盖半导体单元片盘106的底面或终端盘108的底面。在该实施方案中，MLF基片302具有基本上均匀的厚度，如图8B中h所示。这样地，MLF基片302的整个底面310接触电路板。MLF基片302的一个优点在于从每个功率半导体单元片210散发出的热量通过半导体单元片盘106直接从其底面转移到客户电路板上，提供低的热阻抗。但是，缺点在于MLF基片302的不导电部分(例如，模制料112)也接触电路板。行业内的常规实践是跟踪沿着电路板顶面的轨道或轨迹，在该实施方案中电路板位于MLF基片302下面。MLF基片302的整个底面310接触电路板，当MLF基片安装到电路板上并且MLF基片302的底面310和电路板的顶面之间没有空间时，客户不能跟踪沿着电路板顶面的轨迹。
图9A-9B说明MLF基片302的又一种实施方案。在该实施方案中，MLF基片310的底面310具有台阶特性，以便允许客户跟踪沿着电路板顶面的轨迹。图9A说明在单片材料301中形成的四个MLF基片302。引线框模板300可以包括多于或少于四个MLF基片302。仅作为例子，可以通过冲压、刻蚀、研磨或激光制造过程来形成每个MLF基片302。
不管制造过程如何，图9A中所示的每个MLF基片302通过永久引线303和临时引线305连接到单片材料301。与图8A-8C中所示的MLF基片302不同，图9B中所示的MLF基片在底部或接触面312上具有台阶特性。在该实施方案中，当MLF基片302安装到电路板上时仅需要操作封装的盘(例如，永久引线303和半导体单元片盘106)接触电路板。优选地，当MLF基片302最初形成时形成MLF基片302的台阶特性。如图9B中所示，MLF基片302的底面312为半导体单元片盘106提供比模制料112延伸出更多的永久引线303。当MLF基片302安装到电路板上时，在引线303之间形成间隙314，从而可以在其间跟踪轨迹。间隙314还提供清洗电路板的优点。例如，MLF基片302的凸起底面允许用标准清洗设备清洗电路板，同时使MLF基片302下方的集水、溢出等的可能性达到最小，否则将导致电迁移等。
本发明的一个方面提供一种引线框基片，包括：
多个连接条；
适合于接收半导体单元片的半导体单元片盘；
通过所述多个连接条链接到一起并链接到所述半导体单元片盘的多个终端盘，所述多个终端盘的每个适合于接收无源元件和焊线；以及
将所述半导体单元片盘、所述多个终端盘，以及所述多个连接条固定在一起的模制料。
本发明的另一个方面提供一种引线框封装，包括：
具有中心部分的外壳和位于所述外壳周边附近的多个引线；以及
安装到所述中心部分上的引线框基片，所述引线框基片电连接到所述多个引线的至少一个并包括：
多个连接条；
适合于接收半导体单元片的半导体单元片盘；
多个终端盘，所述多个终端盘的每个适合于接收无源元件和焊线，所述多个终端盘通过所述多个连接条链接到一起并链接到所述半导体单元片盘；以及
将所述半导体单元片盘、所述多个终端盘，以及所述多个连接条固定在一起的模制料。
本发明的又一个方面提供一种引线框封装，包括：
具有中心部分的外壳和位于所述外壳周边附近的多个引线；
安装到所述中心部分上的引线框基片，所述引线框基片电连接到所述多个引线的至少一个并包括：
多个半导体单元片盘，所述多个半导体单元片盘的每个适合于接收半导体单元片；
多个终端盘，所述多个终端盘的每个适合于接收无源元件和焊线；
将所述多个终端盘和所述半导体单元片盘链接到一起的多个连接条；以及
应用到所述引线框基片上的模制料，所述模制料将所述多个半导体单元片盘、所述多个终端盘，以及所述多个连接条固定在一起。
本发明的另一个方面提供一种安装到电路板上的引线框基片，包括：
位于引线框基片周边附近的多个引线；
多个连接条；
多个半导体单元片盘，所述多个半导体单元片盘的每个适合于接收半导体单元片；
多个终端盘，所述多个终端盘的每个适合于接收无源元件和焊线，所述多个终端盘通过所述多个连接条链接到一起并链接到所述多个半导体单元片盘；以及
将所述多个半导体单元片盘、所述多个终端盘、所述多个连接条，以及所述多个引线固定在一起的模制料。
本发明的又一个方面提供一种引线框封装，包括：
具有包括导电和不导电部分的顶面的电路板；以及
安装到所述电路板的所述顶面上的引线框基片，包括：
位于所述引线框基片周边附近的多个引线；
多个连接条；
适合于接收半导体单元片的半导体单元片盘；
多个终端盘，所述多个终端盘的每个适合于接收无源元件和焊线，所述多个终端盘通过所述多个连接条链接到一起并链接到所述半导体单元片盘；以及
将所述半导体单元片盘、所述多个终端盘、所述多个连接条，以及所述多个引线固定在一起的模制料。
本发明的另一个方面提供一种制造引线框基片的方法，引线框基片被配置以接收半导体单元片和分立无源元件，该方法包括步骤：
(a)在导电材料片中形成引线框，引线框基片包括至少一个半导体单元片盘、多个终端盘，以及将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条；
(b)将模制料应用到所述步骤(a)中所形成的引线框基片上，模制料将半导体单元片盘、多个终端盘，以及多个临时和永久连接条固定在一起；以及
(c)从引线框基片中去除多个临时连接条。
本发明的又一个方面提供一种将半导体元件安装到引线框基片上的方法，包括步骤：
(a)在导电材料片中形成多个引线框基片，多个引线框基片的每个包括通过多个临时连接条和多个永久连接条链接到一起的至少一个半导体单元片盘和多个终端盘；
(b)将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上；
(c)从每个引线框基片中去除多个临时连接条；
(d)将粘合带应用到每个引线框基片的背面；
(e)将分立无源元件安装到终端盘上；
(f)将半导体单元片安装到每个半导体单元片盘上；
(g)形成焊接连接；以及
(h)在所述步骤(a)中所形成的每个引线框基片上应用封装材料，封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f)中所安装的半导体单元片，以及所述步骤(g)中所形成的焊接连接封装。
本发明的另一个方面提供一种将半导体元件安装到引线框基片上的方法，包括步骤：
(a)在材料片中形成多个引线框基片，多个引线框基片的每个包括至少一个半导体单元片盘和多个终端盘，半导体单元片盘和多个终端盘通过多个临时连接条和多个永久连接条链接到一起；
(b)将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上；
(c)将粘合带应用到每个引线框基片的背面；
(d)将分立无源元件安装到终端盘上；
(e)将半导体单元片安装到每个半导体单元片盘上；
(f)形成焊接连接；
(g)在所述步骤(a)中所形成的每个引线框基片上应用封装材料，封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f)中所安装的半导体单元片，以及所述步骤(g)中所形成的焊接连接封装；
(h)去除在所述步骤(c)中应用的粘合带；以及
(i)对每个引线框基片的背面应用刻蚀处理，以便去除多个临时连接条。
本发明的又一个方面提供一种制造引线框基片的方法，引线框基片被配置以接收半导体单元片和分立无源元件，该方法包括步骤：
(a)在材料片中形成引线框基片，引线框基片包括至少一个半导体单元片盘、多个终端盘、将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条，以及多个永久和临时引线；
(b)将模制料应用到步骤(a)中所形成的引线框基片上，模制料将半导体单元片盘、多个终端盘、多个临时和永久连接条，以及多个永久和临时引线固定在一起；以及
(c)从引线框基片中去除多个临时连接条和临时引线。
已为了说明和描述的目的提供本发明的优选实施方案的前面描述。它不打算做到无遗漏或者用来将本发明局限于所公开的精确形式。显然地，本领域技术人员容易想到许多修改和改变。选择和描述实施方案，以便最好地说明本发明的原理及其实际应用，从而允许本领域其他人员理解适合于所考虑的实际应用的对应各种实施方案和具有各种修改的发明。本发明的范围打算由下面的权利要求及其等价物来定义。

Claims (42)

1.一种引线框基片，包括：
多个连接条；
适合于接收半导体单元片的半导体单元片盘；
通过所述多个连接条链接到一起并链接到所述半导体单元片盘的多个终端盘，所述多个终端盘的每个被配置以接收无源元件和焊线；以及
将所述引线框基片的所述半导体单元片盘、所述多个终端盘，以及所述多个连接条固定在一起的模制料。
2.根据权利要求1的引线框基片，其中所述半导体单元片盘、所述多个终端盘，以及所述多个连接条具有来自共同材料件的单体结构。
3.根据权利要求1或2的引线框基片，其中所述半导体单元片盘、所述多个终端盘，以及所述多个连接条包括导热和导电材料。
4.根据前述权利要求的任一个的引线框基片，其中所述导热和导电材料包括铜。
5.根据前述权利要求的任一个的引线框基片，其中所述半导体单元片盘、所述多个终端盘，以及所述多个连接条包括顶面和底面。
6.根据权利要求5的引线框基片，其中所述模制料不覆盖所述顶面和底面。
7.根据前述权利要求的任一个的引线框基片，还包括位于引线框基片周边附近的多个引线。
8.根据权利要求7的引线框基片，其中所述模制料将所述多个引线固定在所述模制料中。
9.根据前述权利要求的任一个的引线框基片，其中所述多个连接条将所述半导体单元片盘电连接到所述多个终端盘。
10.根据前述权利要求的任一个的引线框基片，其中所述多个连接条将所述多个终端盘电连接到一起。
11.根据前述权利要求的任一个的引线框基片，其中所述多个连接条包括永久连接条和临时连接条。
12.根据权利要求11的引线框基片，其中所述临时连接条将所述多个终端盘固定到相对于彼此的适当位置。
13.根据权利要求11或12的引线框基片，其中在将引线框基片安装到引线框上之前从引线框基片中去除所述临时连接条。
14.根据前述权利要求的任一个的引线框基片，其中引线框基片包括基本上均匀的厚度。
15.根据前述权利要求的任一个的引线框基片，其中引线框基片被配置以安装到电路板上。
16.根据权利要求15的引线框基片，其中当引线框基片安装到电路板上时，仅所述半导体单元片盘和所述多个引线接触电路板。
17.根据权利要求1～16的任一个的引线框基片，引线框基片包括多个半导体单元片盘，所述多个半导体单元片盘的每个适合于接收半导体单元片，其中所述多个终端盘通过所述多个连接条链接到一起并链接到所述多个半导体单元片盘，并且所述模制料将所述引线框基片的所述多个半导体单元片盘、所述多个终端盘、所述多个连接条，以及所述多个引线固定在一起。
18.根据权利要求17的引线框基片，其中当引线框基片安装到电路板上时仅所述多个半导体单元片盘和所述多个引线接触电路板。
19.根据权利要求17或18的引线框基片，其中所述多个连接条将所述多个半导体单元片盘电连接到所述多个终端盘。
20.根据权利要求17～19的任一个的引线框基片，其中所述框架、所述多个连接条、所述多个半导体单元片盘，以及所述多个终端盘具有来自共同导电材料件的单体结构。
21.一种引线框封装，包括：
具有中心部分的外壳以及位于所述外壳周边附近的多个引线；以及
安装到所述中心部分上的根据权利要求1～16的引线框基片，所述引线框基片电耦连到所述多个引线的至少一个。
22.根据权利要求21的引线框封装，其中在将所述引线框基片安装到所述中心部分上之前从所述引线框基片中去除所述临时连接条。
23.根据权利要求21或22的引线框封装，还包括封装材料，所述封装材料将所述多个连接条每个的、所述半导体单元片盘的、所述多个终端盘每个的以及所述模制料的所述顶面封装。
24.一种引线框封装，包括：
具有中心部分的外壳以及位于所述外壳周边附近的多个引线；
安装到所述中心部分上的根据权利要求17～20的任一个的引线框基片，所述引线框基片电耦连到所述多个引线的至少一个。
25.根据权利要求21～24的任一个的引线框封装，其中所述外壳包括塑料。
26.一种引线框封装，包括：
具有包括导电部分和不导电部分的顶面的电路板；以及
安装到所述电路板的所述顶面上的根据权利要求1～20中任一个的引线框基片。
27.根据权利要求26的引线框封装，其中所述引线框基片的多个引线和所述引线框基片的所述半导体单元片盘电耦连到所述电路板的所述导电部分。
28.一种制造引线框基片的方法，引线框基片被配置以接收半导体单元片和分立无源元件，该方法包括步骤：
(a)在导电材料片中形成引线框基片，引线框基片包括至少一个半导体单元片盘、多个终端盘，以及将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条；
(b)将模制料应用到所述步骤(a)中所形成的引线框基片；以及
(c)从引线框基片中去除多个临时连接条。
29.根据权利要求28的方法，其中：
步骤(a)包括在导电材料中形成多个引线框基片，多个引线框基片的每个包括通过多个临时连接条和多个永久连接条链接到一起的至少一个半导体单元片盘和多个终端盘；
步骤(b)包括将模制料应用到所述步骤(a)中所形成的多个引线框基片的每个上；以及
步骤(c)包括从每个引线框基片中去除多个临时连接条。
30.根据权利要求29的方法在步骤(c)之后还包括步骤：
(d)将粘合带应用到每个引线框基片的背面；
(e)将分立无源元件安装到终端盘上；
(f)将半导体单元片安装到每个半导体单元片盘上；
(g)形成焊接连接；以及
(h)在所述步骤(a)中所形成的每个引线框基片上应用封装材料，封装材料将所述步骤(e)中所安装的分立无源元件、所述步骤(f)中所安装的半导体单元片，以及所述步骤(g)中所形成的焊接连接封装。
31.根据权利要求30的方法，还包括：
(i)将材料片分成独立单元，独立单元的每个包含引线框基片。
32.根据权利要求28～31的任一个的方法，其中所述步骤(b)中应用模制料还包括将该至少一个半导体单元片盘、多个终端盘、多个临时连接条，以及多个永久连接条固定在模制料中。
33.根据权利要求28～32的任一个的方法，其中所述步骤(a)中形成每个引线框基片通过冲压处理来实现。
34.根据权利要求28～32的任一个的方法，其中所述步骤(a)中形成每个引线框基片通过刻蚀处理来实现。
35.根据权利要求28～34的任一个的方法，其中所述步骤(c)中去除多个临时连接条通过冲压处理来实现。
36.根据权利要求28～34的任一个的方法，其中所述步骤(c)中去除多个临时连接条通过刻蚀处理来实现。
37.根据权利要求28～34的任一个的方法，其中所述步骤(c)中去除多个临时连接条通过激光切割处理来实现。
38.根据权利要求28～34的任一个的方法，其中所述步骤(c)中去除多个临时连接条通过研磨处理来实现。
39.根据权利要求28的方法在步骤(b)和(c)之间还包括步骤：
(i)将粘合带应用到每个引线框基片的背面；
(ii)将分立无源元件安装到终端盘上；
(iii)将半导体单元片安装到每个半导体单元片盘上；
(iv)形成焊接连接；
(v)在所述步骤(a)中所形成的每个引线框基片上应用封装材料，封装材料将所述步骤(ii)中所形成的分立无源元件、所述步骤(iii)中所安装的半导体单元片，以及所述步骤(iv)中所形成的焊接连接封装；以及
(vi)去除所述步骤(i)中所应用的粘合带；以及
其中步骤(c)包括将刻蚀处理应用到每个引线框基片的背面以去除多个临时连接条。
40.根据权利要求28～39的方法，其中：
步骤(a)包括在材料片中形成引线框基片，其中引线框基片包括至少一个半导体单元片盘、多个终端盘、将半导体单元片盘和多个终端盘链接到一起的多个临时和永久连接条，以及多个永久和临时引线；
步骤(b)包括将模制料应用到所述步骤(a)中所形成的引线框基片上，模制料将半导体单元片盘、多个终端盘、多个临时和永久连接条，以及多个永久和临时引线固定在一起；以及
步骤(c)包括从引线框基片中去除多个临时连接条和临时引线。
41.根据权利要求40的方法，其中在所述步骤(a)中形成引线框基片时形成比终端盘、临时连接条，以及临时引线更厚的半导体单元片盘和永久引线。
42.根据权利要求40或41的方法，其中多个永久或临时引线位于所述步骤(a)中所形成的引线框基片的周边附近。
CNB2004800176395A 2003-06-23 2004-06-09 微引线框封装及制造微引线框封装的方法 Expired - Fee Related CN100435329C (zh)

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