CN1649124A - 制造半导体装置的方法 - Google Patents
制造半导体装置的方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 229910052735 hafnium Inorganic materials 0.000 claims abstract description 58
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims abstract description 57
- 230000004888 barrier function Effects 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000004519 manufacturing process Methods 0.000 claims abstract description 6
- 239000010949 copper Substances 0.000 claims description 45
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 44
- 229910052802 copper Inorganic materials 0.000 claims description 44
- 238000005530 etching Methods 0.000 claims description 20
- 239000004411 aluminium Substances 0.000 claims description 13
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 13
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 13
- 229910052721 tungsten Inorganic materials 0.000 claims description 13
- 239000010937 tungsten Substances 0.000 claims description 13
- 238000009792 diffusion process Methods 0.000 claims description 10
- 238000001465 metallisation Methods 0.000 claims description 10
- 238000005240 physical vapour deposition Methods 0.000 claims description 9
- 230000009467 reduction Effects 0.000 claims description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 238000000137 annealing Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 3
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- 239000000463 material Substances 0.000 abstract description 7
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- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 37
- 229960004643 cupric oxide Drugs 0.000 description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 239000001301 oxygen Substances 0.000 description 9
- 229910052760 oxygen Inorganic materials 0.000 description 9
- 239000005751 Copper oxide Substances 0.000 description 7
- 229910000431 copper oxide Inorganic materials 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
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- 230000008021 deposition Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- BERDEBHAJNAUOM-UHFFFAOYSA-N copper(i) oxide Chemical compound [Cu]O[Cu] BERDEBHAJNAUOM-UHFFFAOYSA-N 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 238000011066 ex-situ storage Methods 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
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- 238000004806 packaging method and process Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001603 reducing effect Effects 0.000 description 1
- 230000002000 scavenging effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
本发明提供了一种制造半导体装置的方法，通过该方法利用铪作为阻挡层材料可以将通道蚀刻后的铜表面上的氧化物去除。该方法包括以下步骤：在基片上的至少一个保护绝缘层上形成铜线；在保护绝缘层上形成通孔，以露出铜线的一部分；在通孔中形成含铪层，以覆盖嵌入的铜线的露出部分；以及在含铪层上形成导电层。
Description
本申请要求于2003年12月30日提交的韩国申请第P2003-0100978号的优先权，将其结合于此作为参考。
技术领域
本发明涉及一种制造半导体装置的方法，通过该方法，具有良好特性的铜/铪界面的铜线可以利用Hf(铪)、有效的去氧剂或集氧器形成，以去除粘附到铜线上的氧(以氧化铜层的形式)。
背景技术
通常，铜是常用的连接金属线的材料。目前，实际上顶层(即，在焊垫和封装件之间的布线部分)使用铝。由于铜表面是很容易氧化的，因此氧可以通过氧化铜表面扩散到下部金属层，从而引起包含在下层中的铜的腐蚀。而且，众所周知，铝衬垫非常有利于在封装元件上布线。
图1是传统铜布线的横截面图。参照图1，将铜线11嵌入第一绝缘层12中。氧化物、氮化物、或聚合物的第二绝缘层13形成在第一绝缘层12上。阻挡层14和铝层15依次层叠在铜线11上。在这种情况下，在铜线11上进行RF蚀刻预清洗或化学湿法清洗，以从铜线11的表面去除氧化铜层。
然而，传统的金属布线方法有时不能去除铜表面的氧化物，或者在其他情况下，过度蚀刻铜线导致在下层的铜线降解。
发明内容
因此，本发明涉及一种制造半导体装置的方法，其基本上避免了由于现有技术的限制和缺点而导致的一个或多个问题。
本发明的目的是提供一种制造半导体装置的方法，通过该方法利用Hf(铪)作为阻挡层材料，可将通道蚀刻(via-etch)后的铜表面上的氧化物用热力去除(例如，清除)。
本发明的其它的优点、目的、和特征，部分地在随后的描述中给出，部分地对本领域普通技术人员来说可从下述描述中明显看出，或可从本发明的实施中得知。本发明的目的和其它优点可从以下书面描述、权利要求、以及附图中具体指出的结构来理解和获得。
为了实现这些目的和其它优点，并与本发明的目的一致，如同这里所实施和广泛描述的，根据本发明的制造半导体装置的方法包括以下步骤：在基片的铜线上形成至少一个保护绝缘层；在至少一个保护绝缘层中形成通孔，以露出铜线的一部分；在通孔中形成铪层，以覆盖嵌入的铜线的露出部分；以及在包含铪层的基片上形成导电层。
优选地，铪层的厚度约为50至500。
优选地，铪层通过离子化(ionized)物理汽相淀积形成。
优选地，该方法还包括在形成铪层之前，利用Ar+离子进行RF蚀刻预清洗的步骤。更优选地，RF蚀刻预清洗去除厚度约为10至100的至少一个保护绝缘层。
优选地，通过铪层还原铜线的露出部分上形成的氧化层。
优选地，在铪层上的导电层包含铝。
优选地，导电层形成的步骤包括以下步骤：在铪层上形成HfNx层；在通孔中的铪层上形成钨插头；以及将铝淀积在包含钨插头的基片上。更优选地，HfNx层通过快速热退火或炉内退火形成。
优选地，导电层形成的步骤包括以下步骤：淀积选自由TiN、Ta、和TaN组成组中的一种材料；以及在淀积的这种材料上形成钨插头(plug)。
可以理解的是，本发明的上述一般性描述和以下的详细描述都是说明性的和示范性的，其目的是对本发明提供进一步的说明。
附图说明
附图可提供对本发明的进一步的理解，并且被包括在内作为说明书的组成部分，其示出了本发明的实施例，并且和说明书一起用来解释本发明的原理。在附图中：
图1是传统的铜布线的横截面图；以及
图2A至图2D是用于解释制造半导体装置的方法的横截面图。
具体实施方式
现参照附图对本发明的优选实施例进行详细说明。尽可能地，在整个附图中相同或相似的部件用相同的附图标号表示。
首先，本发明涉及金属化结构以及在铜布线上形成金属线的方法，更具体而言，涉及一种去除在通孔底部的铜线上形成的CuOx层(例如，天然氧化物)而不用RF蚀刻或预清洗通孔的方法。
也就是说，本发明涉及一种在通孔中淀积衬里(liner)的方法，其通过还原CuOx可以确保良好的通孔电阻，避免在衬里(例如，铪)内大量形成氧化物，并且通过将Hf(铪)淀积到通孔中以及淀积到铜的露出表面上，形成在铜下面的导电(例如，金属)界面，而不利用传统的RF蚀刻预清洗方法。
同时，本发明的特征在于利用含铪层作为粘合层和/或阻挡层。铪是一种具有良好的与氧反应能力的金属，在完成通道蚀刻后不利用传统RF蚀刻预清洗，还原可能存在于通道底部的CuOx层，从而将清洁的和/或导电的界面设置到铜表面，从而确保良好的铜/铝界面电阻。
就用铪热力学还原CuOx而言，HfO2的吉布斯能在298K下是-352KJ/mol，而CuO的吉布斯能在298K下是-297KJ/mol。因此，将天然CuOx的氧集中到CuOx层上的铪层，由此铜可以具有清洁的表面。在淀积铪的情况下，将位于通道低部和下部铜线之间的界面的CuOx有效地去除，以确保低的通道电阻，同时可以完整地保持通道蚀刻轮廓(profile)，而不发生当利用RF蚀刻预清洗以去除氧化铜时可能导致的通道轮廓变形或CD(临界尺寸)膨胀。即使在底部区域上铪层比约50更薄，它可以确保其足够的电阻。
图2A至图2D是用于解释制造半导体装置的方法的横截面图。
参照图2A，通过在半导体基片21上进行各种材料的传统淀积、光刻、蚀刻、淀积、以及平坦化，铜的下部线22、第一绝缘层23、以及第二绝缘层24形成被图案化，以形成与具有衬垫(未示出)的线22连通的通孔。然而，在形成通道插头之前需要去除形成在通孔底部的CuOx25的步骤。
参照图2B，代替利用传统的湿法或干法预清洗，将用于还原氧化铜层中铜的含铪层26通过PVD(物理汽相淀积)或铪靶溅射或CVD(化学汽相淀积)在如图2A所示的结构上淀积50-500厚。在这种情况下，淀积的铪层26，其氧化物在热力学上比天然CuOx层更稳定，将CuOx还原成Cu，而集中的或清除的氧在铪层(而不形成氧化铪层)溶解，并且贯穿铪层扩散，从而铜/铪界面27可以有良好的通道电阻。然而，衬层26通常包含铪和一些小百分含量的溶解氧；因此，可以将它作为“含铪”层，其特征在于它还可以包含其他材料(例如，包含氮和/或具有与铪类似特性的其他金属)。
参照图2C，铝或铜层28可以直接淀积在含铪层上，以形成金属线28。将在下面描述，铝或铜层28还可以包含在它和沉积的含铪层26之间下面的传统扩散阻挡层(diffusion barrier layer)。
参照图2D，在通孔中形成钨(W)插头29，优选地，形成Hf/HfNx分别作为粘合层和阻挡层，通过在氮(例如，N2)气氛下快速热退火或炉内退火，以将铪层的表面转化成HfNx层30。优选地，HfNx层30主要包含HfN和/或Hf3N4。随后，钨插头29形成在通孔中。即，当通过退火形成的HfNx层作为扩散阻挡层时，钨插头29通过CVD形成在HfNx层上。然后，铝层31形成在包含钨插头29的基片上，以完成金属布线。可选地，钨插头29和铝层31可以用传统的(镶嵌或双层镶嵌)铜金属化代替。
可选地，HfNx层可以通过PVD(从HfNx靶)或溅射、通过在高真空状态下原位CVD淀积HfNx，或者在另一个室或装置中通过非原位淀积(或者通过上述方法)HfNx，从而用作铝和/或钨插头的阻挡层。
可选地，TiN、Ta、或TaN扩散阻挡层可以用与上述HfNx膜构成Hf/TiN、Hf/Ta、或Hf/TaN结构的相同方式形成在铪层26上。在淀积铪时，将淀积温度设定在室温与400℃之间，并且进行退火(例如，在300-400℃之间进行1-30分钟)以还原CuOx。
可选地，Hf或HfNx层可以通过离子化PVD形成，其中将铪进行电离用于通过PVD在氧化铜层上淀积(其中，HfNx的形成可以包括在氮气氛下铪的离子化PVD)。如果这样做，电离的铪的加速度和直接操纵性能相对于常见的PVD或溅射有所改善，从而在将Hf/HfNx层淀积在氧化铜层上时，可以通过物理冲击或类似方法实现(或激活)氧化铜层的还原。
可选地，在完成RF蚀刻预清洗后，可以形成或淀积Hf或HfNx层。如果这样做，在最小化RF蚀刻时间后，可以将铪进行淀积，从而最小化在RF蚀刻期间由Ar+离子导致的通道轮廓变形。即，在通过Ar+离子激活氧化铜后，可以增强铪层的还原性能。在进行RF蚀刻时，关于第一或第二绝缘层的热氧化硅(SiOx)去除的厚度设定为10-100。因此，在RF蚀刻预清洗期间，通过铪层氧化铜层的最小物理轰击可足以激活其还原，并且最小化通道轮廓变形。
因此，本发明利用铪淀积而不是蚀刻预清洗，在通道插头变形前去除氧化铜，从而阻止或最小化(1)通过干蚀刻预清洗的通孔的临界尺寸(CD)的增加；以及(2)沿着铜表面氧化铜的侵蚀。而且，本发明可以根据维持设计通道(via)CD，阻止在湿蚀刻预清洗期间由清洗溶液增加的通道底部面积，并且阻止氧或湿气通过衬垫扩散到铜布线(由于铪层的氧清除性质而致)。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。
Claims (18)
1.一种制造半导体装置的方法，包括以下步骤：
在基片的铜线上形成至少一个保护绝缘层；
在所述至少一个保护绝缘层上形成通孔，以露出所述铜线的一部分；
在所述通孔中形成含铪层，以覆盖所述铜线的露出部分；
以及
在包括所述含铪层的所述基片之上形成导电层。
2.根据权利要求1所述的方法，其中所述含铪层具有从约50至约500的厚度。
3.根据权利要求1所述的方法，其中形成所述含铪层的步骤包括离子化物理汽相淀积铪或铪前体。
4.根据权利要求1所述的方法，还包括在形成所述含铪层之前，利用Ar+离子进行RF蚀刻预清洗的步骤。
5.根据权利要求4所述的方法，其中所述RF蚀刻预清洗去除约10至约100厚度的所述至少一个保护绝缘层。
6.根据权利要求1所述的方法，其中通过所述含铪层还原在所述嵌入的铜线的露出部分上的氧化层。
7.根据权利要求1所述的方法，其中所述导电层包含Al。
8.根据权利要求1所述的方法，其中所述导电层的形成步骤包括以下步骤：
在所述含铪层上形成HfNx层；
在所述通孔中的所述HfNx层上形成钨插头；以及
在包含所述钨插头的所述基片上淀积Al。
9.根据权利要求8所述的方法，其中所述HfNx层形成的步骤包括快速热退火或炉内退火。
10.根据权利要求1所述的方法，其中所述导电层形成的步骤包括以下步骤：
淀积选自由TiN、Ta、和TaN组成的组的成分；以及
在所述淀积成分上形成钨插头。
11.一种用于半导体装置的金属化结构，包括：
铜线，位于基片上；
至少一个保护绝缘层，其中具有通孔，以露出所述铜线的一部分；
含铪层，位于所述通孔中，以覆盖所述铜线的所述露出部分；以及
导电层，位于所述含铪层上。
12.根据权利要求11所述的金属化结构，其中所述含铪层具有约50至约500的厚度。
13.根据权利要求11所述的金属化结构，还包括在所述含铪层上的包含HfNx的阻挡层。
14.根据权利要求11所述的金属化结构，其中所述导电层包含铝和/或铜。
15.根据权利要求14所述的金属化结构，其中所述导电层还包括在所述含铪层和所述导电层之间的扩散阻挡层。
16.根据权利要求15所述的金属化结构，其中所述导电层包含铜，而所述扩散阻挡层包含HfNx、TiN、Ta或TaN。
17.根据权利要求15所述的金属化结构，其中所述导电层包含Al，而所述扩散阻挡层包含TiN或HfNx。
18.根据权利要求17所述的金属化结构，其中所述导电层还包括在所述铝和所述扩散阻挡层之间的钨插头。
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| CN110957261A (zh) * | 2018-09-26 | 2020-04-03 | 长鑫存储技术有限公司 | 一种半导体器件互连结构阻挡层的制备方法 |
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| KR100574560B1 (ko) * | 2004-12-31 | 2006-04-27 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속배선 형성 방법 |
| KR100763697B1 (ko) * | 2006-09-01 | 2007-10-04 | 동부일렉트로닉스 주식회사 | Ｖｉａ ｍｉｍ 공정에서 텅스텐 스터드 레지듀 방지방법 |
| US7713866B2 (en) * | 2006-11-21 | 2010-05-11 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110957261A (zh) * | 2018-09-26 | 2020-04-03 | 长鑫存储技术有限公司 | 一种半导体器件互连结构阻挡层的制备方法 |
| CN110957261B (zh) * | 2018-09-26 | 2022-11-01 | 长鑫存储技术有限公司 | 一种半导体器件互连结构阻挡层的制备方法 |
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| KR20050070769A (ko) | 2005-07-07 |
| JP2005197710A (ja) | 2005-07-21 |
| US7098134B2 (en) | 2006-08-29 |
| KR100573897B1 (ko) | 2006-04-26 |
| DE102004063702B4 (de) | 2008-01-31 |
| US20050153116A1 (en) | 2005-07-14 |
| DE102004063702A1 (de) | 2005-09-22 |
| CN100338756C (zh) | 2007-09-19 |
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