JP2005197710A - 半導体装置製造方法 - Google Patents
半導体装置製造方法 Download PDFInfo
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- JP2005197710A JP2005197710A JP2004376944A JP2004376944A JP2005197710A JP 2005197710 A JP2005197710 A JP 2005197710A JP 2004376944 A JP2004376944 A JP 2004376944A JP 2004376944 A JP2004376944 A JP 2004376944A JP 2005197710 A JP2005197710 A JP 2005197710A
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- 238000000034 method Methods 0.000 title claims abstract description 23
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 11
- 230000001681 protective effect Effects 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims description 15
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 11
- 229910052721 tungsten Inorganic materials 0.000 claims description 11
- 239000010937 tungsten Substances 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 9
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000005240 physical vapour deposition Methods 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 150000002500 ions Chemical class 0.000 claims description 4
- 239000010949 copper Substances 0.000 abstract description 52
- 230000004888 barrier function Effects 0.000 abstract description 7
- 229910052735 hafnium Inorganic materials 0.000 abstract description 6
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052802 copper Inorganic materials 0.000 abstract description 5
- 229910016553 CuOx Inorganic materials 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 230000002000 scavenging effect Effects 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
- Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
- Y10T428/264—Up to 3 mils
- Y10T428/265—1 mil or less
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】 本方法は、基板上の少なくとも1つの保護絶縁層内に埋込まれた銅ラインを形成させるステップと、上記少なくとも1つの保護絶縁層内にバイアホールを形成して上記埋込まれた銅ラインの一部分を露出させるステップと、上記バイアホール内にハフニウム層を形成させ、上記埋込まれた銅ラインの露出された部分を上記ハフニウム層によってカバーするステップと、上記ハフニウム層を含む上記基板上に導電性層を形成させるステップとを含む。
【選択図】 図2c
Description
22:下側配線
23:第1絶縁層
24:第2絶縁層
25:CuOx
26:Hf
27:Cu/Hf界面
28:Al
29:タングステンプラグ
30:HfNx層
31:Al
Claims (10)
- 半導体装置製造方法であって、
基板上の少なくとも1つの保護絶縁層内に埋込まれたCuラインを形成させるステップと、
上記少なくとも1つの保護絶縁層内にバイアホールを形成して上記埋込まれたCuラインの一部分を露出させるステップと、
上記バイアホール内にHf層を形成させ、上記埋込まれたCuラインの露出された部分を上記Hf層によってカバーするステップと、
上記Hf層を含む上記基板上に導電性層を形成させるステップと、
を含むことを特徴とする半導体装置製造方法。 - 上記Hf層は、50乃至500Å厚に形成されることを特徴とする請求項1に記載の方法。
- 上記Hfは、イオン化物理蒸着によって形成されることを特徴とする請求項1に記載の方法。
- 上記方法は更に、Hf層を形成させる前に、Ar+イオンを使用するRFエッチング予備洗浄を行うステップを含むことを特徴とする請求項1に記載の方法。
- 上記上記少なくとも1つの保護絶縁層は、それに対して上記RFエッチング予備洗浄を行うために、10乃至100Åに形成されることを特徴とする請求項4に記載の方法。
- 上記埋込まれたCuラインの露出された部分上に形成される酸化物層は、Hf層によって還元されることを特徴とする請求項1に記載の方法。
- 上記導電性層は、上記Hf層上にAlを堆積させることによって形成させることを特徴とする請求項1に記載の方法。
- 上記導電性層を形成させるステップは、
上記Hf層上にHfNx層を形成させるステップと、
上記バイアホール内のHf層上にタングステンプラグを形成させるステップと、
上記タングステンプラグを含む上記基板上にAlを堆積させるステップと、
を含むことを特徴とする請求項1に記載の方法。 - 上記HfNx層は、迅速アニールまたは炉アニールによって形成させることを特徴とする請求項8に記載の方法。
- 上記導電性層を形成させるステップは、
TiN、Ta、及びTaNからなるグループから選択された材料を堆積させるステップと、
上記堆積された材料上にタングステンプラグを形成させるステップと、
を含むことを特徴とする請求項1に記載の方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030100978A KR100573897B1 (ko) | 2003-12-30 | 2003-12-30 | 반도체 제조 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2005197710A true JP2005197710A (ja) | 2005-07-21 |
Family
ID=34737937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004376944A Pending JP2005197710A (ja) | 2003-12-30 | 2004-12-27 | 半導体装置製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7098134B2 (ja) |
JP (1) | JP2005197710A (ja) |
KR (1) | KR100573897B1 (ja) |
CN (1) | CN100338756C (ja) |
DE (1) | DE102004063702B4 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100574560B1 (ko) * | 2004-12-31 | 2006-04-27 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속배선 형성 방법 |
KR100763697B1 (ko) * | 2006-09-01 | 2007-10-04 | 동부일렉트로닉스 주식회사 | Via mim 공정에서 텅스텐 스터드 레지듀 방지방법 |
US7713866B2 (en) * | 2006-11-21 | 2010-05-11 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
CN110957261B (zh) * | 2018-09-26 | 2022-11-01 | 长鑫存储技术有限公司 | 一种半导体器件互连结构阻挡层的制备方法 |
Citations (7)
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2003
- 2003-12-30 KR KR1020030100978A patent/KR100573897B1/ko not_active IP Right Cessation
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2004
- 2004-12-27 JP JP2004376944A patent/JP2005197710A/ja active Pending
- 2004-12-28 DE DE102004063702A patent/DE102004063702B4/de not_active Expired - Fee Related
- 2004-12-29 US US11/027,839 patent/US7098134B2/en not_active Expired - Fee Related
- 2004-12-30 CN CNB2004101041819A patent/CN100338756C/zh not_active Expired - Fee Related
Patent Citations (7)
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JPH0191438A (ja) * | 1987-10-02 | 1989-04-11 | Toshiba Corp | 半導体装置 |
JPH0774243A (ja) * | 1993-06-30 | 1995-03-17 | Kawasaki Steel Corp | 半導体装置の製造方法 |
JPH1187510A (ja) * | 1997-07-10 | 1999-03-30 | Kawasaki Steel Corp | 配線構造およびこの配線構造の形成方法ならびにこの配線構造を適用する半導体集積回路 |
JP2001035921A (ja) * | 1999-07-26 | 2001-02-09 | Matsushita Electronics Industry Corp | 半導体装置及びその製造方法 |
JP2003152015A (ja) * | 2001-03-01 | 2003-05-23 | Toshiba Corp | 半導体装置、半導体装置の製造方法 |
JP2004296621A (ja) * | 2003-03-26 | 2004-10-21 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP2005150280A (ja) * | 2003-11-13 | 2005-06-09 | Toshiba Corp | 半導体装置の製造方法及び半導体製造装置 |
Also Published As
Publication number | Publication date |
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DE102004063702B4 (de) | 2008-01-31 |
US20050153116A1 (en) | 2005-07-14 |
US7098134B2 (en) | 2006-08-29 |
CN1649124A (zh) | 2005-08-03 |
KR100573897B1 (ko) | 2006-04-26 |
DE102004063702A1 (de) | 2005-09-22 |
CN100338756C (zh) | 2007-09-19 |
KR20050070769A (ko) | 2005-07-07 |
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