CN1337741A - 具有可注入导电区的半导体封装件及其制造方法 - Google Patents

具有可注入导电区的半导体封装件及其制造方法 Download PDF

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Publication number
CN1337741A
CN1337741A CN00131634A CN00131634A CN1337741A CN 1337741 A CN1337741 A CN 1337741A CN 00131634 A CN00131634 A CN 00131634A CN 00131634 A CN00131634 A CN 00131634A CN 1337741 A CN1337741 A CN 1337741A
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China
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conduction region
semiconductor package
package part
inject
injected
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CN00131634A
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姜兴洙
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Kostat Semiconductor Co Ltd
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Kostat Semiconductor Co Ltd
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Publication of CN1337741A publication Critical patent/CN1337741A/zh
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Abstract

一种半导体封装件,它具有可注入导电区,以简化半导体封装件的制造,通过降低原材料的价格而降低制造成本并改善半导体封装件的电、热和机械性能,并提供了其制造方法。该半导体封装件包括一个半导体封装件体和固定在半导体封装件体上并在模制处理完成之后从被用作半导体封装件的基底的带膜上分离的可注入导电区。被用作基底的带膜在模制处理之后被从半导体封装件体分离,从而使半导体封装件体中不包括基底。

Description

具有可注入导电区的半导体封装件及其制造方法
本发明涉及一种半导体封装件及其制造方法,更具体地说,是涉及一种芯片规模封装(CSP),它不包括引线或采用焊球来取代引线。
近来,诸如个人计算机、蜂窝电话和可携式摄象机的电子产品变得尺寸越来越小而处理能力越来越大。因此,要求尺寸小、容量大且符合快速处理速度的半导体封装。因此,半导体封装件已经从包括双入线封装(DIP)的插入安装式转变成包括一个薄而小的出线封装(TSOP)、一个薄的四边形扁平封装(TQFP)和一个球栅阵列(BGA)的表面安装式。
在表面安装式中,BGA特别吸引人们的注意,因为它能够使半导体封装件的尺寸和重量大大地减小,并能够在芯片规模封装中实现高质量和可靠性。
图1至3显示了采用刚性基底的传统BGA封装的结构。图1是采用刚性基底的传统BGA封装的剖视图。图2是传统BGA封装的部分切去的平面图。图3是传统BGA封装的底视图。
参见图1至3,在一种典型的BGA封装中,半导体封装件利用一种刚性基底10而不是导线框而得到组装。换言之,半导体芯片6用模接合环氧树脂5接合到刚性基底10的表面上。形成在刚性基底10上的一个接合指2用金线4与半导体芯片6的一个接合台相连。在完成了导线接合之后,刚性基底10和半导体芯片6用作为密封树脂7的环氧模制化合物(EMC)模制。随后,一个作为外部连接端的焊球13被连接到一个焊球座即一个电路图案上,该电路图案通过形成在刚性基底10中的一个通孔9而把刚性基底10中的顶部连接到底部。
在这些图中,标号1表示形成在刚性基底10的正表面上的一个焊料掩膜,标号3表示一个前导电区,标号11表示一个后焊料掩膜,且标号12表示一个绝缘基底。在图3中,标号6’表示半导体芯片6的接合位置。
在采用刚性基底的传统BGA封装中,必须形成通孔9以及前和后导电区,以连接外部连接端。由于在这种设置中在半导体封装件内形成有很多中间连接端,半导体芯片中的接合台与外部连接端之间的互连长度长,因而恶化了半导体封装件的导电性。
另外,用于绝缘和保护刚性基底10的前和后表面上的导电区的前和后焊料掩膜1和11,在半导体封装件完成组装之后,会发生叠置脱离,因而减小了半导体封装件的可靠性。
刚性基底10必须包括一个绝缘基底12。绝缘基底12在半导体封装件被完成封装之后保持在半导体封装件内。因此,半导体封装件内的绝缘基底12的厚度限制了BGA封装的厚度的减小。
另外,很多其他的部分与刚性基底一起被封装在半导体封装件中。由于很多部分的热膨胀系数的不同而产生的缺陷,降低了半导体封装件的可靠性。
图4至6显示了采用基底的传统BGA封装的结构,其中导电区被形成在一个带膜上。图4是显示采用基底的传统BGA封装的剖视图,其中导电区被形成在一个带膜上。图5是图4的部分切去的平面图。图6是图4的底视图。
参见图4至6,其上形成有导电区的一个带膜23被用来取代刚性基底。通过进行穿孔或蚀刻处理以形成孔,在带膜23上形成有导电区,而带膜23是用聚酰胺树脂形成的绝缘基底。具有导电区的带膜23被用作半导体封装件组装中的基底。
因此,在带膜23上形成了一个前焊料掩膜21和一个后焊料掩膜28,用于绝缘和保护导电区。包括前和后焊料掩膜21和28的带膜23在半导体封装件组装完成之后仍然是半导体封装件的一部分。
在这些图中,标号22表示一个接合指,标号24表示一个金线,标号25表示一个模接合环氧树脂,标号26表示一个半导体芯片,标号27表示密封树脂,标号29表示一个焊球台,且标号30表示一个焊球。在图6中,标号26’表示半导体芯片26的接合位置。
然而,采用其中形成有导电区的带膜的BGA封装要求额外的处理,诸如穿孔或蚀刻,以形成把焊料台29连接到接合指22的孔。然而,在半导体封装件组装完成之后仍然在半导体封装件内的带膜23妨碍了半导体封装件的厚度的减小。另外,带膜23与封装在半导体封装件内的其他部分的热膨胀系数差异导致了各种缺陷,因而降低了半导体封装件的可靠性。
图7至9显示了传统的四边形扁平无引线(QFN)封装的结构。图7是传统的QFN封装的剖视图。图8是图7的切去的平面图。图9是图7的底视图。
参见图7至9,一种半导体芯片44用模接合环氧树脂43接合到作为散热器的芯片台50上,并接合到只包括一个内部引线41的引线框49上,且利用金线42进行导线接合。随后,引线框49和半导体芯片44用密封树脂45进行模制,密封树脂45为EMC。
在这些图中,标号51表示进行接地接合的一个区,标号52表示其中进行通常的输入/输出端接合的一个区。标号53表示用于半导体封装件的输入/输出端的一个内部引线,标号54表示用于接地端的一个内部引线。
然而,对于传统的QFN封装,引线框49应该用铜或铜的合金制成,且这种引线框49在半导体封装件组装完成之后仍然是半导体封装件的一部分,因而妨碍了半导体封装件的厚度的减小。另外,在把单个的半导体封装件从一串半导体封装件上分割的处理中,把包括引线框49的半导体封装件取下是困难的,因而造成了很多缺陷。另外,用于输入/输出端的很多内部引线53限制了它们所占据的半导体封装件内的空间。
为了解决上述问题,本发明的第一个目的,是提供一种半导体封装件,它具有可注入导电区,用于简化半导体封装件的制造、通过减小原材料的价格而降低制造成本并改善半导体封装件的电、热和机械性能。
本发明的第二个目的,是提供一种方法,用于制造具有可注入导电区的半导体封装件。
相应地,为了实现本发明的第一个目的,提供了一种具有可注入导电区的半导体封装件,包括:一个半导体封装件体,它包括一个半导体芯片但不包括引线框或基底,该半导体封装件体由密封树脂制成;以及,附在半导体封装件体表面上的向外暴露的可注入导电区,每一个可注入导电区都与半导体芯片的接合台电连接。
在一个优选实施例中,可注入导电区从一个直到模制处理完成都被用作基底的带膜上分离。各个可注入导电区的厚度在几μm与几mm之间,且其形状是四边形或圆形的。
半导体封装件体是球栅阵列(BGA)式的、四边形扁平无引线(QFN)式的或反装芯片式的。当半导体芯片通过导线与可注入导电区相连时,半导体芯片的底部优选为用导热模接合环氧树脂或导电模接合环氧树脂而附在可注入导电区,且用于导线接合的表面处理层优选的被形成在附在半导体封装件体上的各个可注入导电区的一面上。
当半导体封装件体是BGA型或反装芯片型时,优选为在可注入导电区不与半导体封装件体连接的面上还形成有外部连接端。这些外部连接端可以用焊料涂覆或焊球形成。
当半导体封装件体是反装芯片型时,优选为在接合台上形成有焊料凸起部,用于直接把半导体芯片的接合台连接到可注入导电区。另外,可采用一种扩展的可注入导电区,它是通过借助导线而把同焊料凸起部相连的可注入导电区连接到与外部连接端相连的可注入导电区而形成的。
该可注入导电区包括用于输入/输出端的可注入导电区、用于接地的可注入导电区、用于散热器的可注入导电区和用于功率端的可注入导电区。用于接地的可注入导电区和用于散热器的可注入导电区可彼此相连,且用于功率端的可注入导电区可彼此相连。
为了实现本发明的第二个目的,提供了具有可注入导电区的半导体封装件的一种制造方法。在此方法中,一个半导体芯片被附在一个临时基底上,在该基底上在一个带膜上形成有可注入导电区。半导体芯片的接合台被连接到可注入导电区。随后,临时基底和半导体芯片借助密封树脂而被模制。该带膜被从模制所形成的结构上分离,形成了经历了模制的半导体封装件体中的可注入导电区。
具有可注入导电区的半导体封装件的制造方法可以根据半导体封装件的类型而进行修正。
在本发明的一个优选实施例中,带膜由直到模制处理完成都基本上被用作基底的一个带体和容易与可注入导电区分离的一种粘合层构成。
用于导线接合的表面处理层优选为是被形成在各个可注入导电区的一面上,且这些可注入导电区包括用于外部连接端的可注入导电区和用于散热器的可注入导电区。
在模制处理中,液化的模制材料借助一个进料器而被提供到临时基底,或者热固树脂可利用模制设备进行模制。
用于接地的可注入导电区和用于散热器的可注入导电区可彼此相连,且用于功率端的可注入导电区可彼此相互电连接。
在另一最佳实施例中,在模制步骤之后或在分割处理之后进行把带膜从临时基底上分离的步骤。
根据本发明,可在不用诸如具有通孔或引线框的带膜或刚性基底的昂贵材料的情况下组装半导体封装件,从而简化了制造处理并降低了制造成本。
另外,用于散热器的可注入导电区可直接附在半导体芯片上以被暴露于外,从而改善了半导体封装件的热性能。由于半导体芯片的接合台与外部连接端之间的电连线通路可得到缩短,半导体封装件的电特性能够得到改善。通过从半导体封装件中除去基底或引线框和焊料掩膜,由于热膨胀系数之间的不同和叠置脱离而造成的缺陷(这些缺陷可引起可靠性降低)能够得到限制,且半导体封装件的厚度能够得到减小,从而改善了半导体封装件的机械特性。
从以下结合附图对本发明的最佳实施例所进行的详细描述,本发明的上述目的和优点将变得显而易见。在附图中:
图1至3显示了采用刚性基底的传统球栅阵列(BGA)封装的结构;
图4至6显示了采用其中在带膜上形成导电区的基底的传统BGA封装的结构;
图7至9显示了传统的四边形扁平无引线(QFN)封装的结构;
图10和11是剖视图,用于描述根据本发明的具有可注入导电区的半导体封装件的示意结构及其制造方法;
图12和13是平面图,用于显示其上形成有本发明中采用的可注入导电区的带膜的结构;
图14是剖视图,用于描述其上形成有本发明中采用的可注入导电区的带膜的结构;
图15是平面图,用于说明在其上形成有本发明中采用的可注入导电区的带膜上的可注入导电区的变换形状;
图16至22显示了根据本发明的第一实施例的一种半导体封装件的结构及其制造方法;
图23至28显示了根据本发明的第二实施例的半导体封装件的结构及其制造方法;以及
图29至34显示了根据本发明的第三实施例的半导体封装件的结构及其制造方法。
以下结合附图详细描述本发明的最佳实施例。
在此说明书中,半导体封装件体是在最广泛的意义上得到使用的,且不限于以下描述的实施例中的具体的半导体封装件。换言之,本发明可被应用于利用可注入导电区组装的任何类型的半导体封装件。在不脱离本发明的精神和基本特征的前提下,可以对以下将要给出的实施例进行修正。例如,在本发明的最佳实施例中可注入导电区的形状是四边形或圆形的,但也可以被修正成不同的形状,以使导线接合和外部连接端的连接能够进行。将要在下面的最佳实施例中描述的方法可被不同的半导体芯片与接合导线的接合以及模制方法所代替。因此,这些最佳实施例只是为了描述而非限定的目的而公布的。
图10和11是剖视图,用于说明根据本发明的具有可注入导电区的半导体封装件的示意结构及其制造方法。参见图10,本发明的半导体封装件包括一个半导体封装件体101和附在在半导体封装件体101的表面上以被暴露于外并分别与设置在半导体封装件体101内的半导体芯片的接合台相电连接的可注入导电区112
半导体封装件体101的形状可根据半导体封装件的类型而被改变成各种其他的形状。半导体封装件体101主要包括一个半导体芯片100并具有使半导体芯片100能够与可注入导电区112相连接的结构。可注入导电区112可被用作通常的外部连接端、接地端、功率端或散热器114。
当半导体芯片100的接合台分别通过金线106而与可注入导电区112相连时,半导体芯片100的底部借助导热或导电模接合环氧树脂102而与接地可注入导电区或散热器可注入导电区112相接合。在附在半导体封装件体101上的各个可注入导电区的一个面上,优选为是形成有用于导线接合的表面处理层(图14的142)。该表面处理层优选为是用金、银、钯或包括金、银和钯的化合物制成。当可以不形成表面处理层而实现导线接合时,可以不形成表面处理层。
本发明的最重要的特征之一,是可注入导电区112和114被从根据本发明的带膜110上取下并被形成在半导体封装件体101的表面上。因此,半导体封装件的内部结构可得到显著的简化,且半导体封装件没有刚性基底、带膜式基底或引线框。
参见图11,在可注入导电区112中,接地可注入导电区和散热器可注入导电区以通常的类型配置,从而变成了修正的散热器可注入导电区114’。以下的描述涉及制造具有根据本发明的可注入导电区的半导体封装件的制造方法,并参见图11。
半导体芯片100被接合到一个临时基底上,在该临时基底中在带膜110上形成有可注入导电区112。在此,半导体封装件组装中的模附着处理可根据半导体封装件的类型而不同。
例如,在反装芯片封装的情况下,在半导体芯片100的各个接合台上形成有焊料凸起部,且该焊料凸起部直接附在可注入导电区112上,以把半导体芯片100与临时基底相接合。或者,在球栅阵列(BGA)封装或四边形扁平无引线(QFN)封装的情况下,半导体芯片100的底部用导热或导电模接合环氧树脂102与修正的散热器可注入导电区114’的表面接合,且进行一种额外的导线接合处理以用金线106把半导体芯片100的接合台连接到其上有表面处理层的可注入导电区112。
随后,半导体芯片接合到的临时基底利用诸如环氧模制化合物(EMC)的密封树脂104而得到模制。在模制处理中,除了密封树脂,液化的密封树脂104可借助一个供料器提供给具有半导体芯片的临时基底并随后得到硬化,或者可利用通常的模制设备模制热固密封树脂104。因此,半导体封装件制造中从模附至模制的处理可随着半导体封装件的类型和原材料的类型而不同。
最后,用作临时基底的带膜110被从模制处理之后获得的结构上取下。把带膜110从基底上取下的处理可在模制之后立即进行,也可在随后的分割处理后进行。
图12和13是显示其上形成有本发明中采用的可注入导电区的带膜的结构的平面图。图12显示了图10中采用的带膜的形状。图13显示了图11中采用的带膜的形状。在这些图中,标号112A表示了一个圆的可注入导电区,用于用作输入/输出端的外部连接端。标号112B表示一个矩形的可注入导电区,它被用于作为输入/输出端的外部连接端。标号114表示一个散热器可注入导电区,它不与接地可注入导电区相连。标号114’表示一个修正的散热器可注入导电区,它与接地可注入导电区相电连接。标号126表示半导体芯片所接合到的区域。
可注入导电区112A、112B、114和114’是由铜或包括铜的合金制成的,并具有圆或矩形的形状,或者也可以具有允许导线接合和外部连接端的连接的任何形状。可注入导电区112A、112B、114和114’的厚度可以根据用户的要求在几μm至几mm的范围内改变。
在图12和13中,显示了具有用于单个半导体封装件的可注入导电区112A、112B、114和114’的带膜110,但能够设计出可借助用在半导体封装件制造中的组装设备制造的多个带膜,这些带膜具有与图12和13所示的相同的形状并沿着水平和纵向方向设置。
在具有可注入导电区112A、112B、114和114’的带膜110的制造中,可注入导电区112A、112B、114和114’可通过照相掩膜法、屏幕印刷法,通过拾取和放置各个导电区并将它们接合或通过淀积或电镀,而形成在带膜110上。
图14是剖视图,用于说明其上形成有本发明中采用的可注入导电区的带膜的结构。图14的结构由可注入导电区112和带膜110构成。可注入导电区112通过在导电区体140的表面上形成用于导线接合的表面处理层142而构成。带膜110由一个带体130和形成在带体130上并便于可注入导电区112的剥离的一个粘合层132构成。
在此,粘合层132是使得根据本发明的半导体封装件的结构及其制造方法能够得以实现的一个重要手段。在传统的刚性基底或具有通过穿孔或蚀刻形成的通孔的传统的带膜中,导电区和绝缘基底是利用例如酚基或聚酰亚胺基的环氧树脂永久地叠置的,因而它们不容易被取下,因为导电区脱离与基底的叠置将导致半导体封装件中的严重缺陷。
然而,根据本发明的带膜110中的粘合层132所根据的思想,同采用传统粘合层所基于的思想是不同的。换言之,由于要在本发明的模制处理之后带膜110方便地从半导体封装件体取掉,粘合层132由基于硅的粘合剂而不是酚或聚酰亚胺环氧树脂形成,因而当可注入导电区112的顶部在模制处理之后由于导线接合的力和模制的附着力而被固定在半导体封装件体上时,只有带膜110被从半导体封装件体剥离,而可注入导电区112没有改变,如图10和11所示。
带膜110中的带体130可以由在半导体封装件制造过程中的模接合、导线接合以及模制中具有耐热、耐压和耐化学作用的任何材料制成。换言之,可采用纸、诸如聚酰亚胺的聚合物、金属或包括纸、聚合物和金属的混合物。
由于其上形成有本发明中采用的可注入导电区的带膜具有简单的结构且不象传统的刚性基底或具有通过穿孔或蚀刻而形成的通孔的基底那样复杂,因而它的制造成本低。因此,与采用昂贵的刚性基底或引线框的传统技术相比,本发明可显著地降低半导体封装件组装的成本。
图15是平面图,用于说明其上形成有本发明中采用的可注入导电区的带膜上的可注入导电区的变换形状。参见图15,在可注入导电区112A中,用作功率端的可注入导电区113得到连接,从而形成了其中功率端得到连接的可注入导电区。这稳定了半导体封装件中的功率端。在此实施例中,四个端被结合成为一个,但显然可以对此作各种修正。
第一实施例:BGA封装
图16至22显示了根据本发明的第一实施例的半导体封装件的结构及其制造方法。参见图16,根据本发明的第一实施例的半导体封装件包括一个半导体芯片100、含有用于接合半导体芯片100的底部的导热或导电模接合环氧树脂102的半导体封装件体101、金线106和环氧树脂模制化合物的密封树脂104、以及含有散热器可注入导电区114的可注入导电区112。
金线106把可注入导电区112连接到半导体芯片100的各个接合台。导热或导电的模接合环氧树脂102把半导体芯片100直接接合到散热器可注入导电区114。
图17中所示的半导体封装件的结构与图16中所示的相同,只是可注入导电区中的散热器导电区被结合成单个的修正的散热器可注入导电区114’,因而不再重复前述的描述。修正的散热器可注入导电区114’具有使半导体芯片100产生的热量能够有效地被排放到外界的结构。另外,修正的散热器可注入导电区114’的厚度在需要时可得到调节。
参见图18和19,根据本发明的半导体封装件可进一步包括与散热器可注入导电区114和输入/输出可注入导电区112相连的外部连接端。这些外部连接端每一个都能够以如图18所示的焊料涂覆116或如图19所示的焊球118的形式形成。
图20是流程图,显示了包括根据本发明的第一实施例的可注入导电区的半导体封装件的制造方法。参见图20,在锯开处理之后获得的半导体芯片被附在一个带膜(图13的110)上,在该带膜上形成有根据本发明的导电区。优选为采用一种导热或导电模接合环氧树脂来附着半导体芯片。该半导体芯片优选为是被附在这样的一个部分,即该部分中设置有修正的散热器可注入导电区(图13中的114’)。随后,进行一种固化处理,以除去模接合环氧树脂中的挥发材料并使模接合环氧树脂硬化。
随后,进行使半导体芯片的各个接合台与可注入导电区相电连接的导线接合处理。在此,优选为在各个可注入导电区的表面上形成一个表面处理层,以用于导线接合。
在导线接合处理之后获得的结构,用密封树脂并借助模制设备进行模制。模优选为具有简单的单腔式形状并具有平坦的表面而不是传统的具有多个腔的形状。因此,模制设备的成本能够得到降低。
随后,在模制完成之后带膜被从半导体封装件体上分离。在此,可注入导电区没有被分离,而是由于模制的附着力、模接合环氧树脂的粘合力和导线接合的附着力,而被固定在半导体封装件体上。对除去了带膜之后获得的结构进行采用激光的加标记处理,且随后被用作外部连接端的焊球被连接到可注入导电区的暴露的底部。随后,进行把单个的半导体封装件从成串的半导体封装件上分割的处理。
图21和22是部分切去的平面图,显示了包括可注入导电区的半导体封装件,它们是借助上述的制造方法完成的。图21显示了一种半导体封装件,其中散热器可注入导电区没有彼此相连,象图16所示;图22显示了一种半导体封装件,其中散热器可注入导电区相连并被结合成一个单个的修正的散热器可注入导电区114’,如图17所示。在这些图中,标号104表示密封树脂且标号106表示金线。
第二实施例:QFN封装
图23至28显示了根据本发明的第二实施例的半导体封装件的结构及其制造方法。
参见图23至25,由于本发明采用了包括可注入导电区的带膜而不是传统的引线框,QFN式半导体封装件的结构几乎与第一实施例中的相同,因而省略了对其的描述。为了理解的清楚,标号的末位与第一实施例中采用的相对应。
图26是流程图,显示了根据本发明的第二实施例的包括可注入导电区的半导体封装件的制造方法。参见图26,以与第一实施例中相同的方式进行模接合处理和导线接合处理。随后,模接合环氧树脂被硬化且模接合环氧树脂中包含的挥发材料通过固化处理而被除去。随后,借助通常的方法依次进行模制处理、加标记处理和分割处理。最后,在分割处理之后带膜被从半导体封装件体上取下。第二实施例与第一实施例的不同,在于分离带膜的处理是在分割处理之后进行的,而不是在模制处理之后进行的。
与采用引线框的传统方法相比,由于根据本发明的半导体封装件不包括引线框,所以在分割处理中容易把成串的半导体封装件分成单个的半导体封装件,且即使采用了大量的输入/输出端,半导体封装件内输入/输出端的位置也容易设计。
图27是部分切去的平面图,显示了其中散热器可注入导电区未彼此相连的一种半导体封装件,如图23所示;图28是部分切去的平面图,显示了其中散热器可注入导电区相连并结合成单个导电区的一种半导体封装件,如图24所示。在这些图中,标号204表示密封树脂,标号206表示金线且标号212表示输入/输出可注入导电区。
第三实施例:反装芯片封装
图29至34显示了根据本发明的第三个实施例的半导体封装件的结构及其制造方法。
图29是剖视图,显示了根据本发明的第三实施例的包括可注入导电区的半导体封装件的结构。根据本发明的第三实施例的半导体封装件由半导体封装件体301和可注入导电区312构成,象第一和第二实施例一样。然而,半导体封装件体301的内部形状不同于第一和第二实施例。换言之,第三实施例的半导体封装件不包括金线和模接合环氧树脂。提供了从半导体芯片300的各个接合台伸出的焊料凸起部308,以直接与可注入导电区312相连接。
参见图30和31,根据本发明的第三实施例的半导体封装件可进一步包括与各个可注入导电区312相连的外部连接端。各个外部连接端可利用图30的焊料涂覆316或图31的焊球318形成。
图32是平面图,显示了包括扩展的可注入导电区的带膜。参见图32,当形成在半导体芯片上的接合台之间的间隙窄时,扩展的可注入导电区312’可得到采用。扩展的可注入导电区312’包括与焊料凸起部相连的一个部分312B和与外部连接端相连的一个部分312A,且这两个部分通过一个导线相连。因此,可注入导电区312’可从与一个焊料凸起部相连的一个部分延伸到与一个外部连接端相连的一个部分。在此图中,标号110表示一个带膜。
图33是流程图,显示了具有根据本发明的第三实施例的可注入导电区的半导体封装件的制造方法。图34是剖视图,显示了如何把半导体芯片接合到具有可注入导电区的带膜上。
参见图33和34,在半导体芯片300的各个接合台上形成有一个突出的焊料凸起部308,且与第一和第二实施例不同地,半导体芯片被上下颠倒并接合到具有可注入导电区112的带膜110上。随后,利用密封树脂即一种环氧模制化合物进行模制处理,且随后带膜110被从临时基底上分离。随后,借助通常的方法依次进行一种加标记处理、用于附上用作外部连接端的焊球的处理和分割处理,从而完成半导体封装件。
根据本发明,首先,半导体封装件的组装成本能够得到降低。由于本发明不采用昂贵的基底或引线框,半导体封装件的组装成本能够得到降低。另外,由于传统的生产设施能够在不用修正的情况下得到利用,不需要额外的基建投资。制造过程也能够得到简化。例如,当用作外部连接端的焊料涂层被预先形成在与其上有表面处理层的表面相对的一个表面上时,在各个可注入导电区中,可省略形成外部连接端的处理。在另一个例子中,如果不是采用平坦的单腔模,可以在模制处理中采用具有多个腔的模,且可省略随后的分割处理。另外,由于制造处理能够方便地进行,半导体封装件组装成本可得到降低。换言之,根据本发明的QFN封装不包括诸如难于切割的引线框的原材料,因而分割处理中产生的缺陷能够得到减少。另外,不采用具有多个腔的传统的模,而是采用平坦的单腔模,从而便利了模制处理。
其次,半导体封装件的性能能够得到改善。由于根据本发明的散热器可注入导电区直接与半导体芯片相连并暴露于外界,半导体封装件的热特性能够得到改善。另外,不用采用诸如通孔的中间连接端或用在传统技术中的电路图案,因而把接合台连接到外部连接端的导线连接的长度能够得到缩短,从而改善了半导体封装件的电特性。另外,由于在半导体封装件中既不形成刚性基底也不形成带膜式基底的引线框,半导体封装件的厚度能够得到减小,从而改善了半导体封装件的机械特性。
最后,半导体封装件的可靠性能够得到改善。更具体地说,由于在半导体封装件中形成很多的层而产生的叠置脱离问题将被防止,且由于基底或引线框和半导体封装件内的其他部分的热膨胀系数的不同所导致的处理缺陷将得到减小。另外,半导体封装件的制造过程简单而方便,从而改善了半导体封装件的可靠性。
虽然结合具体的实施例描述了本发明,本领域的技术人员应该理解的是,在不脱离本发明的精神和范围的前提下,可以对上述的
实施例进行各种修正。

Claims (32)

1.一种具有可注入导电区的半导体封装件,该半导体封装件包括:
一个半导体封装件体,它包括其中具有多个接合台但不具有引线框或基底的半导体芯片,该半导体封装件体由密封树脂形成;以及
附着在半导体封装件体将要暴露于外的表面上的可注入导电区,各个可注入导电区与半导体芯片的接合台相电连接。
2.根据权利要求1的半导体封装件,其中可注入导电区在模制处理完成时从作为基底的带膜分离。
3.根据权利要求1的半导体封装件,其中各个可注入导电区的厚度在几μm和几mm之间,且其形状是四边形与圆形之一。
4.根据权利要求1的半导体封装件,其中在可注入导电区中,被用作接地端和散热器的可注入导电区彼此电连接。
5.根据权利要求1的半导体封装件,其中在可注入导电区中,用作功率端的可注入导电区彼此电连接。
6.根据权利要求1的半导体封装件,进一步包括与可注入导电区相连的外部连接端。
7.根据权利要求6的半导体封装件,其中外部连接端是焊料覆层或焊球。
8.根据权利要求1的半导体封装件,其中半导体封装件体是球栅阵列(BGA)式和四边形扁平无引线(QFN)式之一。
9.根据权利要求8的半导体封装件,其中可注入导电区通过导线与半导体芯片的接合台相连。
10.根据权利要求8的半导体封装件,其中用于导线接合的表面处理层被形成在与半导体封装件体相连的各个可注入导电区的一侧上。
11.根据权利要求8的半导体封装件,其中半导体芯片的底部利用导热模接合环氧树脂或导电模接合环氧树脂而与可注入导电区相连。
12.根据权利要求1的半导体封装件,其中半导体封装件体是反装芯片式的。
13.根据权利要求12的半导体封装件,其中在半导体芯片的各个接合台上形成有焊料凸起部。
14.根据权利要求12的半导体封装件,其中与一个焊料凸起部相连的一个可注入导电区通过导线与连接到外部连接端的可注入导电区相连,从而形成扩展的可注入导电区。
15.具有可注入导电区的半导体封装件的制造方法,该方法包括以下步骤:
把半导体芯片附在一种临时基底上,在该临时基底中在带膜上形成有可注入导电区;
模制到半导体芯片所附着的临时基底上;以及
把带膜从模制的结构上分离。
16.根据权利要求15的方法,其中在把半导体芯片附到临时基底的步骤中,半导体芯片的底部利用导热模接合环氧树脂或导电模接合环氧树脂接合到临时基底上。
17.根据权利要求16的方法,进一步包括在把半导体芯片附到临时基底上的步骤之后利用导线把半导体芯片的接合台接合到可注入导电区上的步骤。
18.根据权利要求15的步骤,其中在模制临时基底的步骤中,包括借助供料器把液化的模制材料提供到临时基底上和利用模制设备模制热固树脂的步骤。
19.根据权利要求15的方法,其中临时基底的带膜包括基本上被用作基底的带体和容易从可注入导电区上分离的粘合层。
20.根据权利要求17的方法,其中用于导线接合的表面处理层被形成在各个可注入导电区的表面上。
21.根据权利要求16的方法,其中可注入导电区包括用于外部连接端的可注入导电区和用于散热器的可注入导电区。
22.根据权利要求15的方法,其中在把半导体芯片附到临时基底上的步骤中,在半导体芯片的接合台上形成有焊料凸起部,且半导体芯片被附在临时基底上,从而使焊料凸起部与可注入导电区相连。
23.根据权利要求22的方法,其中与焊料凸起部相连的可注入导电区通过导线同与外部连接端相连的可注入导电区相连接,从而形成了扩展的可注入导电区。
24.根据权利要求15的方法,其中从临时基底分离带膜的步骤是在模制与分割处理之一之后进行的。
25.用于制造具有可注入导电区的一种半导体封装件的一种方法,该方法包括:
一个第一步骤,用于把一个半导体芯片的底部附到一个临时基底上,在该临时基底上在一个带膜上形成有可注入导电区;
一个第二步骤,用于利用导线把半导体芯片的接合台连接到这些可注入导电区;
一个第三步骤,用于在导线接合之后模制所形成的结构,以形成一个半导体体;
一个第四步骤,用于把用作临时基底的带膜从经历了模制步骤的半导体封装件体相分离,并把可注入导电区留在半导体封装件体中;
一个第五步骤,用于在固定于半导体封装件体中的可注入导电区上形成外部连接端;以及
一个第六步骤,用于从具有外部连接端的成串的半导体封装件分割单个的半导体封装件。
26.根据权利要求25的方法,其中可注入导电区包括用于外部连接端的可注入导电区和用于散热器的可注入导电区。
27.根据权利要求25的方法,其中形成外部连接端的步骤是在用于外部连接端的可注入导电区上形成焊球或焊料覆层。
28.用于制造具有可注入导电区的一种半导体封装件的一种方法,该方法包括:
一个第一步骤,用于把一个半导体芯片的底部附到一个临时基底上,在该临时基底上在一个带膜上形成有可注入导电区;
一个第二步骤,用于利用导线把半导体芯片的接合台连接到这些可注入导电区;
一个第三步骤,用于在导线接合之后模制所产生的结构;
一个第四步骤,用于从已经经历了模制步骤的成串的半导体封装件体分割单个的半导体封装件体;以及
一个第五步骤,用于从单个的半导体封装件体上分离被用作临时基底的带膜,并把可注入导电区留在半导体封装件体中。
29.根据权利要求28的方法,其中可注入导电区包括用于外部连接端的可注入导电区和用于散热器的可注入导电区。
30.具有可注入导电区的半导体封装件的一种制造方法,该方法包括:
一个第一步骤,用于把半导体芯片附在一种临时基底上,在该临时基底中在一种带膜上形成有可注入导电区,从而使半导体芯片的接合台直接与可注入导电区相连;
一个第二步骤,用于在半导体芯片所附的临时基底上进行模制,以形成半导体封装件体;
一个第三步骤,用于在模制步骤之后从半导体封装件体上分离用作临时基底的带膜,而把可注入导电区留在半导体封装件体中;
一个第四步骤,用于在固定于半导体封装件体中的可注入导电区上形成外部连接端;以及
一个第五步骤,用于从具有外部连接端的成串的半导体封装件体上分割单个的半导体封装件体。
31.根据权利要求30的方法,其中伸出的焊料凸起部被形成在半导体芯片的接合台上。
32.根据权利要求30的方法,其中连接到焊料凸起部的可注入导电区通过导线与连接到外部连接端的可注入导电区相连,从而形成了扩展的可注入导电区。
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