CN102486427A - 压力传感器及其封装方法 - Google Patents
压力传感器及其封装方法 Download PDFInfo
- Publication number
- CN102486427A CN102486427A CN2010106015479A CN201010601547A CN102486427A CN 102486427 A CN102486427 A CN 102486427A CN 2010106015479 A CN2010106015479 A CN 2010106015479A CN 201010601547 A CN201010601547 A CN 201010601547A CN 102486427 A CN102486427 A CN 102486427A
- Authority
- CN
- China
- Prior art keywords
- tube core
- pressure transducer
- lead
- transducer tube
- encapsulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L19/00—Details of, or accessories for, apparatus for measuring steady or quasi-steady pressure of a fluent medium insofar as such details or accessories are not special to particular types of pressure gauges
- G01L19/14—Housings
- G01L19/147—Details about the mounting of the sensor to support or covering means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measuring Fluid Pressure (AREA)
- Pressure Sensors (AREA)
Abstract
本发明涉及压力传感器及其封装方法。封装压力传感器管芯的方法开始于提供引线框的阵列。每个引线框包括管芯焊盘和引线指。将带附连到引线框的第一侧并且将非导电材料淀积在引线框的第二侧上。使非导电材料固化并且将带移除,并且随后通过管芯附连粘合剂将传感器管芯附连到引线框的相应的管芯焊盘。随后使管芯附连粘合剂固化,并使用导线接合工艺通过导线将各个压力传感器管芯的接合焊盘电连接到引线框的引线指。将凝胶分配到每个压力传感器管芯的顶表面上。使凝胶固化,并通过盖附连粘合剂将盖附连到每个引线框,使得盖覆盖压力传感器管芯。使盖附连粘合剂固化,并对引线框进行单颗化以形成单独的压力传感器封装件。
Description
技术领域
本发明总的来说涉及压力传感器封装,更具体地,涉及一种组装四方扁平无引线(QFN)压力传感器封装件的方法。
背景技术
便携式电子设备正在开始将传感器集成到需要低功率和小形态因子的手持和桌面电子装置中。关键市场在于蜂窝、移动电子装置和桌面应用市场。例如,正在以小的形态因子来使用压力传感器来测量大气压力,作为用于分析周围环境的手段。这样的情形正在用于天气测量的便携式设备或者依赖于操作压力的电子装置的控制系统中出现。压力传感器可以与微控制器一起封装以使用压力传感器提供的原始数据获得经补偿的压力值。
压力传感器和压力传感器封装件具有多种尺寸和配置。压力传感器管芯典型地具有薄的差分压力感测膜,其在处理和封装期间易于受到机械损伤。出于该原因,传感器管芯典型地安装在预模制成型的封装件中并且随后被用分立的覆盖物/盖封闭在该封装件中。
一种封装压力传感器管芯的方式是:将管芯安装到预模制成型的引线框,并且利用模化合物(mold compound)来对封装件进行包封。然而,诸如压电电阻换能器(PRT)、参数化版图单元(parameterizedlayout cell,Pcell)和陀螺仪(Gyro)不允许完全包封,因为这将妨碍它们的功能。结果,预模制成型的引线框需要将金属盖或帽放置在管芯上以针对外部环境对其进行保护。然而,预模制成型的引线框是相对昂贵的,这增加了封装的器件的整体成本。
因此,能够在降低整体封装成本的同时极大地降低或消除对压力传感器管芯的环境损伤的风险地高效地封装压力传感器管芯将是有利的。
附图说明
以示例的方式说明了本发明,并且本发明不限于附图,在附图中相同的附图标记表示相似的元件。出于简单和清楚的目的示出了附图中的元件,并且其不必依比例绘制。例如,为清楚起见,可以将层和区域的厚度放大。
图1A是根据本发明一个实施例的压力传感器封装件的横截面图;
图1B是根据本发明一个实施例的四方扁平无引线(QFN)压力传感器封装件的顶视图;
图2是图示了多个引线框的横截面侧视图,粘结带附连到所述引线框;
图3、4和5图示了在图2的引线框上淀积非导电材料的步骤;
图6、7和8图示了将压力传感器管芯附连到相应的引线框的步骤;
图9图示了将凝胶分配在每个压力传感器管芯上的步骤;
图10图示了使分配在压力传感器管芯上的凝胶固化的步骤;
图11和12图示了将盖附连到各引线框以形成封装的压力传感器管芯的阵列的步骤;以及
图13图示了将阵列中的封装的压力传感器管芯分开为单独的封装的压力传感器管芯的步骤。
具体实施方式
这里公开了本发明的详细的说明性实施例。然而,这里公开的具体的结构和功能细节仅是代表性的,用于描述本发明的示例性实施例的目的。本发明可以被实施为许多替选形式,并且不应被解释为仅限于此处阐述的实施例。这里使用的术语仅用于描述特定实施例的目的,而并非意在限制本发明的示例性实施例。除非上下文清楚地指示另外的情况,否则如这里使用的单数形式“一”意图也包括复数形式。将进一步理解,术语“包括”指明了所陈述的特征、步骤或部件的存在,但并不排除一个或多个其他的特征、步骤或部件的存在或添加。还应当理解,在一些可替选的实现方案中,所提及的功能/动作可以不按照图中提及的顺序进行。例如,依赖于所牵涉的功能/动作,接连示出的两个图实际上可以基本上同时地执行或者有时可以按照相反的顺序执行。
在一个实施例中,本发明提供了一种封装压力传感器管芯的方法。该方法包括提供多个引线框。所述多个引线框中的每一个包括管芯焊盘和多个引线指。将带附连到所述多个引线框的第一侧并且将非导电材料淀积在引线框的第二侧上。使非导电材料固化,并且将带移除以通过管芯附连粘合剂将压力传感器管芯附连到相应的引线框的管芯焊盘。随后使管芯附连粘合剂固化,并且使用导线接合工艺通过导线将各个压力传感器管芯的接合焊盘电连接到引线框的引线指。将凝胶分配到每个压力传感器管芯的顶表面上。使凝胶固化,并且通过盖附连粘合剂将盖附连到每个引线框,使得盖覆盖压力传感器管芯。使盖附连粘合剂固化,并且对所述多个引线框进行单颗化(singuIate)以形成单独的压力传感器封装件。
在另一实施例中,本发明是一种根据上述方法形成的封装的压力传感器管芯。
现在参照图1A,示出了封装的压力传感器管芯或者压力传感器管芯封装件10的横截面图。压力传感器管芯封装件10包括具有管芯焊盘14和引线指16的引线框12。引线框12可以由铜、铜的合金、镀铜的铁/镍合金、或镀铝等形成。
压力传感器管芯18附连并且电耦接到引线框12。在本发明的该示例性实施例中,压力传感器管芯18包括压电电阻换能器(PRT)管芯。可以使用管芯附连粘合剂将压力传感器管芯18附连到引线框12。压力传感器管芯18和引线框12是压力传感器的公知的部件,并因此它们的详细描述对于本发明的完整理解不是必需的。
在本发明的该实施例中,压力传感器管芯18通过接合导线20电耦接到引线框12的引线指18。使用公知的导线接合工艺和已知的导线接合设备,将接合导线20接合到压力传感器管芯18的有源表面(activesurface)22上的焊盘并且接合到引线框12的引线指16。
将压力传感器管芯18电连接到引线框12的引线指16的另一种方式是:通过附连到压力传感器管芯18的下侧的倒装芯片凸块(flip-chipbump)(未示出)将压力传感器管芯18的接合焊盘连接到引线指16。如本领域中已知的,倒装芯片凸块可以包括焊料凸块、金球、模制成型柱(stud)或者它们的组合。
压力传感器管芯封装件10包括非导电材料24,诸如非导电粘合剂或者焊料掩模(solder mask),其设置在管芯焊盘14和引线指16之间的间隙26和28中。将凝胶30(诸如硅基凝胶)设置在压力传感器管芯18的顶表面上以覆盖压力传感器管芯18的接合焊盘和电连接(导线接合)以及管芯18自身。
封装的压力传感器管芯10包括盖32,其覆盖压力传感器管芯18、管芯焊盘14、间隙26和28、以及接合导线20。如本领域中已知的,盖32可以包括模制成型的、有脚的金属盖。在本发明的该示例性实施例中,盖32通过诸如非导电环氧树脂的盖附连粘合剂34附连到引线框12。然而,也可以使用其他附连机制。盖32包括其顶表面上的通风孔36。应当注意,非导电材料24和盖附连粘合剂34通过在封装的压力传感器管芯10的侧面和底部处将引线框12和金属盖32互锁,基本上防止湿气进入压力传感器管芯18。图1A的封装的压力传感器管芯10的示例性配置可以用在扁平无引线类型的封装中。
现在参照图1B,示出了四方扁平无引线(QFN)传感器封装件40的顶视图。在该实施例中,封装件40包括三个管芯,具体地是参数化版图单元(PCELL)42、传感器芯片(GCELL)44和微控制器(MCU)46。通过虚线示出了盖32的轮廓。非导电材料24和盖32包围管芯42、44、46,并且用于通过在侧面和底部处使封装件40互锁来基本上防止湿气进入封装件40。封装件40在其所有四侧上具有暴露的引线48。
尽管封装件10和40的各个元件是公知的,但是常规封装中的这些元件的组装方法是麻烦的,并且如前面所讨论的,需要预模制成型的引线框。然而,本发明人已经发现了一种形成封装的压力传感器管芯10的新型的方法,将参照图2至13描述该方法。不同于使用预模制成型的引线框,使用简单的印刷技术将非导电材料施加到裸(非预模制成型的)引线框,该引线框连同盖一起将管芯封闭在封装中。
图2是示出多个引线框12的横截面侧视图,粘结带50附连到引线框12的第一侧或底部侧52。如图所示,每个引线框12包括管芯焊盘14和引线指16。所述多个引线框12可以以具有相邻的单独的分开的框的单个条带或者阵列的形式提供。
图3图示了将诸如焊料掩模的非导电材料24淀积在引线框12的第二侧54上的步骤。在本发明的一个实施例中,使用已知的丝网印刷设备通过丝网印刷工艺将非导电材料24淀积在引线框上。执行非导电材料24的淀积以使得非导电材料24基本上填充每个引线框12的管芯焊盘14和引线指16之间的间隙26和28。
如图4和5中所示,随后在常规的烘箱中使所淀积的非导电材料24固化,此后从引线框12移除带50。
图6图示了将压力传感器管芯18附连到引线框12的步骤。通过诸如管芯接合环氧树脂的管芯附连粘合剂56将压力传感器管芯18附连到引线框12的相应的管芯焊盘14。使用已知的分配设备将管芯附连粘合剂56分配在引线框12的第二表面或者顶表面58上,并且将压力传感器管芯18放置在管芯附连粘合剂56上以将管芯18附连到相应的管芯焊盘14。如图7中所示,随后在烘箱中使管芯附连粘合剂56固化以使管芯附连粘合剂硬化。
图8示出了将压力传感器管芯18电连接到相应引线框12的步骤。在本发明的该示例性实施例中,使用公知的导线接合工艺和已知的导线接合设备,通过接合导线20将压力传感器管芯18的接合焊盘电连接到引线框的引线指16。将压力传感器管芯18连接到引线框12的另一种方式是通过附连到压力传感器管芯18的下侧的倒装芯片凸块(未示出)。倒装芯片凸块可以包括焊料凸块、金球、模制成型柱、或者它们的组合。可以使用已知的技术,诸如蒸发、电镀、印刷、喷射、柱凸块焊(stud bumping)、和直接放置,将凸块形成或者放置在压力传感器管芯18上。对于倒装芯片,将每个压力传感器管芯18倒装并且使凸块与引线指16的接触焊盘(未示出)对准。
图9示出了将凝胶30分配在每个压力传感器管芯18的顶表面60上的步骤。凝胶30可以是硅基凝胶,其被分配到压力传感器管芯18的顶表面60上以覆盖压力传感器管芯18的管芯接合焊盘。如本领域中已知的,可以通过常规的分配机的喷嘴对凝胶30进行分配。随后,如图10中所示,在烘箱中使凝胶30固化。
图11是示出附连到引线框12的盖32的横截面侧视图。在本发明的该示例性实施例中,盖32包括使用盖附连粘合剂34附连到引线框的有脚的金属盖。如图12中图示的,随后在常规的烘箱中使盖附连粘合剂34固化以形成封装的压力传感器管芯的阵列。
图13示出了通过单颗化工艺而彼此分开的封装的管芯10的阵列。单颗化工艺是公知的并且可以包括利用锯或激光进行切割。如图所示,将多个引线框12彼此分离以形成单独的传感器封装件10。
如上文描述的,本发明允许对压力传感器管芯进行封装而不需要预模制成型的引线框来封装管芯。使用诸如丝网印刷的简单的淀积技术来施加非导电材料层以将引线和引线框互锁。压力传感器管芯通过管芯附连粘合剂附连到相应的引线框,电耦接到引线指,并且在压力传感器管芯上设置凝胶以覆盖压力传感器管芯的接合焊盘。随后,使用可以附连到引线指的有脚的盖将盖附连到封装,而不是使用附连到模壁(moldwall)的盖。因此,也不需要模壁。
因此,本发明提供了一种封装压力传感器管芯的方法(诸如具有较低封装廓形的QFN封装),该方法不需要为了利于盖附连的预模制成型的引线框,由此降低了这种封装件的制造成本。由于引线框和金属盖在封装件的侧面和底部互锁,因此使用上述工艺封装的压力传感器管芯受到保护而不受空气湿气的影响。
到此为止应当意识到,已经提供了一种改进的封装的压力传感器管芯和一种形成该封装的压力传感器管芯的方法。并未对电路的细节进行说明是因为这对于完整理解本发明而言不是必要的。尽管在说明书和权利要求中使用诸如“前”、“后”、“顶”、“底”、“上”、“下”等关系性术语描述了本发明,但是这些术语用于描述性目的,并不必然用于描述永久性的相对位置。应当理解,如此使用的术语在适当的环境中是可互换的,使得这里描述的本发明的实施例例如能够在与这里图示的或者另外描述的取向不同的其他取向上进行操作。
除非另外说明,否则诸如“第一”和“第二”的术语用于任意地区分这些术语所描述的要素。因此,这些术语不必然意在指示这些要素的时间上的或者其他的优先顺序。此外,权利要求中的诸如“至少一个”和“一个或多个”的引入性习语的使用不应被解释为意味着通过不定冠词“一”引入另一权利要求要素使包含所引入的该权利要求要素的任何特定的权利要求限于仅包含一个该要素的发明,即使当同一权利要求包括引入性习语“一个或多个”或“至少一个”以及诸如“一”的不定冠词时也是如此。对于定冠词的使用,情况亦是如此。
尽管这里参照具体实施例描述了本发明,但是可以进行各种修改和改变而不偏离如所附权利要求中阐述的本发明的范围。因此,说明书和附图将被视为是说明性的而非限制性的,并且所有这些修改都落于本发明的范围内。这里针对特定实施例描述的任何益处、优点或者对问题的解决方案不应被解释为任何或所有权利要求的关键的、必需的或者基本的特征或要素。
Claims (20)
1.一种封装压力传感器管芯的方法,包括步骤:
提供多个引线框,所述多个引线框中的每一个都具有管芯焊盘和多个引线指;
将带附连到所述多个引线框的第一侧;
将非导电材料淀积在所述引线框的第二侧上,其中,所述非导电材料基本上填充每个引线框的管芯焊盘和引线指之间的间隙;
通过管芯附连粘合剂将压力传感器管芯附连到引线框的相应的管芯焊盘,并且使所述管芯附连粘合剂固化;
将各个压力传感器管芯的接合焊盘电连接到所述引线框的所述引线指;
将凝胶分配到每个压力传感器管芯的顶表面上;以及
通过盖附连粘合剂将盖附连到每个引线框,其中,所述盖覆盖所述压力传感器管芯、所述凝胶以及所述管芯和所述引线指之间的电连接。
2.根据权利要求1所述的封装压力传感器管芯的方法,进一步包括在淀积所述非导电材料之后移除所述带。
3.根据权利要求2所述的封装压力传感器管芯的方法,进一步包括在移除所述带之前使所述非导电材料固化。
4.根据权利要求1所述的封装压力传感器管芯的方法,其中,所述非导电材料包括焊料材料。
5.根据权利要求4所述的封装压力传感器管芯的方法,其中,所述非导电材料通过丝网印刷工艺淀积在所述引线框上。
6.根据权利要求1所述的封装压力传感器管芯的方法,其中,附连所述盖包括将所述盖附连到所述引线指。
7.根据权利要求6所述的封装压力传感器管芯的方法,进一步包括将所述盖附连粘合剂固化。
8.根据权利要求1所述的封装压力传感器管芯的方法,进一步包括如下步骤:将所述多个引线框单颗化以形成单独的压力传感器封装件。
9.根据权利要求1所述的封装压力传感器管芯的方法,其中,所述的电连接步骤包括:使用导线接合工艺通过导线将各个压力传感器管芯的接合焊盘连接到所述引线框的引线指。
10.根据权利要求1所述的封装压力传感器管芯的方法,其中,所述的电连接步骤包括:通过倒装芯片凸块将所述压力传感器管芯的接合焊盘直接连接到所述引线指。
11.根据权利要求1所述的封装压力传感器管芯的方法,进一步包括如下步骤:在附连所述盖之前使所述凝胶固化。
12.一种封装的压力传感器管芯,包括:
引线框,其具有管芯焊盘和引线指;
压力传感器管芯,其附连并且电耦接到所述引线框;
非导电材料,其淀积在所述管芯焊盘和所述引线指之间的间隙中;以及
盖,其覆盖所述压力传感器管芯和所述引线框。
13.根据权利要求12所述的封装的压力传感器管芯,其中,所述压力传感器管芯包括压电电阻换能器PRT管芯。
14.根据权利要求12所述的封装的压力传感器管芯,其中,所述非导电材料包括焊料材料。
15.根据权利要求12所述的封装的压力传感器管芯,其中,所述压力传感器管芯通过接合导线电耦接到所述引线框。
16.根据权利要求15所述的封装的压力传感器管芯,进一步包括凝胶,其设置在所述压力传感器管芯的顶表面上以覆盖所述管芯的所述接合焊盘。
17.根据权利要求16所述的封装的压力传感器管芯,其中,所述凝胶包括硅基凝胶。
18.根据权利要求12所述的封装的压力传感器管芯,其中,所述压力传感器管芯经由多个导电凸块而电耦接到所述引线框。
19.根据权利要求12所述的封装的压力传感器管芯,其中,所述封装的压力传感器管芯包括四方扁平无引线QFN封装。
20.一种封装压力传感器管芯的方法,包括步骤:
提供多个引线框,所述多个引线框中的每一个具有管芯焊盘和多个引线指;
将带附连到所述多个引线框的第一侧;
将非导电材料丝网印刷在所述引线框的第二侧上,使得所述非导电材料基本上填充每个引线框的所述管芯焊盘和所述引线指之间的间隙;
使所述非导电材料固化并移除所述带;
通过管芯附连粘合剂将压力传感器管芯附连到引线框的相应的管芯焊盘,并使所述管芯附连粘合剂固化;
使用导线接合工艺通过导线将各个压力传感器管芯的接合焊盘电连接到所述引线框的所述引线指;
将凝胶分配到每个压力传感器管芯的顶表面上;
使所述凝胶固化;
通过盖附连粘合剂将盖附连到每个引线框,其中,所述盖覆盖所述压力传感器管芯;
使所述盖附连粘合剂固化;以及
将所述多个引线框单颗化以形成单独的压力传感器封装件。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010106015479A CN102486427A (zh) | 2010-12-06 | 2010-12-06 | 压力传感器及其封装方法 |
US13/246,877 US20120139067A1 (en) | 2010-12-06 | 2011-09-28 | Pressure sensor and method of packaging same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010106015479A CN102486427A (zh) | 2010-12-06 | 2010-12-06 | 压力传感器及其封装方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102486427A true CN102486427A (zh) | 2012-06-06 |
Family
ID=46151947
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2010106015479A Pending CN102486427A (zh) | 2010-12-06 | 2010-12-06 | 压力传感器及其封装方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20120139067A1 (zh) |
CN (1) | CN102486427A (zh) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103245377A (zh) * | 2012-02-14 | 2013-08-14 | 亚太优势微系统股份有限公司 | 单体化复合传感器及其封装品 |
CN103489794A (zh) * | 2013-09-29 | 2014-01-01 | 华进半导体封装先导技术研发中心有限公司 | 提高qfn封装引线框架制备工艺中引线框架硬度的方法 |
CN103584862A (zh) * | 2012-08-13 | 2014-02-19 | 深圳先进技术研究院 | 功能磁共振成像反馈装置及使用该装置的功能磁共振成像反馈系统 |
CN103584863A (zh) * | 2012-08-13 | 2014-02-19 | 深圳先进技术研究院 | 功能磁共振成像反馈方法及其系统 |
CN103681574A (zh) * | 2012-08-31 | 2014-03-26 | 飞思卡尔半导体公司 | 引线框、气腔封装和带有偏移通气孔的电子器件及其制作方法 |
CN103745939A (zh) * | 2013-12-05 | 2014-04-23 | 南通富士通微电子股份有限公司 | 封装结构的形成方法 |
CN104425426A (zh) * | 2013-08-25 | 2015-03-18 | 飞思卡尔半导体公司 | 压力传感器装置及装配方法 |
CN104458101A (zh) * | 2013-09-17 | 2015-03-25 | 飞思卡尔半导体公司 | 侧通气压力传感器装置 |
CN105300593A (zh) * | 2014-07-28 | 2016-02-03 | 飞思卡尔半导体公司 | 具有盖的封装的半导体传感器装置 |
CN106409696A (zh) * | 2016-10-24 | 2017-02-15 | 上海凯虹科技电子有限公司 | 封装方法及封装体 |
CN108496055A (zh) * | 2016-04-15 | 2018-09-04 | 惠普发展公司,有限责任合伙企业 | 三维印刷的测力传感器部件 |
CN108689382A (zh) * | 2014-05-30 | 2018-10-23 | 日月光半导体制造股份有限公司 | 微机电感测装置封装结构及制造工艺 |
CN109668673A (zh) * | 2017-10-17 | 2019-04-23 | 英飞凌科技股份有限公司 | 压力传感器设备和压力传感器设备的制造方法 |
CN111649867A (zh) * | 2019-03-04 | 2020-09-11 | 硅微结构股份有限公司 | 压力传感器芯片连接 |
CN114715835A (zh) * | 2022-04-08 | 2022-07-08 | 盐城芯丰微电子有限公司 | 一种半导体mems封装结构及方法 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102589753B (zh) * | 2011-01-05 | 2016-05-04 | 飞思卡尔半导体公司 | 压力传感器及其封装方法 |
US9324586B2 (en) * | 2011-08-17 | 2016-04-26 | Infineon Technologies Ag | Chip-packaging module for a chip and a method for forming a chip-packaging module |
US9029999B2 (en) * | 2011-11-23 | 2015-05-12 | Freescale Semiconductor, Inc. | Semiconductor sensor device with footed lid |
JP6050182B2 (ja) * | 2013-05-17 | 2016-12-21 | 京セラ株式会社 | 電子機器 |
US9134193B2 (en) * | 2013-12-06 | 2015-09-15 | Freescale Semiconductor, Inc. | Stacked die sensor package |
JP6266351B2 (ja) * | 2014-01-08 | 2018-01-24 | 新日本無線株式会社 | センサ装置およびその製造方法 |
US9638596B2 (en) | 2014-04-08 | 2017-05-02 | Freescale Semiconductor, Inc. | Cavity-down pressure sensor device |
US9574959B2 (en) * | 2014-09-02 | 2017-02-21 | Apple Inc. | Various stress free sensor packages using wafer level supporting die and air gap technique |
TWI663692B (zh) * | 2018-02-27 | 2019-06-21 | 菱生精密工業股份有限公司 | Pressure sensor package structure |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6238223B1 (en) * | 1997-08-20 | 2001-05-29 | Micro Technology, Inc. | Method of depositing a thermoplastic polymer in semiconductor fabrication |
US6266197B1 (en) * | 1999-12-08 | 2001-07-24 | Amkor Technology, Inc. | Molded window array for image sensor packages |
KR100347706B1 (ko) * | 2000-08-09 | 2002-08-09 | 주식회사 코스타트반도체 | 이식성 도전패턴을 포함하는 반도체 패키지 및 그 제조방법 |
US6900531B2 (en) * | 2002-10-25 | 2005-05-31 | Freescale Semiconductor, Inc. | Image sensor device |
US7315077B2 (en) * | 2003-11-13 | 2008-01-01 | Fairchild Korea Semiconductor, Ltd. | Molded leadless package having a partially exposed lead frame pad |
TWI285415B (en) * | 2005-08-01 | 2007-08-11 | Advanced Semiconductor Eng | Package structure having recession portion on the surface thereof and method of making the same |
US8359927B2 (en) * | 2009-08-12 | 2013-01-29 | Freescale Semiconductor, Inc. | Molded differential PRT pressure sensor |
-
2010
- 2010-12-06 CN CN2010106015479A patent/CN102486427A/zh active Pending
-
2011
- 2011-09-28 US US13/246,877 patent/US20120139067A1/en not_active Abandoned
Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103245377A (zh) * | 2012-02-14 | 2013-08-14 | 亚太优势微系统股份有限公司 | 单体化复合传感器及其封装品 |
CN103584862B (zh) * | 2012-08-13 | 2015-11-18 | 深圳先进技术研究院 | 功能磁共振成像反馈装置及使用该装置的功能磁共振成像反馈系统 |
CN103584863B (zh) * | 2012-08-13 | 2015-12-02 | 深圳先进技术研究院 | 功能磁共振成像反馈方法及其系统 |
CN103584863A (zh) * | 2012-08-13 | 2014-02-19 | 深圳先进技术研究院 | 功能磁共振成像反馈方法及其系统 |
CN103584862A (zh) * | 2012-08-13 | 2014-02-19 | 深圳先进技术研究院 | 功能磁共振成像反馈装置及使用该装置的功能磁共振成像反馈系统 |
CN103681574A (zh) * | 2012-08-31 | 2014-03-26 | 飞思卡尔半导体公司 | 引线框、气腔封装和带有偏移通气孔的电子器件及其制作方法 |
CN103681574B (zh) * | 2012-08-31 | 2018-05-22 | 恩智浦美国有限公司 | 引线框、气腔封装和带有偏移通气孔的电子器件及其制作方法 |
CN104425426A (zh) * | 2013-08-25 | 2015-03-18 | 飞思卡尔半导体公司 | 压力传感器装置及装配方法 |
CN104458101A (zh) * | 2013-09-17 | 2015-03-25 | 飞思卡尔半导体公司 | 侧通气压力传感器装置 |
CN104458101B (zh) * | 2013-09-17 | 2019-01-04 | 恩智浦美国有限公司 | 侧通气压力传感器装置 |
CN103489794A (zh) * | 2013-09-29 | 2014-01-01 | 华进半导体封装先导技术研发中心有限公司 | 提高qfn封装引线框架制备工艺中引线框架硬度的方法 |
CN103489794B (zh) * | 2013-09-29 | 2016-02-03 | 华进半导体封装先导技术研发中心有限公司 | 提高qfn封装引线框架制备工艺中引线框架硬度的方法 |
CN103745939A (zh) * | 2013-12-05 | 2014-04-23 | 南通富士通微电子股份有限公司 | 封装结构的形成方法 |
CN108689382A (zh) * | 2014-05-30 | 2018-10-23 | 日月光半导体制造股份有限公司 | 微机电感测装置封装结构及制造工艺 |
CN105300593B (zh) * | 2014-07-28 | 2018-12-28 | 恩智浦美国有限公司 | 具有盖的封装的半导体传感器装置 |
CN105300593A (zh) * | 2014-07-28 | 2016-02-03 | 飞思卡尔半导体公司 | 具有盖的封装的半导体传感器装置 |
CN108496055B (zh) * | 2016-04-15 | 2020-10-27 | 惠普发展公司,有限责任合伙企业 | 三维印刷的测力传感器部件 |
CN108496055A (zh) * | 2016-04-15 | 2018-09-04 | 惠普发展公司,有限责任合伙企业 | 三维印刷的测力传感器部件 |
CN106409696A (zh) * | 2016-10-24 | 2017-02-15 | 上海凯虹科技电子有限公司 | 封装方法及封装体 |
CN109668673A (zh) * | 2017-10-17 | 2019-04-23 | 英飞凌科技股份有限公司 | 压力传感器设备和压力传感器设备的制造方法 |
US11067466B2 (en) | 2017-10-17 | 2021-07-20 | Infineon Technologies Ag | Pressure sensor devices and methods for manufacturing pressure sensor devices |
CN111649867A (zh) * | 2019-03-04 | 2020-09-11 | 硅微结构股份有限公司 | 压力传感器芯片连接 |
CN114715835A (zh) * | 2022-04-08 | 2022-07-08 | 盐城芯丰微电子有限公司 | 一种半导体mems封装结构及方法 |
CN114715835B (zh) * | 2022-04-08 | 2022-11-15 | 盐城芯丰微电子有限公司 | 一种半导体mems封装结构及方法 |
Also Published As
Publication number | Publication date |
---|---|
US20120139067A1 (en) | 2012-06-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102486427A (zh) | 压力传感器及其封装方法 | |
CN102589753B (zh) | 压力传感器及其封装方法 | |
US9209121B2 (en) | Double-sided package | |
US8378435B2 (en) | Pressure sensor and method of assembling same | |
CN100499104C (zh) | 倒装芯片接点的功率组件封装及封装方法 | |
US8178961B2 (en) | Semiconductor package structure and package process | |
US20140374848A1 (en) | Semiconductor sensor device with metal lid | |
US20120306031A1 (en) | Semiconductor sensor device and method of packaging same | |
KR101579623B1 (ko) | 이미지 센서용 반도체 패키지 및 그 제조 방법 | |
US9297713B2 (en) | Pressure sensor device with through silicon via | |
US20150069537A1 (en) | Package-on-package semiconductor sensor device | |
US20130075888A1 (en) | Semiconductor package and method of fabricating the same | |
US20150054099A1 (en) | Pressure sensor device and assembly method | |
EP3647755A1 (en) | Sensor device with flip-chip die and interposer | |
US9305898B2 (en) | Semiconductor device with combined power and ground ring structure | |
TWI538113B (zh) | 微機電晶片封裝及其製造方法 | |
US9209120B2 (en) | Semiconductor package with lead mounted power bar | |
JP4189161B2 (ja) | リードフレーム及び半導体装置並びにそれらの製造方法 | |
US9638596B2 (en) | Cavity-down pressure sensor device | |
CN209232767U (zh) | 一种新型半导体封装结构 | |
CN203877910U (zh) | 一种封装结构 | |
US20230178459A1 (en) | Semiconductor devices and methods of manufacturing semiconductor devices | |
US20210399035A1 (en) | Reliable semiconductor packages | |
KR100388290B1 (ko) | 반도체패키지 및 그 제조방법 | |
US20190181095A1 (en) | Emi shielding for discrete integrated circuit packages |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120606 |