CN1320657C - 带有不同硅厚度的绝缘膜上硅装置 - Google Patents
带有不同硅厚度的绝缘膜上硅装置 Download PDFInfo
- Publication number
- CN1320657C CN1320657C CNB028255488A CN02825548A CN1320657C CN 1320657 C CN1320657 C CN 1320657C CN B028255488 A CNB028255488 A CN B028255488A CN 02825548 A CN02825548 A CN 02825548A CN 1320657 C CN1320657 C CN 1320657C
- Authority
- CN
- China
- Prior art keywords
- silicon layer
- layer
- silicon
- source
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/023,350 US6764917B1 (en) | 2001-12-20 | 2001-12-20 | SOI device with different silicon thicknesses |
| US10/023,350 | 2001-12-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1606807A CN1606807A (zh) | 2005-04-13 |
| CN1320657C true CN1320657C (zh) | 2007-06-06 |
Family
ID=21814574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB028255488A Expired - Fee Related CN1320657C (zh) | 2001-12-20 | 2002-12-19 | 带有不同硅厚度的绝缘膜上硅装置 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6764917B1 (enExample) |
| JP (1) | JP2005514770A (enExample) |
| KR (1) | KR100948938B1 (enExample) |
| CN (1) | CN1320657C (enExample) |
| AU (1) | AU2002357367A1 (enExample) |
| DE (1) | DE10297583B4 (enExample) |
| GB (1) | GB2407703B (enExample) |
| WO (1) | WO2003054966A1 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003124345A (ja) * | 2001-10-11 | 2003-04-25 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US6764917B1 (en) | 2001-12-20 | 2004-07-20 | Advanced Micro Devices, Inc. | SOI device with different silicon thicknesses |
| US6835983B2 (en) * | 2002-10-25 | 2004-12-28 | International Business Machines Corporation | Silicon-on-insulator (SOI) integrated circuit (IC) chip with the silicon layers consisting of regions of different thickness |
| KR100489802B1 (ko) * | 2002-12-18 | 2005-05-16 | 한국전자통신연구원 | 고전압 및 저전압 소자의 구조와 그 제조 방법 |
| US6861716B1 (en) * | 2003-10-31 | 2005-03-01 | International Business Machines Corporation | Ladder-type gate structure for four-terminal SOI semiconductor device |
| WO2006038164A1 (en) * | 2004-10-08 | 2006-04-13 | Koninklijke Philips Electronics N.V. | Semiconductor device having substrate comprising layer with different thicknesses and method of manufacturing the same |
| US7666735B1 (en) * | 2005-02-10 | 2010-02-23 | Advanced Micro Devices, Inc. | Method for forming semiconductor devices with active silicon height variation |
| JP5003857B2 (ja) * | 2005-11-02 | 2012-08-15 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| US7986029B2 (en) * | 2005-11-08 | 2011-07-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual SOI structure |
| US7402477B2 (en) * | 2006-03-30 | 2008-07-22 | Freescale Semiconductor, Inc. | Method of making a multiple crystal orientation semiconductor device |
| JP5548356B2 (ja) * | 2007-11-05 | 2014-07-16 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US7939389B2 (en) * | 2008-04-18 | 2011-05-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US20160071947A1 (en) * | 2014-09-10 | 2016-03-10 | Globalfoundries Inc. | Method including a replacement of a dummy gate structure with a gate structure including a ferroelectric material |
| FR3051973B1 (fr) * | 2016-05-24 | 2018-10-19 | X-Fab France | Procede de formation de transistors pdsoi et fdsoi sur un meme substrat |
| US10141229B2 (en) * | 2016-09-29 | 2018-11-27 | Globalfoundries Inc. | Process for forming semiconductor layers of different thickness in FDSOI technologies |
| JP2018148123A (ja) * | 2017-03-08 | 2018-09-20 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置及び半導体装置の製造方法 |
| FR3080486B1 (fr) * | 2018-04-24 | 2020-03-27 | X-Fab France | Procede de formation d'un dispositif microelectronique |
| US11004867B2 (en) * | 2018-06-28 | 2021-05-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Embedded ferroelectric memory in high-k first technology |
| US10748934B2 (en) | 2018-08-28 | 2020-08-18 | Qualcomm Incorporated | Silicon on insulator with multiple semiconductor thicknesses using layer transfer |
| US11348944B2 (en) | 2020-04-17 | 2022-05-31 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor wafer with devices having different top layer thicknesses |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5463238A (en) * | 1992-02-25 | 1995-10-31 | Seiko Instruments Inc. | CMOS structure with parasitic channel prevention |
| US5574292A (en) * | 1992-05-13 | 1996-11-12 | Seiko Instruments Inc. | Semiconductor device with monosilicon layer |
| CN1215229A (zh) * | 1997-06-05 | 1999-04-28 | 日本电气株式会社 | 一种半导体器件的制造方法 |
| US5940691A (en) * | 1997-08-20 | 1999-08-17 | Micron Technology, Inc. | Methods of forming SOI insulator layers and methods of forming transistor devices |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0173953B1 (en) * | 1984-08-28 | 1991-07-17 | Kabushiki Kaisha Toshiba | Method for manufacturing a semiconductor device having a gate electrode |
| US5306942A (en) * | 1989-10-11 | 1994-04-26 | Nippondenso Co., Ltd. | Semiconductor device having a shield which is maintained at a reference potential |
| JPH07106579A (ja) * | 1993-10-08 | 1995-04-21 | Hitachi Ltd | 半導体装置とその製造方法 |
| US6060748A (en) * | 1996-12-26 | 2000-05-09 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device using a silicon-on-insulator substrate |
| US5909400A (en) * | 1997-08-22 | 1999-06-01 | International Business Machines Corporation | Three device BICMOS gain cell |
| JPH11176925A (ja) | 1997-12-05 | 1999-07-02 | Asahi Kasei Micro Syst Co Ltd | 半導体装置の製造方法 |
| JP2000049237A (ja) * | 1998-07-28 | 2000-02-18 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP4493153B2 (ja) * | 2000-04-19 | 2010-06-30 | シャープ株式会社 | 窒化物系半導体発光素子 |
| US6537891B1 (en) * | 2000-08-29 | 2003-03-25 | Micron Technology, Inc. | Silicon on insulator DRAM process utilizing both fully and partially depleted devices |
| US6764917B1 (en) | 2001-12-20 | 2004-07-20 | Advanced Micro Devices, Inc. | SOI device with different silicon thicknesses |
| US20060110765A1 (en) * | 2004-11-23 | 2006-05-25 | Wang Xiao B | Detection of nucleic acid variation by cleavage-amplification (CleavAmp) method |
-
2001
- 2001-12-20 US US10/023,350 patent/US6764917B1/en not_active Expired - Fee Related
-
2002
- 2002-12-19 JP JP2003555588A patent/JP2005514770A/ja active Pending
- 2002-12-19 WO PCT/US2002/041102 patent/WO2003054966A1/en not_active Ceased
- 2002-12-19 DE DE10297583T patent/DE10297583B4/de not_active Expired - Fee Related
- 2002-12-19 KR KR1020047009734A patent/KR100948938B1/ko not_active Expired - Fee Related
- 2002-12-19 AU AU2002357367A patent/AU2002357367A1/en not_active Abandoned
- 2002-12-19 CN CNB028255488A patent/CN1320657C/zh not_active Expired - Fee Related
- 2002-12-19 GB GB0416018A patent/GB2407703B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5463238A (en) * | 1992-02-25 | 1995-10-31 | Seiko Instruments Inc. | CMOS structure with parasitic channel prevention |
| US5574292A (en) * | 1992-05-13 | 1996-11-12 | Seiko Instruments Inc. | Semiconductor device with monosilicon layer |
| CN1215229A (zh) * | 1997-06-05 | 1999-04-28 | 日本电气株式会社 | 一种半导体器件的制造方法 |
| US5940691A (en) * | 1997-08-20 | 1999-08-17 | Micron Technology, Inc. | Methods of forming SOI insulator layers and methods of forming transistor devices |
| US6110765A (en) * | 1997-08-20 | 2000-08-29 | Micron Technology, Inc. | Semiconductor devices and assemblies |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005514770A (ja) | 2005-05-19 |
| GB2407703A (en) | 2005-05-04 |
| KR100948938B1 (ko) | 2010-03-23 |
| US6764917B1 (en) | 2004-07-20 |
| AU2002357367A1 (en) | 2003-07-09 |
| GB2407703B (en) | 2005-11-30 |
| GB0416018D0 (en) | 2004-08-18 |
| CN1606807A (zh) | 2005-04-13 |
| DE10297583T5 (de) | 2004-11-11 |
| WO2003054966A1 (en) | 2003-07-03 |
| DE10297583B4 (de) | 2010-10-14 |
| KR20040069186A (ko) | 2004-08-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1320657C (zh) | 带有不同硅厚度的绝缘膜上硅装置 | |
| US7417250B1 (en) | Strained-silicon device with different silicon thicknesses | |
| KR980006510A (ko) | 반도체 장치의 제조방법 | |
| CN100573852C (zh) | 在同一芯片上建置全耗尽和部分耗尽晶体管 | |
| KR20090037055A (ko) | 반도체 소자의 제조 방법 | |
| US8497556B2 (en) | Semiconductor devices with active semiconductor height variation | |
| CN112542456A (zh) | 具有独立调谐的阈值电压的场效应晶体管 | |
| TWI270177B (en) | Semiconductor device with lightly doped drain and manufacturing method thereof | |
| KR100557532B1 (ko) | 플래쉬 메모리 셀 트랜지스터 및 그 제조 방법 | |
| CN1152800A (zh) | 半导体器件及其制造方法 | |
| KR100344825B1 (ko) | 반도체소자의 제조방법 | |
| KR101027769B1 (ko) | 이중 일함수 게이트를 갖는 cmos 트랜지스터 및 그 제조방법 | |
| KR100402102B1 (ko) | 반도체 소자의 트랜지스터 제조방법 | |
| KR100280537B1 (ko) | 반도체장치 제조방법 | |
| KR100784063B1 (ko) | 박막 트랜지스터의 구조 및 제조 방법 | |
| KR100303914B1 (ko) | 반도체장치의제조방법 | |
| KR100225383B1 (ko) | 반도체 소자의 제조 방법 | |
| KR100485933B1 (ko) | 반도체 소자의 게이트 형성 방법 | |
| CN119905390A (zh) | 用于形成尺寸减小的特征件的方法 | |
| KR20030049352A (ko) | 반도체 소자의 제조 방법 | |
| CN1197295A (zh) | 互补金属氧化物半导体场效应晶体管及其制造方法 | |
| JPH04192457A (ja) | 電界効果型半導体装置の製造方法 | |
| KR20040022630A (ko) | 반도체 소자의 확산 영역 형성 방법 | |
| KR20010045223A (ko) | 반도체 소자 제조방법 | |
| KR20030046929A (ko) | 반도체 장치의 트랜지스터 제조방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: ADVANCED MICRO DEVICES INC Free format text: FORMER OWNER: ADVANCED MICRO DEVICES INC. Effective date: 20100708 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: CALIFORNIA, USA TO: GRAND CAYMAN ISLAND RITISH CAYMAN ISLANDS |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20100708 Address after: Grand Cayman, Cayman Islands Patentee after: Globalfoundries Semiconductor Inc. Address before: American California Patentee before: Advanced Micro Devices Inc. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070606 Termination date: 20161219 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |