CN1231964C - 半导体器件 - Google Patents

半导体器件 Download PDF

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CN1231964C
CN1231964C CNB021524572A CN02152457A CN1231964C CN 1231964 C CN1231964 C CN 1231964C CN B021524572 A CNB021524572 A CN B021524572A CN 02152457 A CN02152457 A CN 02152457A CN 1231964 C CN1231964 C CN 1231964C
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semiconductor device
substrate
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recess
semiconductor chip
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CN1421922A (zh
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上野丰
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Toshiba Corp
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Abstract

提供了一种批量生产和焊接安装性能良好的半导体器件，其结构为一种具备基板(11)、配置在该基板(11)上边的半导体芯片(14)和形成在基板(11)内、与半导体芯片(14)连接的电极(13)的无引脚封装结构。本发明的半导体器件包括：设置在基板(11)的侧面上的凹部(16)，该凹部从基板(11)的背面凹下去到达不到表面的深度为止，使电极(13)的至少一部分露出来；和在该凹部(16)内的电极(13)的露出来的部分上形成的金属(17)，该金属的厚度达不到基板(11)的上述侧面。

Description

半导体器件
技术领域
本发明涉及树脂密封式的无引脚封装结构的半导体器件。
现有技术
近些年来，为响应便携终端的小型化的要求，正在发展着半导体器件的无引脚封装化。在陶瓷基板的情况下，虽然采用在基板的端面上设置有贯通孔的端面贯通孔结构，但是，从焊接装配性的观点看是一般的结构。
另一方面，为了响应低价格化的要求，对把芯片用树脂密封起来的塑料封装化的研究也在不断发展。这种塑料封装，特别是利用液态树脂的树脂印刷方式，与现有的传送模铸(transfer mold)方式比较，由于不需要昂贵的模具，故作为实现成本降低的方式是有力的。
但是，当对采用端面贯通孔结构的基板使用用树脂印刷方式进行的密封时，如图12所示，会产生树脂18进入到贯通孔51的开口部分内把端面电极13给堵住的问题。
此外，如图13到图15所示，若不采用端面贯通孔结构，而采用通常的过渡孔61的LGA(Land Grid Array)方式，由于不会产生上述的问题，故从树脂密封工艺上来说是最合适的。但是，在该结构的情况下，却会产生不能目视确认母板装配后的焊料爬上来的程度等一些装配性的问题。
发明内容
本发明就是为解决上述课题而发明的，其目的在于提供批量生产性和焊接装配性都优良的半导体器件。
为了实现上述目的，本发明使用下述半导体器件。
本发明的一个方面的半导体器件具有这样一种无引脚封装结构，它具备基板、配置在上述基板上边的半导体芯片、形成在上述基板内与上述半导体芯片连接的电极。该半导体器件包括：设置在上述基板的侧面上、从上述基板的背面向内凹下的凹部，其凹下部的深度达不到上述基板的表面，使上述电极的至少一部分露出来；和在上述凹部内露出上述电极的部分上形成的金属，该金属的厚度达不到上述基板的侧面。根据上面所述的本发明，能够提供批量生产性和焊接装配性能优良的半导体器件。
附图说明
图1(a)示出了本发明的实施例1的树脂密封后的半导体器件的斜视图，图1(b)示出了本发明实施例1的树脂密封前的半导体器件的斜视图。
图2示出了实施例1的半导体器件的平面图。
图3示出了图2的箭头(III)方向的半导体器件的侧视图。
图4示出了图2的箭头(IV)方向的半导体器件的侧视图。
图5示出了本发明的实施例1的半导体器件的局部背面图。
图6的斜视图示出了本发明的实施例2的半导体器件。
图7示出了图6的箭头(VII)方向的半导体器件的侧视图。
图8示出了图6的箭头(VIII)方向的半导体器件的侧视图。
图9的侧视图示出了本发明的实施例3的半导体器件。
图10的侧视图示出了本发明的实施例4的半导体器件。
图11示出了本发明的各个实施例的半导体器件的凹部的变形例的局部背面图。
图12的斜视图示出了现有技术的端面贯通孔结构的半导体器件。
图13示出了现有技术的LGA方式的半导体器件的平面图。
图14示出了图6的箭头(XIV)方向的半导体器件的侧视图。
图15示出了图6的箭头(XV)方向的半导体器件的侧视图。
具体实施方式
以下参看附图说明本发明的实施例。在进行该说明时，在全部附图中对于那些共通的部分都赋予共通的参照标号。
[实施例1]
实施例1中，在基板的侧面上形成深度为从基板的背面开始、达不到表面的凹部，可以从该凹部确认焊接装配性。
图1(a)示出了本发明的实施例1的树脂密封后的半导体器件的斜视图。图1(b)示出了本发明实施例1的树脂密封前的半导体器件的斜视图。图2示出了实施例1的半导体器件的平面图。图3示出了图2的箭头(III)方向的半导体器件的侧视图。图4示出了图2的箭头(IV)方向的半导体器件的侧视图。图5出了本发明的实施例1的半导体器件的局部背面图示。以下，对本实施例的半导体器件的结构进行说明。
如图1到图5所示，在片状基板11内配置第1背面电极12，在该第1背面电极的周围的片状基板11内配置多个第2背面电极13。在第1背面电极12上边装载具有有源元件的半导体芯片14，该半导体芯片14和第2背面电极12分别用焊丝15进行连接。用密封树脂18把这样的半导体芯片14密封起来。
然后，在实施例1的半导体器件的片状基板11的侧面上，形成凹部16，该凹部从片状基板11的背面向内部凹下去，为例如四角形。该凹部16的深度是从片状基板11的背面向上但达不到表面，而且，要分别露出第2背面电极12的至少一部分。
此外，在借助于凹部16而露出来的第2背面电极12的侧面上，形成侧面金属化17。该金属化17被设置为达不到片状基板11的侧面。
上述实施例1的半导体器件，可用如下的方法制造。首先，制作片状基板11。这时，考虑到批量生产性，可以配置多个片状基板11，形成例如由5行×5列的25个片状基板11构成的阵列。其次，在片状基板11的侧面上，从背面形成凹部16。在这里，为了避免在采用树脂印刷方式时成为问题的树脂外漏，凹部16的深度要制作成达不到片状基板11的表面的深度。然后，在凹部16内形成与第2背电极13连接的侧面金属化17。这时，为了不对树脂密封后的划片工序造成障碍，形成的侧面金属化17要做成只停留在凹部16内，不会在切断后的封装侧面露出来那样的大小。把半导体芯片14装配到这样得到的片状基板11上。接着，用树脂印刷方式用树脂把半导体芯片14密封起来，用划片方式，把片状基板11分离成单片。
若采用上述实施例1，则凹部16的深度为达不到片状基板11的表面的深度。为此，即便是在采用树脂印刷方式的情况下，也可以防止树脂18进入凹部16内。因此，可以提供批量生产性优良的半导体器件。
此外，还可以从片状基板11的侧面看到在第2背面电极13的侧面形成的侧面金属化17。为此，可以由眼睛观察来确认焊接装配性。
[实施例2]
实施例2是把实施例1的基板变形为多层的结构。
图6的斜视图示出了本发明的实施例2的半导体器件。图7示出了图6的箭头(VII)方向的半导体器件的侧视图。图示出了图6的箭头(VIII)方向的半导体器件8的侧视图。以下，对实施例2的半导体器件进行说明。另外，主要对与实施例1不同的结构进行说明。
如图6到图8所示，在实施例2的半导体器件中，片状基板11变成了多层，例如由下层基板21和上层基板22这么2层构成。接着，在下层基板21的侧面上，从该下层基板21的表面到背面为止，形成穿通的凹部16。与实施例1同样，该凹部16分别露出了第2背面电极12的至少一部分。此外，在借助于凹部16而露出来的第2背面电极12的侧面上形成侧面金属化17。与实施例1同样，该侧面金属化17被设置为达不到片状基板11的侧面的形式。
另外，片状基板11也可以由3层以上构成。在该情况下，就不要在安装半导体芯片14的最上层的基板上，或者，在含有该最上层的基板的数层的基板上，形成凹部16。而是仅仅在最下层的基板，或含有最下层的基板的数层的基板上，形成凹部16。
若采用上述实施例2，则可以得到与实施例1同样的效果。
再者，在实施例2中，采用在下层基板21上形成贯通的凹部16而不在上层基板22上形成凹部16、并使这些上层基板22和下层基板21合起来的办法形成片状基板11。因此，不再需要象实施例1那样，需要把凹部16的深度控制得形成为从片状基板11的背面达不到表面那样。为此，凹部16的形成要比实施例1容易。
[实施例3]
实施例3的结构是不仅把有源元件、还要把无源元件也都安装到实施例1的半导体芯片上。
图9的斜视图示出了本发明的实施例3的半导体器件。以下，对实施例3的半导体器件的结构进行说明。不过，对于那些与实施例1同样的结构则省略说明。
如图9所示，实施例3的半导体器件中，在半导体芯片上具备有源元件和RLC的无源元件。也可以形成例如由L和C构成的阻抗变换电路，构成内置匹配电路式的功率放大器。此外，无源元件，既可以使用表面贴装式部件，也可以预先内置于基板11内。
若采用上述实施例3，则可以与实施例1同样，提供批量生产性和焊接装配性良好的匹配电路内置式的功率放大器。
另外，实施例3的结构，在由多层的基板构成的实施例2中也可以使用。
[实施例4]
实施例4是在实施例1的密封树脂中含有磁性体的结构。
图10示出了本发明的实施例4的半导体器件的斜视图。以下，对实施例4的半导体器件的结构进行说明。对于那些与实施例1同样的结构说明从略。
如图10所示，在实施例4的半导体器件中，使用分散有磁性体的密封树脂41。例如，在形成了在树脂中含有磁性体的密封树脂41后，就用该密封树脂41把半导体芯片14密封起来。
若采用上述实施例4，则可以得到与实施例1同样的效果。
再者，在实施例4中，即便是对于把功率放大器装配到母板上时会成为问题的不希望要的辐射等，由于含有磁性体的密封树脂41把半导体芯片14屏蔽了起来，故也可以减小噪声。
另外，也可以在由多层的基板构成的实施例2或装载有无源元件的实施例3中应用实施例4的结构。
此外，本发明并不受限于上述各个实施例，在实施阶段中，在不偏离其要旨的范围内，种种的变形都是可能的。例如，变形为下面的结构都是可能的：
凹部16的形状不限定于四角形，例如，如图11所示，也可以作成把四角形的四角圆角化了的半圆形。
不限定于利用丝焊的典型的面朝上式的装配方式，也可以作成为倒装式的装配方式。
再有，在上述实施例中含有各种阶段的发明，利用所被公开的多个构成要件的适当的组合，可以提取出种种的发明。例如，即便是在实施例中所示的全部构成要件中削除若干构成要件，仍可以解决在上面所述的发明所要解决的课题中所述的课题，可以得到在发明效果那一栏中所述的效果，在该情况下，就可以去掉该构成要件作成一个发明。

Claims (9)

1.一种半导体器件，具备基板、配置在上述基板上边的半导体芯片，和形成在上述基板内、与上述半导体芯片连接的电极的无引脚封装结构，其特征在于，包括：
设置在上述基板的侧面上的凹部，其从上述基板的背面开始凹下去，但凹下去的深度达不到上述基板的表面，使上述电极的至少一部分露出来；以及
以达不到上述基板的上述侧面的厚度、在上述凹部内露出的上述电极的那部分上形成的金属。
2.根据权利要求1所述的半导体器件，其特征在于：
上述基板是至少为2层以上的多层基板，
上述凹部被设置在上述多层基板之内的除了最上层的基板或含有该最上层的基板的多层基板之外的基板内。
3.根据权利要求2所述的半导体器件，其特征在于：上述凹部被设置在上述多层基板之内的、最下层的基板或含有该最下层的基板的多层基板内。
4.根据权利要求1所述的半导体器件，其特征在于：上述半导体芯片具备有源元件。
5.根据权利要求4所述的半导体器件，其特征在于：上述半导体芯片还具备无源元件。
6.根据权利要求1所述的半导体器件，其特征在于：还具备在上述基板、上述半导体芯片和上述电极上边形成的密封树脂。
7.根据权利要求6所述的半导体器件，其特征在于：上述密封树脂含有磁性体。
8.根据权利要求1所述的半导体器件，其特征在于：上述半导体芯片和上述电极，用焊丝连接起来。
9.根据权利要求1所述的半导体器件，其特征在于：所述凹部为四边形或半圆形。
CNB021524572A 2001-11-30 2002-11-28 半导体器件 Expired - Fee Related CN1231964C (zh)

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