CN107978570B - 芯片封装结构及其制造方法 - Google Patents
芯片封装结构及其制造方法 Download PDFInfo
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- CN107978570B CN107978570B CN201710975918.1A CN201710975918A CN107978570B CN 107978570 B CN107978570 B CN 107978570B CN 201710975918 A CN201710975918 A CN 201710975918A CN 107978570 B CN107978570 B CN 107978570B
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- reinforcing frame
- chip
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- sealing body
- layer
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 238000004806 packaging method and process Methods 0.000 title abstract description 14
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 70
- 238000007789 sealing Methods 0.000 claims abstract description 28
- 229910000679 solder Inorganic materials 0.000 claims abstract description 24
- 239000010410 layer Substances 0.000 claims description 39
- 238000000034 method Methods 0.000 claims description 18
- 239000012790 adhesive layer Substances 0.000 claims description 13
- 238000005192 partition Methods 0.000 claims description 11
- 230000002787 reinforcement Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000003351 stiffener Substances 0.000 description 1
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Abstract
本发明提供一种芯片封装结构及其制造方法。芯片封装结构包括重布线路层、至少一芯片、补强框、密封体以及多个焊球。重布线路层包括彼此相对的第一表面以及第二表面。芯片配置在第一表面上且与重布线路层电性连接。补强框配置在第一表面上且包括至少一贯穿槽。芯片配置于贯穿槽中,且补强框的刚性大于重布线路层的刚性。密封体密封芯片以及补强框且覆盖第一表面。焊球配置在第二表面上且与重布线路层电性连接。
Description
技术领域
本发明涉及一种封装结构及其制造方法,尤其涉及一种芯片封装结构及其制造方法。
背景技术
现代电子装置为了其应用(例如行动应用)而要求小尺寸、大存储容量以及高效能。因此,纳入于现代电子装置(例如行动电子装置)中的半导体芯片封装也必须具有小尺寸、大存储容量以及高效能。
一般来说,印刷电路板(printed circuit board,PCB)包括通常由聚酰亚胺(polyimide)材料制成的绝缘基板以及通常由铜(Cu)制成的导电图案。导电图案可安置于基板的层之间或安置于基板的一表面上。在芯片封装用于电子系统(例如行动电子装置中的主板)中时,为达成接合目的,封装可能会经受高温制程。形成焊球或是将芯片封装接合至电路板的高温制程可能会因芯片封装中各种构件之间的热膨胀系数(coefficient ofthermal expansion,CTE)的不匹配(mismatch)而导致封装翘曲(warpage)。此种翘曲可能会造成芯片封装与电路板之间的连接失败(open connection failure)。除此之外,此种翘曲也会导致在安装时抵靠在主板的焊球的高度不均匀,而造成接触不良(contactfailure)。
发明内容
本发明提供一种芯片封装结构及其制造方法,其能减少芯片封装结构的翘曲,以提高芯片封装结构的信赖度以及结构强度。
本发明提供一种芯片封装结构,其包括重布线路层、至少一芯片、补强框以及密封体。重布线路层包括彼此相对的第一表面以及第二表面。芯片配置在第一表面上且与重布线路层电性连接。补强框配置在第一表面上且包括至少一贯穿槽(through cavity)。芯片配置于贯穿槽中,且补强框的刚性(stiffness)大于重布线路层的刚性。密封体密封芯片以及补强框且覆盖第一表面。
在本发明的一实施例中,芯片包括主动表面以及配置在主动表面上的多个接垫,主动表面面向重布线路层,且接垫安装在重布线路层上。
在本发明的一实施例中,黏着层包括焊膏(solder paste)或是管芯贴合膜(dieattach film,DAF)。
在本发明的一实施例中,补强框的材料包括金属。
本发明提供一种芯片封装结构的制造方法,其包括以下步骤。在载板上配置至少一芯片。在载板上配置补强框。补强框包括至少一贯穿槽,且芯片配置于贯穿槽中。形成密封体以密封芯片以及补强框并覆盖载板。移除载板以暴露出密封体、芯片以及补强框的底表面。在密封体、芯片以及补强框的底表面上形成重布线路层。补强框的刚性大于重布线路层的刚性。
在本发明一实施例中,芯片通过倒装芯片(flip-chip)接着技术安装在载板上。
基于上述,本揭露的芯片封装结构会经受高温制程(例如在重布线路层上形成焊球),而造成芯片封装结构的翘曲。因此,在形成重布线路层以及焊球之前,补强框被配置为环绕芯片。补强框的刚性大于重布线路层的刚性,从而增强芯片封装结构的刚性以及结构强度。除此之外,还能够减少芯片封装结构的翘曲,进而改善芯片封装结构的信赖度。
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。
附图说明
图1至图7示出依照本发明一实施例的一种芯片封装结构的制造方法。
图8示出依照本发明一实施例的补强框。
图9示出依照本发明一实施例的芯片封装结构。
附图标号说明
100、100a:芯片封装结构
105:载板
110:芯片
112:有源表面
114:接垫
120:补强框
122:贯穿槽
124:通道
126:分隔壁
128:侧壁
130:密封体
140:重布线路层
142:第一表面
144:第二表面
150:焊球
160:黏着层
S1:底表面
具体实施方式
图1至图7示出依照本发明一实施例的一种芯片封装结构的制造方法。在本实施例中,一种芯片封装结构的制造方法包括以下步骤。请参照图1,在载板105上配置至少一芯片110(此处示出一个芯片)。芯片110包括面向载板105的有源表面112以及配置在有源表面112上的多个接垫114。在本实施例中,芯片110通过倒装芯片(flip-chip)接着技术安装在载板105上,但本发明不限于此。
接着,请参照图2以及图3,在载板105上配置如图3所示的补强框120。补强框120包括至少一贯穿槽(through cavity)122。如图2所示,芯片110配置在贯穿槽122中。在本实施例中,补强框120可以还包括底表面S1以及至少一通道124。底表面S1与载板105接触。通道124配置于补强框120的侧壁128上。如图3所示,通道124与贯穿槽122相通(communicate)。在本实施例中,补强框120的材料包括金属,但本发明不限于此。
除此之外,在补强框120配置在黏着层160上之前,可以在载板105上配置黏着层160。也即,黏着层160配置在载板105以及补强框120之间,以使得补强框120通过黏着层160贴附在载板105上。黏着层160可包括焊膏(solder paste)或是管芯贴合膜(die attachfilm,DAF)。
接着,请参照图4,形成密封体130以密封芯片110以及补强框120并覆盖载板105。在本实施例中,密封体130填入贯穿槽122以密封芯片,且密封体130可以由通道124从贯穿槽122中流出,以均匀的覆盖载板105的顶表面。藉此,密封体130填入贯穿槽122以及通道124两者。
接着,请参照图5以及图6,移除载板105以暴露出底表面S1(包括密封体130、芯片110以及补强框120被暴露出的表面)。在其他的实施例中,黏着层160可以被形成为覆盖载板105的整个顶表面,以固定补强框120以及芯片110。如此一来,当载板105被移除时,底表面S1可以是平坦的表面(planar surface)。接着,图5所示的结构可以被翻过来,以在底表面S1上形成重布线路层140。在本实施例中,补强框120的刚性(stiffness)大于重布线路层140的刚性。也即,相较于重布线路层140,补强框120较硬,以提供芯片封装结构100的结构强度。
接着,请参照图7,在重布线路层140上形成多个焊球150。焊球150与重布线路层140电性连接。在此时,芯片封装结构100的制造过程已实质上完成。
在本实施例中,芯片封装结构100会经受在重布线路层140上形成焊球150和/或是将芯片封装结构100接合至电路板的高温制程。此高温制程可能会因芯片封装结构100中各种构件之间的热膨胀系数(coefficient of thermal expansion,CTE)的不匹配(mismatch)而导致芯片封装结构100的翘曲(warpage)。因此,在形成焊球150之前,补强框120被配置为环绕芯片100,从而增强芯片封装结构100的刚性以及减少由高温制程所造成的翘曲。
从结构的角度来看,请参照图7,由以上所揭示的方法所制造的芯片封装结构100包括重布线路层140、芯片110、补强框120、密封体130以及多个焊球150。重布线路层140包括彼此相对的第一表面142以及第二表面144。芯片110配置在第一表面142上且与重布线路层140电性连接。补强框120配置在第一表面142上且包括贯穿槽122。芯片110配置在贯穿槽122中,且补强框120的刚性大于重布线路层140的刚性。密封体130密封芯片以及补强框120且覆盖第一表面142。焊球150配置在第二表面144上且与重布线路层140电性连接。
在本实施例中,补强框120可以还包括通道124。通道124形成于补强框120的侧壁。通道124与贯穿槽122相通。底表面S1为面向重布线路层140的表面。补强框120的底表面可还包括黏着层160,以使得补强框120可以通过黏着层160黏着至载板105。黏着层160可包括焊膏或是管芯贴合膜。在其他实施例中,补强框120的底表面、芯片110的主动表面以及密封体130可以彼此相互共面(coplanar)。因此,重布线路层140可以直接形成在补强框120的底表面、芯片110的主动表面以及密封体130上。
图8示出依照本发明一实施例的补强框。图9示出依照本发明一实施例的芯片封装结构。值得注意的是,图9所示的芯片封装结构100a包括与图7所示的芯片封装结构100相同或相似的多个特征。为了清楚以及简单起见,将会省略关于相同或相似的特征的详细描述,且相同或相似的构件由相同或相似的标号表示。以下将描述图9所示的芯片封装结构100a与图7所示的芯片封装结构100的主要差异点。
在本实施例中,芯片封装结构100a可以包括多个芯片110,且补强框120可以对应地包括多个贯穿槽122。芯片110分别配置于贯穿槽122中。除此之外,补强框120可以还包括多个通道124以及至少一分隔壁(division wall)126。分隔壁126配置于任两相邻的贯穿槽122之间以定义贯穿槽122。通道124配置于补强框120的侧壁128和/或分隔壁126上。通道124与贯穿槽122相通。在本实施例中,至少一个通道124配置于分隔壁126上,以使得贯穿槽122能够通过在分隔壁126上的通道124而彼此相通。藉此,当形成密封体130以密封芯片110时,密封体130可以通过在分隔壁126上的通道124而流入贯穿槽122以密封每一芯片110。并且,密封体130可以由通道124从贯穿槽122中流出,以均匀的覆盖载板105的顶表面。除此之外,由于密封体130通过通道124包裹着(wrap around)补强框120,补强框120能够被坚固地且安全地锁在密封体130中,以改善芯片封装结构100、100a的信赖度。
综上所述,本揭露的芯片封装结构会经受高温制程(例如在重布线路层上形成焊球)。此高温制程可能会造成芯片封装结构的翘曲。因此,在形成焊球之前,补强框被配置为环绕芯片。补强框的刚性大于重布线路层的刚性,从而增强芯片封装结构的刚性以及结构强度。据此,芯片封装结构的翘曲能够被减少且芯片封装结构的信赖度能够被改善。
虽然本发明已以实施例揭示如上,然其并非用以限定本发明,任何所属技术领域中技术人员,在不脱离本发明的精神和范围内,当可作些许的更动与润饰,故本发明的保护范围当视权利要求所界定者为准。
Claims (6)
1.一种芯片封装结构,其特征在于,包括:
重布线路层,包括彼此相对的第一表面以及第二表面;
至少一芯片,配置在所述第一表面上且与所述重布线路层电性连接;
补强框,配置在所述第一表面上且包括至少一贯穿槽,其中所述芯片配置于所述贯穿槽中,且所述补强框的刚性大于所述重布线路层的刚性;
密封体,密封所述芯片以及所述补强框且覆盖所述第一表面;以及
多个焊球,配置在所述第二表面上,且所述焊球与所述重布线路层电性连接,其中:
所述补强框具有底表面,所述底表面为所述补强框最接近所述重布线路层的表面;
所述密封体完全覆盖所述补强框的所述底表面以外的其他表面;且
所述至少一芯片的数量为多个芯片,所述至少一贯穿槽的数量为多个贯穿槽,所述多个芯片分别配置于所述多个贯穿槽中,所述补强框还包括多个通道,所述多个通道配置在所述补强框的多个侧壁上,所述多个通道与所述多个贯穿槽相通。
2.根据权利要求1所述的芯片封装结构,其特征在于,所述补强框的所述底表面还包括黏着层。
3.根据权利要求1所述的芯片封装结构,其特征在于,所述补强框还包括至少一分隔壁,所述分隔壁配置于任两相邻的所述贯穿槽之间以定义所述贯穿槽,且至少一所述多个通道配置于所述分隔壁上。
4.一种芯片封装结构的制造方法,其特征在于,包括:
在载板上配置至少一芯片;
在所述载板上配置补强框,其中所述补强框包括至少一贯穿槽,且所述芯片配置于所述贯穿槽中,其中
所述至少一芯片的数量为多个芯片,所述至少一贯穿槽的数量为多个贯穿槽,所述多个芯片分别配置于所述多个贯穿槽中,所述补强框还包括多个通道,所述多个通道配置在所述补强框的多个侧壁上,所述多个通道与所述多个贯穿槽相通;
形成密封体以密封所述芯片以及所述补强框并覆盖所述载板;
移除所述载板以暴露出所述密封体、所述芯片以及所述补强框的底表面;
在所述密封体、所述芯片以及所述补强框的所述底表面上形成重布线路层,其中所述补强框的刚性大于所述重布线路层的刚性,且所述底表面为所述补强框最接近所述重布线路层的表面;以及
在所述重布线层上形成多个焊球,所述焊球与所述重布线路层电性连接,其中:
在形成所述焊球后,所述密封体完全覆盖所述补强框的所述底表面以外的其他表面。
5.根据权利要求4所述的芯片封装结构的制造方法,其特征在于,在所述载板上配置所述补强框的步骤包括:
在所述载板上配置黏着层;以及
在所述黏着层上配置所述补强框,以使得所述补强框贴附在所述载板上。
6.根据权利要求4所述的芯片封装结构的制造方法,其特征在于,所述补强框还包括至少一分隔壁,所述分隔壁配置于任两相邻的所述贯穿槽之间以定义所述贯穿槽,且至少一所述多个通道配置于所述分隔壁上。
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