CN107978569A - 芯片封装结构及其制造方法 - Google Patents

芯片封装结构及其制造方法 Download PDF

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Publication number
CN107978569A
CN107978569A CN201710905860.3A CN201710905860A CN107978569A CN 107978569 A CN107978569 A CN 107978569A CN 201710905860 A CN201710905860 A CN 201710905860A CN 107978569 A CN107978569 A CN 107978569A
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chip
metal layer
patterned metal
seal
packaging structure
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CN201710905860.3A
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CN107978569B (zh
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王启安
徐宏欣
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Powertech Technology Inc
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Powertech Technology Inc
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Abstract

本发明提供一种芯片封装结构及其制造方法，其包括基板、芯片、密封体、多个焊球以及图案化金属层。基板具有彼此相对的第一表面以及第二表面。芯片设置于第一表面上且电连接至基板。密封体密封芯片且覆盖于第一表面。焊球位于第二表面上且与基板电连接。图案化金属层位于密封体上。图案化金属层包括至少一凸出部以及由至少一凸出部所定义的至少一凹陷部。凸出部面向密封体。黏着层位于图案化金属层以及密封体之间。黏着层填充于凹陷部中。

Description

芯片封装结构及其制造方法
技术领域
本发明涉及一种封装结构及其制造方法，尤其涉及一种芯片封装结构及其制造方法。
背景技术
现今的电子元件需要小尺寸、大的存储容量以及高性能，以作为例如行动通讯等应用。因此，用于例如行动通讯设备等现代电子设备的半导体芯片封装，也必须具备小尺寸、大的存储容量以及高性能。
一般而言，印刷电路板(printed circuit board；PCB)通常包括由聚酰亚胺(polyimide；PI)材料制成的绝缘基板以及由铜(Cu)制成的导电图案。导电图案可以位于基板的层与层之间，或者可以位于基板的一个表面之上。当芯片封装用于电子系统时，例如：用于行动通讯设备的主机板中，封装件可能因结合所需而须经由高热工艺。在形成焊球或于将芯片封装连接到电路板的高热工艺中，由于芯片封装中的不同组成之间的热膨胀系数(coefficient of thermal expansion；CTE)不匹配(mismatch)，可能导致芯片封装的翘曲(warpage)。而翘曲可能导致芯片封装与电路板之间的接点分离而损坏。这种翘曲在安装期间也会导致焊球相对于主机板的高度不均匀，从而导致接触损坏。
发明内容
本发明提供一种芯片封装结构及其制造方法，其芯片封装结构的翘曲可以被改善，且可以提升芯片封装结构的可靠性(reliability)。
本发明提供一种芯片封装结构，其包括基板、芯片、密封体、多个焊球以及图案化金属层。基板具有彼此相对的第一表面以及第二表面。芯片设置于第一表面上且电连接至基板。密封体密封芯片且覆盖于第一表面。焊球位于第二表面上且与基板电连接。图案化金属层位于密封体上，且图案化金属层包括凸向密封体的至少一凸出部。凸出部面向密封体。黏着层位于图案化金属层以及密封体之间。黏着层填充于凹陷部中。
在本发明的一实施例中，芯片封装结构还包括多个焊球，位于第二表面上且与基板电连接。
在本发明的一实施例中，基板包括重布线路层，且重布线路层与芯片以及多个焊球电连接。
在本发明的一实施例中，基板包括多个图案化线路层以及多个贯孔，多个图案化线路层位于第一表面以及第二表面上，多个贯孔贯穿基板且电连接多个图案化线路层。
在本发明的一实施例中，芯片通过倒装芯片接合或引线焊接技术设置于基板上。
本发明提供一种芯片封装结构的制造方法，所述方法包括以下步骤。设置芯片于基板的第一表面上，其中芯片电连接至基板。形成密封体以密封芯片并覆盖第一表面。形成多个焊球于基板的第二表面上，其中第二表面相对于第一表面，且焊球电连接至基板。形成图案化金属层，其中图案化金属层包括凸向密封体的至少一凸出部。形成黏着层以将图案化金属层黏着于密封体，其中凸出部面向密封体，且黏着层填充于凹陷部中。
在本发明的一实施例中，芯片封装结构的制造方法还包括形成多个焊球于基板的第二表面上，其中第二表面相对于第一表面，且多个焊球电连接至基板。
在本发明的一实施例中，其中图案化金属层通过电镀工艺形成。
在本发明的一实施例中，其中凹陷部通过蚀刻工艺形成。
基于上述，在芯片封装结构及其制造方法中，芯片封装可能在形成焊球的高热工艺之后产生翘曲。因此，在本发明中，包括至少一个凸出部的图案化金属层通过黏着层黏着于芯片封装。图案化金属层的凸出部的位置对应于芯片封装的翘曲，以将翘曲向下压。如此一来，可以改善芯片封装结构的翘曲，且提升了芯片封装结构的可靠性。
为让本发明的上述特征和优点能更明显易懂，下文特举实施例，并配合附图作详细说明如下。
附图说明
图1是依据本发明一实施例的芯片封装的示意图。
图2是依据本发明另一实施例的芯片封装的示意图。
图3是依据本发明又一实施例的芯片封装的示意图。
图4至图5是依据本发明第一实施例的芯片封装结构的部分制造方法的示意图。
图6是依据本发明第二实施例的芯片封装结构的示意图。
图7是依据本发明第三实施例的芯片封装结构的示意图。
图8是依据本发明第四实施例的芯片封装结构的示意图。
图9是依据本发明第五实施例的芯片封装结构的示意图。
图10是依据本发明第六实施例的芯片封装结构的示意图。
附图标号说明
100、100a、100b、100c、100d、100e：芯片封装结构
105：芯片封装
110：基板
112：第一表面
114：第二表面
116：图案化线路层
118：通孔
119：线路层
120：芯片
122：主动面
124：接垫
126：导线
130：密封体
140：焊球
150：图案化金属层
152：凸出部
154：凹陷部
156：通气孔
160：黏着层
具体实施方式
图1是依据本发明一实施例的芯片封装的示意图。本实施例中，芯片封装结构的制造方法可以包括以下步骤。首先，提供如图1所示的芯片封装105。在本实施例中，芯片120可以先设置于基板110上。基板110包括第一表面112、相对于第一表面112的第二表面114、分别设置在第一表面112与第二表面114上的多个图案化电路层116以及贯穿基板110且电连接至图案化线路层116的多个通孔118。芯片120设置于基板110的第一表面112上，且通过引线焊接(wire bonding)技术电连接至基板110。在本实施例中，芯片120可以包括主动面122以及位于主动面122上的多个接垫124。主动面122面离基板110，且芯片120的接垫124可以通过多个导线126电连接至图案化线路层116。
接着，形成密封体130以密封芯片120以及导线126。密封体130覆盖基板110的第一表面112。接着，形成多个焊球140于基板110的第二表面114上以电连接至基板110。此时，基本上完成了如图1所示的芯片封装105的制造过程。在本实施例中，芯片封装105可以为引线接合细间距球栅阵列(wire-bonding Fine-pitch Ball Grid Array；WB FBGA)封装，但本发明不限于此。芯片封装105可用于如图2及图3所示出的一些实施例中作为说明。
请参照图2，在本实施例中，芯片封装105与图1所示出的芯片封装结构100类似，其相同或类似的构件以相同或类似的标号表示，且具有相同或类似的功能，并省略描述。如图2所示的芯片封装105以及如图1所示的芯片封装105之间的主要差异如下所述。在本实施例中，芯片120通过倒装芯片(flip-chip)接合技术设置于基板110上。在本实施例中，芯片120的主动面122面向基板110，且芯片120的接垫124电连接至基板110的图案化线路层116。也就是说，图2所示的芯片封装105可以为倒装芯片级封装(Flip-Chip Chip Scale Package；FCCSP)，但本发明不限于此。
请参照图3，在本实施例中，芯片封装105与图2所示出的芯片封装结构100类似，其相同或类似的构件以相同或类似的标号表示，且具有相同或类似的功能，并省略描述。如图3所示的芯片封装105以及如图2所示的芯片封装105之间的主要差异如下所述。在本实施例中，基板110可以包括重布线路层，重布线路层的线路层119电连接芯片120以及焊球140。也就是说，图3所示的芯片封装105可以为扇出晶圆级芯片级封装(Fan-Out Wafer LevelChip Scale Package；FO WLCSP)，但本发明不限于此。
本发明的芯片封装105可通过高热工艺以形成焊球140于基板110上及/或将芯片封装105连接至电路板。由于芯片封装105中的不同组成之间的热膨胀系数不匹配，高热处理可能导致芯片封装105的翘曲。因此，可以形成如图4所示的图案化金属层150。在本实施例中，图案化金属层150包括至少一个凸出部152。凸出部152的位置为依据芯片封装105的翘曲来设计。举例而言，在本实施方式中，芯片封装105可能在中心区域发生翘曲，因此如图4所示，凸出部152可以设置于图案化金属层150的中央区域。接着，图案化金属层150通过黏着层160黏着于密封体130上。凸出部152可以面向且朝向密封体130凸出。可以向下按压密封体130以减少芯片封装105的翘曲。如图5所示，黏着层160填充于图案化金属层150以及密封体130之间的间隙中。此时，基本上形成了芯片封装结构100的制造方法。
在本实施例中，如图5所示，图案化金属层150还包括由凸出部152所定义出的至少一个凹陷部154，且黏着层160填充于凹陷部154以及密封体130之间的间隙中。在本实施例中，凸出部152设置于图案化金属层150的中央区域且与密封体130接触。因此，由凸出部152所定义的凹陷部154围绕中央区域。因此，当图案化金属层150通过黏着层160黏着于密封体130时，凸出部152凸向密封体130并与密封体130接触，以向下挤压密封体130以减少芯片封装105的翘曲。在图6所示的实施例中，凸出部152可以具有曲面。图案化金属层150的整个表面面向密封体130且可以具有朝向密封体130凸出的曲面。黏着层160填充于图案化金属层150以及密封体130之间的间隙中。
在本实施例中，可以先通过电镀工艺(electroplating process)形成金属层，然后通过蚀刻工艺(etching process)形成凹陷部154，但本发明对于图案化金属层150的制造方法并不加以限制。此外，值得注意的是，芯片封装结构100采用如图2所示的芯片封装105，但本发明不限于此。图案化金属层150也可以黏着于其他类型的芯片封装，例如：图1及图3所示的芯片封装105，以减少其翘曲。在一些实施例中，凸出部152的至少一部分，例如：凸出部152的峰，可以与密封体130接触。
图7是依据本发明第三实施例的芯片封装结构的示意图。图8是依据本发明第四实施例的芯片封装结构的示意图。请参照图7及图8，在本实施例中，芯片封装结构100b、100c与图5及图6所示出的芯片封装结构100、100a类似，其相同或类似的构件以相同或类似的标号表示，且具有相同或类似的功能，并省略描述。如图7及图8所示的芯片封装结构100b、100c与如图5及图6所示的芯片封装结构100、100a之间的主要差异如下所述。
在本实施方式中，在形成焊球140的高热工艺之后，芯片封装可能在周边区域产生翘曲。也就是说，芯片封装的周边区域可以自焊球弯曲。因此，如图7所示，在本实施方式中，凸出部152位于围绕图案化金属层150的中央区域的周边区域，凹陷部154位于图案化金属层150的中央区域。凸出部152与密封体130接触，以向下挤压芯片封装的周边区域。如此一来，可以改善芯片封装结构100a的翘曲。在图8所示的实施例中，凹陷部154可以具有曲面。
在本实施例中，图案化金属层150可以还包括至少一个通气孔156。通气孔156自凹陷部154的内表面延伸至图案化金属层150的外表面。如此一来，凹陷部154可以通过通气孔156与外部环境连通，以通过通气孔156排出空气。此外，当图案化金属层150被压在黏着层160上以黏着于密封体130上时，填充于凹陷部154中的部分黏着层160可以填充至通气孔156中，以避免黏着层160的溢出。此外，值得注意的是，芯片封装结构100a采用如图2所示的芯片封装105。然而，本发明不限于此。在本实施例中，图案化金属层150也可以黏着于其他类型的芯片封装，例如：图1及图3所示的芯片封装105，以减少其翘曲。
图9是依据本发明第五实施例的芯片封装结构的示意图。图10是依据本发明第六实施例的芯片封装结构的示意图。请参照图9及图10，在本实施例中，芯片封装结构100d、100e与图5及图6所示出的芯片封装结构100、100a类似，其相同或类似的构件以相同或类似的标号表示，且具有相同或类似的功能，并省略描述。如图9及图10所示的芯片封装结构100d、100e与如图5及图6所示的芯片封装结构100、100a之间的主要差异如下所述。
在本实施方式中，在形成焊球140的高热工艺之后，芯片封装可能产生具有多个凸出部以及多格凹陷部的不规则翘曲。因此，如图9以及图10所示，在本实施例中，图案化金属层150可以包括多个凸出部152以及由凸出部152所定义的多个凹陷部154。凸出部152的位置可以对应于翘曲的芯片封装的凸出部，以将翘曲的芯片封装向下压。如此一来，可以改善芯片封装结构100d的翘曲。在图9所示的实施例中，凹陷部154可以具有曲面。
请参照图10，在本实施例中，图案化金属层150可以还包括至少一个通气孔156。通气孔156自至少一个凹陷部154的内表面延伸至图案化金属层150的外表面。在本实施例中，图案化金属层150包括多个通气孔156。各个通气孔156自各个凹陷部154的内表面延伸至图案化金属层150的外表面。如此一来，凹陷部154可以通过通气孔156与外部环境连通，以通过通气孔156排出空气。此外，当图案化金属层150被压在黏着层160上以黏着于密封体130上时，填充于凹陷部154中的部分黏着层160可以填充至通气孔156中，以避免黏着层160的溢出。此外，值得注意的是，芯片封装结构100a采用如图2所示的芯片封装100d,100e。然而，本发明不限于此。在本实施例中，图案化金属层150也可以黏着于其他类型的芯片封装，例如：图1及图3所示的芯片封装105，以减少其翘曲。在其他实施例中，在图9及图10中的至少一凸出部152可以与密封体130接触。
综上所述，在芯片封装结构及其制造方法中，芯片封装可能在形成焊球的高热工艺之后产生翘曲。因此，在本发明中，包括至少一个凸出部的图案化金属层通过黏着层黏着于芯片封装。图案化金属层的凸出部的位置对应于芯片封装的翘曲，以将翘曲向下压。如此一来，可以改善芯片封装结构的翘曲，且提升了芯片封装结构的可靠性。
虽然本发明已以实施例揭示如上，然其并非用以限定本发明，任何所属技术领域中技术人员，在不脱离本发明的精神和范围内，当可作些许的更动与润饰，故本发明的保护范围当视权利要求所界定者为准。

Claims (10)

1.一种芯片封装结构，其特征在于，包括：
基板；
芯片，设置于所述基板上且电连接至所述基板；
密封体，密封所述芯片且覆盖于所述基板；
图案化金属层，位于所述密封体上，且所述图案化金属层包括凸向所述密封体的至少一凸出部；以及
黏着层，填充于所述图案化金属层以及所述密封体之间的间隙中。
2.根据权利要求1所述的芯片封装结构，其特征在于，其中所述图案化金属层还包括由所述至少一凸出部所定义的至少一凹陷部，且所述黏着层填充于所述至少一凹陷部。
3.根据权利要求2所述的芯片封装结构，其特征在于，其中所述至少一凸出部位于所述图案化金属层的中心区域并与所述密封体接触，且所述至少一凹陷部围绕所述中心区域。
4.根据权利要求2所述的芯片封装结构，其特征在于，其中所述至少一凹陷部位于所述图案化金属层的中心区域，所述至少一凸出部位于所述图案化金属层的周边区域，其中所述周边区域围绕所述中心区域，且所述至少一凸出部与所述密封体接触。
5.根据权利要求4所述的芯片封装结构，其特征在于，其中所述图案化金属层还包括至少一通气孔，所述至少一通气孔从所述至少一凹陷部的内表面延伸至所述图案化金属层的外表面。
6.根据权利要求5所述的芯片封装结构，其特征在于，其中填充于所述至少一凹陷部中的所述黏着层被填充至部分的所述至少一通气孔中。
7.根据权利要求2所述的芯片封装结构，其特征在于，其中所述至少一凸出部或所述至少一凹陷部具有弯曲表面。
8.根据权利要求2所述的芯片封装结构，其特征在于，其中所述至少一凹陷部的数量为多个，所述至少一凸出部的数量为多个，且所述图案化金属层还包括至少一通气孔，所述至少一通气孔从所述至少一凹陷部的内表面延伸至所述图案化金属层的外表面。
9.一种芯片封装结构的制造方法，其特征在于，包括：
设置芯片于基板上，其中所述芯片电连接至所述基板；
形成密封体，以密封所述芯片并覆盖所述基板；
形成图案化金属层，其中所述图案化金属层包括凸向所述密封体的至少一凸出部；以及
形成黏着层，以将所述图案化金属层黏着于所述密封体，其中所述至少一凸出部面向且凸向所述密封体，所述黏着层填充于所述图案化金属层以及所述密封体之间的间隙中。
10.根据权利要求9所述的芯片封装结构的制造方法，其特征在于，其中所述图案化金属层还包括由所述至少一凸出部所定义的至少一凹陷部，且所述黏着层填充于所述至少一凹陷部。
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CN202996814U (zh) * 2012-11-30 2013-06-12 华东科技股份有限公司 散热型半导体封装构造
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