CN107275326B - 半导体装置和液体排出头基板 - Google Patents

半导体装置和液体排出头基板 Download PDF

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Publication number
CN107275326B
CN107275326B CN201710222193.9A CN201710222193A CN107275326B CN 107275326 B CN107275326 B CN 107275326B CN 201710222193 A CN201710222193 A CN 201710222193A CN 107275326 B CN107275326 B CN 107275326B
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transistor
terminal
main terminal
semiconductor device
voltage
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Chinese (zh)
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CN107275326A (zh
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松本晃平
藤井一成
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Canon Inc
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Canon Inc
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04511Control methods or devices therefor, e.g. driver circuits, control circuits for electrostatic discharge protection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/14Structure thereof only for on-demand ink jet heads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30Devices controlled by electric currents or voltages
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04541Specific driving circuit
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/0458Control methods or devices therefor, e.g. driver circuits, control circuits controlling heads based on heating elements forming bubbles
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/14Structure thereof only for on-demand ink jet heads
    • B41J2/14016Structure of bubble jet print heads
    • B41J2/14072Electrical connections, e.g. details on electrodes, connecting the chip to the outside...
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/817FETs in a Darlington configuration
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/819Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/921Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/931Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the dispositions of the protective arrangements
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2202/00Embodiments of or processes related to ink-jet or thermal heads
    • B41J2202/01Embodiments of or processes related to ink-jet heads
    • B41J2202/13Heads having an integrated circuit
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65Lateral DMOS [LDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

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  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)
CN201710222193.9A 2016-04-07 2017-04-07 半导体装置和液体排出头基板 Active CN107275326B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016077579A JP6664261B2 (ja) 2016-04-07 2016-04-07 半導体装置及び液体吐出ヘッド用基板
JP2016-077579 2016-04-07

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CN107275326A CN107275326A (zh) 2017-10-20
CN107275326B true CN107275326B (zh) 2022-02-11

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US (1) US10040283B2 (https=)
EP (1) EP3229271B1 (https=)
JP (1) JP6664261B2 (https=)
KR (1) KR20170115448A (https=)
CN (1) CN107275326B (https=)
RU (1) RU2679650C2 (https=)

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KR102227666B1 (ko) * 2017-05-31 2021-03-12 주식회사 키 파운드리 고전압 반도체 소자
JP6971877B2 (ja) * 2018-02-20 2021-11-24 ルネサスエレクトロニクス株式会社 半導体装置
TWI654733B (zh) * 2018-06-04 2019-03-21 茂達電子股份有限公司 靜電放電保護電路
JP7614892B2 (ja) * 2021-03-11 2025-01-16 キヤノン株式会社 半導体装置、液体吐出ヘッドおよび液体吐出装置
CN115871338B (zh) * 2021-09-30 2026-03-13 群创光电股份有限公司 具有记忆单元的加热器装置及其操作方法
CN119028943B (zh) * 2023-05-18 2025-10-03 长鑫存储技术有限公司 反熔丝结构、反熔丝阵列及其操作方法、存储器
CN117594592A (zh) * 2023-12-20 2024-02-23 芯联先锋集成电路制造(绍兴)有限公司 一种半导体集成芯片及其制作方法

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CN1147152A (zh) * 1995-06-22 1997-04-09 日本电气株式会社 用于改善静电击穿电压的半导体器件的输入保护电路
CN101689545A (zh) * 2007-06-21 2010-03-31 Nxp股份有限公司 Esd保护电路
US7910950B1 (en) * 2006-04-13 2011-03-22 National Semiconductor Corporation High voltage ESD LDMOS-SCR with gate reference voltage

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EP0851552A1 (en) 1996-12-31 1998-07-01 STMicroelectronics S.r.l. Protection ciruit for an electric supply line in a semiconductor integrated device
JPH1165088A (ja) 1997-08-19 1999-03-05 Canon Inc デバイス製造用の基板
JP2008130994A (ja) * 2006-11-24 2008-06-05 Toshiba Corp 静電保護回路
JP2009071261A (ja) * 2007-08-20 2009-04-02 Toshiba Corp 半導体装置
DE102008001368A1 (de) * 2008-04-24 2009-10-29 Robert Bosch Gmbh Flächenoptimierte ESD-Schutzschaltung
KR20100041096A (ko) * 2008-10-13 2010-04-22 주식회사 동부하이텍 반도체 메모리 제조 방법
US20100232081A1 (en) 2009-03-12 2010-09-16 Advanced Analogic Technologies, Inc. Method and Apparatus for Over-voltage Protection With Breakdown-Voltage Tracking Sense Element
JP5981815B2 (ja) 2012-09-18 2016-08-31 キヤノン株式会社 記録ヘッド用基板及び記録装置
JP6077836B2 (ja) 2012-11-20 2017-02-08 キヤノン株式会社 半導体装置、液体吐出ヘッド、液体吐出カートリッジ及び液体吐出装置
US9608107B2 (en) * 2014-02-27 2017-03-28 Vanguard International Semiconductor Corporation Method and apparatus for MOS device with doped region
JP6450169B2 (ja) 2014-04-02 2019-01-09 キヤノン株式会社 半導体装置、液体吐出ヘッド、液体吐出カードリッジ及び液体吐出装置

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CN1147152A (zh) * 1995-06-22 1997-04-09 日本电气株式会社 用于改善静电击穿电压的半导体器件的输入保护电路
US7910950B1 (en) * 2006-04-13 2011-03-22 National Semiconductor Corporation High voltage ESD LDMOS-SCR with gate reference voltage
CN101689545A (zh) * 2007-06-21 2010-03-31 Nxp股份有限公司 Esd保护电路

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BR102017006334A2 (pt) 2017-10-10
RU2017111580A3 (https=) 2018-10-08
JP6664261B2 (ja) 2020-03-13
EP3229271B1 (en) 2022-05-11
KR20170115448A (ko) 2017-10-17
JP2017188606A (ja) 2017-10-12
US10040283B2 (en) 2018-08-07
RU2679650C2 (ru) 2019-02-12
US20170291415A1 (en) 2017-10-12
CN107275326A (zh) 2017-10-20
EP3229271A1 (en) 2017-10-11
RU2017111580A (ru) 2018-10-08

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