JP6971877B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6971877B2 JP6971877B2 JP2018028057A JP2018028057A JP6971877B2 JP 6971877 B2 JP6971877 B2 JP 6971877B2 JP 2018028057 A JP2018028057 A JP 2018028057A JP 2018028057 A JP2018028057 A JP 2018028057A JP 6971877 B2 JP6971877 B2 JP 6971877B2
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- H01L29/1025—Channel region of field-effect devices
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- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
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Description
半導体基板の主表面に第1導電型のボディ領域が形成される。ボディ領域と絶縁しながら対向するゲート電極が、半導体基板の主表面上に形成される。半導体基板の主表面に、ゲート電極を挟むように第2導電型のドレイン領域およびソース領域が形成される。ボディ領域よりも高い第1導電型の不純物濃度を有する第1導電型の第1不純物領域が形成される。ゲート電極、ソース領域およびボディ領域は電気的に接続するように形成される。第1不純物領域は、半導体基板の主表面においてボディ領域とソース領域との間に配置されるように形成される。
図1に示されるように、本実施の形態の半導体装置CHは、たとえばチップ状態であり、半導体基板を有している。半導体基板の表面には、ドライバ回路DRI、プリドライバ回路PDR、アナログ回路ANA、電源回路PC、ロジック回路LC、入出力回路IOCなどの各形成領域が配置されている。
まず本発明者は、図2に示す本実施の形態におけるダイオードAIDの構成と、比較例の構成との各々についてダイオードAIDの順方向I−V特性を調べた。ここで比較例の構成とは、図2に示すダイオードAIDの構成においてp+ソース領域SCとn+コンタクト領域WC1との位置を入れ替えた構成を意味する。上記の結果を図14に示す。
Claims (7)
- 主表面を有する半導体基板と、
前記半導体基板の前記主表面に配置されたn型のボディ領域と、
前記半導体基板の前記主表面に配置されたp型のドレイン領域と、
前記ドレイン領域との間で前記ボディ領域を挟むように前記半導体基板の前記主表面に配置されたp型のソース領域と、
前記半導体基板の前記主表面上に配置され、かつ前記ボディ領域と絶縁しながら対向するゲート電極と、
前記ボディ領域よりも高いn型の不純物濃度を有するn型の第1不純物領域と、
前記ボディ領域、前記ドレイン領域、前記ソース領域および前記第1不純物領域を囲うように、前記半導体基板内に形成された溝に埋められた絶縁層とを備え、
前記ゲート電極、前記ソース領域および前記ボディ領域は電気的に接続されており、
前記第1不純物領域は、前記ソース領域から前記ゲート電極に向かう方向において、前記ボディ領域と前記ソース領域との間に配置されており、
前記半導体基板は、前記ボディ領域と直接的に接するように形成された、p型のエピタキシャル領域を備え、
前記溝は、前記エピタキシャル領域を貫通しており、
前記ソース領域は前記主表面においてドット状となるように、前記ソース領域の周囲は前記第1不純物領域に囲まれている、半導体装置。 - 前記第1不純物領域は、前記ゲート電極の直下の領域と前記ソース領域との間に配置されている、請求項1に記載の半導体装置。
- 前記第1不純物領域のn型の不純物濃度は、前記ボディ領域のn型の不純物濃度の100倍以上である、請求項1に記載の半導体装置。
- 前記ドレイン領域と前記ボディ領域との間において前記半導体基板の前記主表面に配置された分離絶縁層をさらに備え、
前記ゲート電極は、前記分離絶縁層の上に乗り上げている、請求項1に記載の半導体装置。 - 前記半導体基板は、前記エピタキシャル領域内に形成されたp型のパンチスルー防止層を有し、
前記パンチスルー防止層は、前記エピタキシャル領域よりも高い不純物濃度を有する、請求項1に記載の半導体装置。 - 前記パンチスルー防止層は、前記ボディ領域と直接的に接している、請求項5に記載の半導体装置。
- 前記半導体基板は、
第1MOSトランジスタが形成された第1形成領域と、
第2MOSトランジスタが形成された第2形成領域と、
を有し、
前記第1MOSトランジスタは、前記ボディ領域、前記ドレイン領域、前記ソース領域、前記ゲート電極および前記第1不純物領域を有し、
前記絶縁層は、前記第1形成領域および前記第2形成領域間に形成されている、請求項1に記載の半導体装置。
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