JP6664261B2 - 半導体装置及び液体吐出ヘッド用基板 - Google Patents

半導体装置及び液体吐出ヘッド用基板 Download PDF

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Publication number
JP6664261B2
JP6664261B2 JP2016077579A JP2016077579A JP6664261B2 JP 6664261 B2 JP6664261 B2 JP 6664261B2 JP 2016077579 A JP2016077579 A JP 2016077579A JP 2016077579 A JP2016077579 A JP 2016077579A JP 6664261 B2 JP6664261 B2 JP 6664261B2
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Japan
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transistor
semiconductor device
terminal
semiconductor
insulating film
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JP2016077579A
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English (en)
Japanese (ja)
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JP2017188606A (ja
JP2017188606A5 (https=
Inventor
晃平 松本
晃平 松本
一成 藤井
一成 藤井
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Canon Inc
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Canon Inc
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Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2016077579A priority Critical patent/JP6664261B2/ja
Priority to US15/460,408 priority patent/US10040283B2/en
Priority to EP17162692.2A priority patent/EP3229271B1/en
Priority to BR102017006334-8A priority patent/BR102017006334B1/pt
Priority to RU2017111580A priority patent/RU2679650C2/ru
Priority to KR1020170044588A priority patent/KR20170115448A/ko
Priority to CN201710222193.9A priority patent/CN107275326B/zh
Publication of JP2017188606A publication Critical patent/JP2017188606A/ja
Publication of JP2017188606A5 publication Critical patent/JP2017188606A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/015—Ink jet characterised by the jet generation process
    • B41J2/04—Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045—Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501—Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04511—Control methods or devices therefor, e.g. driver circuits, control circuits for electrostatic discharge protection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/015—Ink jet characterised by the jet generation process
    • B41J2/04—Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045—Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501—Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04541—Specific driving circuit
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/015—Ink jet characterised by the jet generation process
    • B41J2/04—Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045—Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501—Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/0458—Control methods or devices therefor, e.g. driver circuits, control circuits controlling heads based on heating elements forming bubbles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B41J2/14016—Structure of bubble jet print heads
    • B41J2/14072—Electrical connections, e.g. details on electrodes, connecting the chip to the outside...
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/817—FETs in a Darlington configuration
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/819—Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/921—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/931—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the dispositions of the protective arrangements
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2202/00—Embodiments of or processes related to ink-jet or thermal heads
    • B41J2202/01—Embodiments of or processes related to ink-jet heads
    • B41J2202/13—Heads having an integrated circuit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

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  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)
JP2016077579A 2016-04-07 2016-04-07 半導体装置及び液体吐出ヘッド用基板 Active JP6664261B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2016077579A JP6664261B2 (ja) 2016-04-07 2016-04-07 半導体装置及び液体吐出ヘッド用基板
US15/460,408 US10040283B2 (en) 2016-04-07 2017-03-16 Semiconductor device and liquid discharge head substrate
EP17162692.2A EP3229271B1 (en) 2016-04-07 2017-03-24 Semiconductor device and liquid discharge head substrate
BR102017006334-8A BR102017006334B1 (pt) 2016-04-07 2017-03-28 Dispositivo semicondutor e substrato para cabeça de descarga de líquido
RU2017111580A RU2679650C2 (ru) 2016-04-07 2017-04-06 Полупроводниковое устройство и подложка головки выброса жидкости
KR1020170044588A KR20170115448A (ko) 2016-04-07 2017-04-06 반도체 장치 및 액체 토출 헤드용 기판
CN201710222193.9A CN107275326B (zh) 2016-04-07 2017-04-07 半导体装置和液体排出头基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016077579A JP6664261B2 (ja) 2016-04-07 2016-04-07 半導体装置及び液体吐出ヘッド用基板

Publications (3)

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JP2017188606A JP2017188606A (ja) 2017-10-12
JP2017188606A5 JP2017188606A5 (https=) 2019-04-25
JP6664261B2 true JP6664261B2 (ja) 2020-03-13

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US (1) US10040283B2 (https=)
EP (1) EP3229271B1 (https=)
JP (1) JP6664261B2 (https=)
KR (1) KR20170115448A (https=)
CN (1) CN107275326B (https=)
RU (1) RU2679650C2 (https=)

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KR102227666B1 (ko) * 2017-05-31 2021-03-12 주식회사 키 파운드리 고전압 반도체 소자
JP6971877B2 (ja) * 2018-02-20 2021-11-24 ルネサスエレクトロニクス株式会社 半導体装置
TWI654733B (zh) * 2018-06-04 2019-03-21 茂達電子股份有限公司 靜電放電保護電路
JP7614892B2 (ja) * 2021-03-11 2025-01-16 キヤノン株式会社 半導体装置、液体吐出ヘッドおよび液体吐出装置
CN115871338B (zh) * 2021-09-30 2026-03-13 群创光电股份有限公司 具有记忆单元的加热器装置及其操作方法
CN119028943B (zh) * 2023-05-18 2025-10-03 长鑫存储技术有限公司 反熔丝结构、反熔丝阵列及其操作方法、存储器
CN117594592A (zh) * 2023-12-20 2024-02-23 芯联先锋集成电路制造(绍兴)有限公司 一种半导体集成芯片及其制作方法

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JP2638571B2 (ja) * 1995-06-22 1997-08-06 日本電気株式会社 半導体装置の入力保護装置
EP0851552A1 (en) 1996-12-31 1998-07-01 STMicroelectronics S.r.l. Protection ciruit for an electric supply line in a semiconductor integrated device
JPH1165088A (ja) 1997-08-19 1999-03-05 Canon Inc デバイス製造用の基板
US7910950B1 (en) * 2006-04-13 2011-03-22 National Semiconductor Corporation High voltage ESD LDMOS-SCR with gate reference voltage
JP2008130994A (ja) * 2006-11-24 2008-06-05 Toshiba Corp 静電保護回路
CN101689545B (zh) * 2007-06-21 2012-07-04 Nxp股份有限公司 Esd保护电路
JP2009071261A (ja) * 2007-08-20 2009-04-02 Toshiba Corp 半導体装置
DE102008001368A1 (de) * 2008-04-24 2009-10-29 Robert Bosch Gmbh Flächenoptimierte ESD-Schutzschaltung
KR20100041096A (ko) * 2008-10-13 2010-04-22 주식회사 동부하이텍 반도체 메모리 제조 방법
US20100232081A1 (en) 2009-03-12 2010-09-16 Advanced Analogic Technologies, Inc. Method and Apparatus for Over-voltage Protection With Breakdown-Voltage Tracking Sense Element
JP5981815B2 (ja) 2012-09-18 2016-08-31 キヤノン株式会社 記録ヘッド用基板及び記録装置
JP6077836B2 (ja) 2012-11-20 2017-02-08 キヤノン株式会社 半導体装置、液体吐出ヘッド、液体吐出カートリッジ及び液体吐出装置
US9608107B2 (en) * 2014-02-27 2017-03-28 Vanguard International Semiconductor Corporation Method and apparatus for MOS device with doped region
JP6450169B2 (ja) 2014-04-02 2019-01-09 キヤノン株式会社 半導体装置、液体吐出ヘッド、液体吐出カードリッジ及び液体吐出装置

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BR102017006334A2 (pt) 2017-10-10
RU2017111580A3 (https=) 2018-10-08
EP3229271B1 (en) 2022-05-11
KR20170115448A (ko) 2017-10-17
JP2017188606A (ja) 2017-10-12
CN107275326B (zh) 2022-02-11
US10040283B2 (en) 2018-08-07
RU2679650C2 (ru) 2019-02-12
US20170291415A1 (en) 2017-10-12
CN107275326A (zh) 2017-10-20
EP3229271A1 (en) 2017-10-11
RU2017111580A (ru) 2018-10-08

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