CN104377171A - 具有中介层的封装件及其形成方法 - Google Patents

具有中介层的封装件及其形成方法 Download PDF

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Publication number
CN104377171A
CN104377171A CN201410007067.8A CN201410007067A CN104377171A CN 104377171 A CN104377171 A CN 104377171A CN 201410007067 A CN201410007067 A CN 201410007067A CN 104377171 A CN104377171 A CN 104377171A
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intermediary layer
pcb
moulding material
substrate
silicon substrate
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CN104377171B (zh
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邱绍玲
许国经
吴伟诚
黄炳刚
侯上勇
郑心圃
余振华
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明涉及具有中介层的封装件及其形成方法。本发明的封装结构包括：中介层、位于中介层上方并且接合至中介层的管芯以及位于中介层下方并且接合至中介层的印刷电路板（PCB）。中介层中不包含晶体管（加入晶体管），而包括半导体衬底、位于半导体衬底上方的互连结构、位于硅衬底中的通孔以及位于硅衬底的背侧上的重分布线。互连结构和重分布线通过通孔电连接。

Description

具有中介层的封装件及其形成方法
技术领域
本申请总体上涉及半导体领域，更具体地，涉及具有中介层的封装件及其形成方法。
背景技术
在集成电路的封装中，可以将多个顶部管芯接合在中介层晶圆上，其中，中介层晶圆包括位于其中的多个中介层。在接合顶部管芯之后，将底部填充物分布到顶部管芯和中介层晶圆之间的间隙内。然后，可以实施固化工艺以固化底部填充物。可以应用模塑料以在其中模制顶部管芯。然后，将产生的中介层晶圆与其上的顶部管芯通过锯切而分割为多个封装件，该封装件包括诸如焊球的暴露的电连接件。之后，将封装件接合至印刷电路板。
发明内容
为解决上述问题，本发明提供了一种封装结构，包括：中介层；管芯，位于所述中介层上方，并且接合至所述中介层；以及印刷电路板（PCB），位于所述中介层下方，并且接合至所述中介层。
其中，所述中介层中不包括有源器件。
其中，所述中介层中包括有源器件。
其中，所述中介层包括：硅衬底；互连结构，位于所述硅衬底的正侧上；通孔，位于所述硅衬底中；以及重分布线，位于所述硅衬底的背侧上，其中，所述互连结构和所述重分布线通过所述通孔互连。
该封装结构还包括：环绕所述管芯的第一模制材料，其中，所述第一模制材料包括与所述中介层的对应边缘对准的边缘。
其中，所述中介层还包括：焊球，用于将所述中介层接合至所述PCB；以及第二模制材料，用于在其中模制每个所述焊球的一部分，其中，所述第一模制材料和所述第二模制材料位于所述中介层的相对侧上。
其中，在所述中介层和所述PCB之间未接合封装衬底。
此外，还提供了一种封装结构，包括：中介层，其中不包括晶体管，其中，所述中介层包括：硅衬底；互连结构，位于所述硅衬底的上方；通孔，位于所述硅衬底中；和重分布线，位于所述硅衬底的背侧上，其中，所述互连结构和所述重分布线通过所述通孔电连接；器件管芯，位于所述中介层上方并且接合至所述中介层；以及印刷电路板（PCB），位于所述中介层下方并且电连接至所述中介层，其中，在所述中介层和所述PCB之间未接合封装衬底。
该封装结构还包括：在其中模制所述器件管芯的第一模制材料，其中，所述第一模制材料包括与所述中介层的对应边缘对准的边缘。
其中，所述中介层还包括：焊球，用于将所述中介层接合至所述PCB；以及第二模制材料，用于在其中模制每个所述焊球的一部分，其中，所述第一模制材料和所述第二模制材料位于所述中介层的相对侧上。
其中，所述焊球具有大于约400μm的间距。
其中，所述焊球与所述PCB的金属部件物理接触。
其中，所述中介层的所述硅衬底包括一层硅衬底。
其中，所述器件管芯包括有源器件。
此外，还提供了一种方法，包括：将器件管芯接合至中介层晶圆的正侧上；使用第一模制材料模制所述中介层晶圆；在所述中介层晶圆的衬底的背侧上实施背侧研磨，其中，在所述背侧研磨之后，暴露出所述衬底中的通孔；附接焊球以电连接至所述通孔；在所述模制材料和所述中介层晶圆上实施管芯锯切以形成封装件，其中，在所述封装件中，所述中介层晶圆的一部分被锯切为中介层；以及将所述封装件直接接合在印刷电路板（PCB）上。
其中，所述封装件通过焊球接合在所述PCB上，所述焊球与所述中介层和所述PCB物理接触。
其中，所述中介层晶圆中不包括有源器件，其中，在所述封装件和所述PCB之间未接合封装衬底。
该方法还包括：将多个器件管芯接合至所述中介层晶圆，其中，在所述管芯锯切之后，所述器件管芯和所述中介层晶圆被锯切为多个封装件。
该方法还包括，在所述管芯锯切之前，应用第二模制材料以在其中模制每个所述焊球的一部分，其中，所述第一模制材料和所述第二模制材料位于所述中介层晶圆的相对侧上。
该方法还包括，在附接所述焊球之前，形成电连接至所述通孔的重分布线。
附图说明
为了更全面地理解实施例及其优势，现将结合附图所进行的以下描述作为参考，其中：
图1A至图8是根据一些示例性实施例的封装件在制造的中间阶段的截面图和顶视图。
具体实施方式
下面详细论述了本发明各实施例的制造和使用。然而，应该理解，实施例提供了许多可以在各种具体环境中实现的可应用的概念。所论述的具体实施例仅仅是示例性的，而不用于限制本发明的范围。
本发明根据各个示例性实施例提供了包括中介层的封装件及其形成方法。示出了形成封装件的中间阶段。论述了实施例的变化例。在全文的各个视图及示例性实施例中，相似的参考标号用于表示相似的元件。
图1A示出了封装部件20的截面图。封装部件20包括衬底22。在一些实施例中，衬底22为半导体衬底，其可以进一步为晶体硅衬底，但是也可以由诸如硅锗、碳化硅等的其他半导体材料形成衬底22。在可选实施例中，衬底22为电介质衬底。封装部件20可以为器件晶圆，其包括有源器件，诸如形成在半导体衬底22的表面22A处的晶体管（未示出）。在封装部件20为器件晶圆的实施例中，封装部件20也可以包括诸如电阻器和/或电容器的无源器件（未示出）。在可选实施例中，封装部件20是其中不包括有源器件的中介层晶圆。在这些实施例中，封装部件20可以包括或可以不包括形成在其中的无源器件。可以形成从衬底22的顶面22A延伸至衬底22内的通孔（TV）24。TV24有时也称为衬底通孔，或当衬底22为硅衬底时，称为硅通孔。封装部件20包括可以彼此相同的多个封装部件40。相应地，封装部件40可以为器件芯片（当锯切分隔时也称为芯片），器件芯片包括有源器件、不包含有源器件的中介层等。在下文中，封装部件40可选地称为中介层或管芯40。
互连结构28形成在衬底22上方，并且用于电连接至集成电路器件（如存在）和/或TV24。互连结构28可以包括多个介电层30。在介电层30中形成金属线32。尽管示出了一层金属线32，但其可以有多层金属线32。通孔34形成在金属线32之间，并且互连其上方和下方的金属线32。金属线32和通孔34有时称为重分布线（RDL）32/34。在一些实施例中，介电层30包括氧化硅、氮化硅、碳化硅、氮氧化硅、它们的组合和/或它们的多层。可选地，介电层30可以包括具有低k值的一个或多个低k介电层。例如，介电层30中的低k介电材料的k值可以小于约3.0，或小于约2.5。
在封装部件20的顶面处形成电连接件38。在一些实施例中，电连接件38包括金属柱（例如，铜柱），其中，在金属柱的顶面上可以形成或不形成焊帽。在可选实施例中，电连接件38包括焊球。在又一些实施例中，电连接件38可以是包括铜柱（copper post）、镍层、焊帽、化学镀镍浸金（ENIG）、化学镀镍钯浸金（ENEPIG）等的复合金属凸块。
图1B示出了封装部件20的一部分的顶视图，其中，示出了多个金属线32。在一些实施例中，使用与用于在器件管芯上形成集成电路的相同的技术形成金属线32、通孔34和介电层30。因此，金属线32可以具有较小的线宽度W1和较小的线间距S1。在一些实施例中，线宽度W1小于1μm，并且可以介于约0.2μm和约0.6μm之间。线间距S1也可以小于1μm，并且可以介于约0.2μm和约0.6μm之间。利用较小的线宽度W1和线间距S1，可以提高金属线32和通孔34的可布线性，且金属线的一些层可以充分满足形成的封装件的布线需求。因此，当封装部件40（图1A）被封装为封装件时，在最终的封装件中不需要封装衬底以增加可布线性。
参考图2，例如，通过倒装芯片接合，将封装部件44接合至封装部件20。相应地，电连接件38将封装部件44中的集成电路接合并电连接至封装部件20中的RDL32和TV24。封装部件44可以是包括逻辑电路、存储器电路等的器件管芯。因此，在下文中，可选地，将封装部件44称为管芯44。可选地，封装部件44可以是包括接合至相应的中介层、封装衬底等的管芯的封装件。在每个管芯40上，可以具有一个、两个或多个接合在其上的管芯44。在一些实施例中，管芯44包括衬底46，在一些实施例中，衬底46可以是硅衬底。在可选实施例中，由硅锗、碳化硅、III-V族化合物半导体等形成衬底46。因此，衬底46的表面46A是硅、硅锗、碳化硅、III-V族化合物半导体等的表面。
接下来，将聚合物50分布在管芯44与封装部件20之间的间隙内。聚合物50可以是底部填充物，并且因此，在下文中，将聚合物50称为底部填充物50，但是聚合物50也可以包括诸如环氧树脂的其他聚合物。底部填充物50也可以是模制的底部填充物或非流动性的底部填充物。在这些实施例中，底部填充物50和模制材料52（图3）可以是相同的材料，且在单个分布步骤中进行分布。
参考图3，例如，使用模压在管芯44和封装部件20上模制模制材料52（可以是聚合物）。在一些实施例中，模制材料52包括模塑料、环氧树脂等。实施固化步骤以固化模制材料52，其中，可以通过热固化、紫外线（UV）固化等实施固化步骤。在实施例中，在固化模制材料52之后，管芯44掩埋在模制材料52中，可以实施诸如研磨的平坦化步骤以去除模制材料52的过量部分，过量部分位于器件管芯44的顶面46A上方。因此，衬底46的表面46A被暴露出，并且与模制材料52的顶面52A平齐。在可选实施例中，在CMP之后，模制材料52的顶面高于衬底46的顶面46A。
参考图4，例如，通过粘合剂（未示出），将载体54附接至图3中结构的正侧。在一些实施例中，载体54是玻璃载体。在可选实施例中，载体54为硅载体、有机物载体等。接下来，如图5至图6B所示，实施背侧工艺。参考图5，在半导体衬底22的背侧上实施背侧研磨以减薄半导体衬底22，直至暴露出TV24。可以实施蚀刻步骤以从背侧蚀刻半导体衬底22的薄层，从而使TV24从衬底22的背侧凸出。
如图6A所示，在半导体衬底22的背侧上形成介电层56，然后通过实施轻CMP，从而使TV24从介电层56凸出。介电层56可以包括氧化硅、氮氧化硅或它们的组合。在一些实施例中，在封装部件20的背侧上形成一个或多个其中形成有重分布线（RDL）60的介电层58。RDL60电连接至TV24。在一些实施例中，介电层58包括可以由氧化硅、氮化硅、氮氧化硅等形成的钝化层。在可选实施例中，介电层58包括诸如聚酰亚胺的聚合物。在一些实施例中，可以由铜形成RDL60。此外，在铜上可以形成或不形成镍层。例如，当RDL60的线厚度小于约7μm时，则在RDL60的表面（示出的底部）上形成镍层。每一个RDL60也可以是复合层，例如，包括铜层以及位于铜层上方的镍层。在这些实施例中，当下面的铜层的厚度小于约7μm时，复合层的顶层包含镍。
电连接件62也可以形成在封装部件20的背侧上并电连接至TV24。在一些实施例中，电连接件62为焊球。在其他实施例中，电连接件62包括金属焊盘、金属凸块、焊帽等。电连接件62的间距（pitch）可以大于约400μm。电连接件62可以用于接合至附加的电部件（未示出），该附加的电部件可以是半导体衬底、封装衬底、印刷电路板（PCB）等。
在一些实施例中，应用有时被称为液态模塑料64的模塑料64。因此，每个连接件62可以包括嵌入在模塑料64中的第一部分，和未嵌入在模塑料64中的第二部分。例如，模塑料64的厚度可以介于焊球62高度的约30%和约70%之间。由于模塑料64和模制材料52位于封装部件20的相对侧上，所以模塑料64可以补偿由模制材料52施加的应力，从而减小所形成的封装件的翘曲。在可选实施例中，不应用模塑料64。
图6B示出了从背侧观察的封装部件20的一部分的视图，其中，示出了多个RDL60。在一些实施例中，使用与用于在器件管芯上形成互连结构的相同的技术形成RDL60和介电层58。因此，RDL60可以具有较小的线宽度W2和较小的线间距S2。在一些实施例中，线宽度W2大于1μm，并且可以介于约2μm和约50μm的范围内。线间距S2也可以大于1μm，并且可以介于约2μm和约10μm之间。
接下来，参考图7，实施切割步骤以将图6A中的封装件锯切为多个封装件70，其中，沿着划线68锯切。由于通过将芯片接合在中介层晶圆上而形成封装件70，因此封装件70有时称为晶圆上芯片（CoW）封装件。CoW封装件70包括中介层40和器件管芯44。由于沿中介层晶圆20锯切模制材料52，因此模制材料52的边缘与中介层40的相应边缘对准。
图8示出了接合至印刷电路板（PCB）72的CoW封装件70。焊球62将CoW封装件70直接接合至PCB72，其中，在CoW封装件70和PCB72之间不存在封装衬底。因此，焊球62与金属部件（诸如PCB72的接合焊盘）物理接触。根据一些实施例，底部填充物74分布在CoW封装件70和PCB72之间的间隙内。在分布之后，固化底部填充物74。
本发明的实施例具有一些优势特征。通过CoW封装件直接接合至PCB，而不是通过位于CoW封装件和PCB之间的另一个封装衬底，从而降低了制造成本。采用器件管芯的制造工艺来形成用于中介层晶圆的互连结构，使非常小的金属线的形成成为可能。因此，增强了CoW封装件的重布线性。从而，不再需要封装衬底。
根据实施例，封装结构包括中介层、位于中介层上方并接合至中介层的管芯以及位于中介层下方并接合至中介层的PCB。
根据其他实施例，封装结构包括中介层。中介层中不包含晶体管，并且包括半导体衬底、位于半导体衬底上方的互连结构、位于硅衬底中的通孔和位于硅衬底的背侧上的重分布线。互连结构和重分布线通过通孔电连接。封装结构还包括位于中介层上方并且接合至中介层的器件管芯，以及位于中介层下方并且电连接至中介层的PCB，其中，在中介层与PCB之间并未接合封装衬底。
根据又一些其他的的实施例，方法包括：将器件管芯接合至中介层晶圆的正侧上，使用第一模制材料模制中介层晶圆，并且在中介层晶圆的衬底的背侧上实施背侧研磨。在背侧研磨之后，暴露出衬底中的通孔。方法还包括附接焊球以电连接至通孔，以及在模制材料和中介层晶圆上实施管芯锯切以形成封装件。在封装件中，中介层晶圆的一部分被锯切为中介层。将封装件直接接合至PCB上。
尽管已经详细地描述了实施例及其优势，但应该理解，在不背离所附权利要求限定的本发明的精神和范围的情况下，可以对本发明做各种改变、替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、物质组成、工具、方法和步骤的特定实施例。作为本领域普通技术人员应理解，根据本发明，可以使用现有的或今后将开发的用于执行与根据本发明所述的相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造、物质组成、工具、方法或步骤。相应地，附加的权利要求旨在将这些工艺、机器、制造、物质组成、工具、方法或步骤包括在它们的范围内。此外，每个权利要求构成单独的实施例，并且不同权利要求和实施例的组合均在本发明的范围内。

Claims (10)

1.一种封装结构，包括：
中介层；
管芯，位于所述中介层上方，并且接合至所述中介层；以及
印刷电路板（PCB），位于所述中介层下方，并且接合至所述中介层。
2.根据权利要求1所述的封装结构，其中，所述中介层中不包括有源器件。
3.根据权利要求1所述的封装结构，其中，所述中介层中包括有源器件。
4.根据权利要求1所述的封装结构，其中，所述中介层包括：
硅衬底；
互连结构，位于所述硅衬底的正侧上；
通孔，位于所述硅衬底中；以及
重分布线，位于所述硅衬底的背侧上，其中，所述互连结构和所述重分布线通过所述通孔互连。
5.根据权利要求1所述的封装结构，还包括：环绕所述管芯的第一模制材料，其中，所述第一模制材料包括与所述中介层的对应边缘对准的边缘。
6.根据权利要求5所述的封装结构，其中，所述中介层还包括：
焊球，用于将所述中介层接合至所述PCB；以及
第二模制材料，用于在其中模制每个所述焊球的一部分，其中，所述第一模制材料和所述第二模制材料位于所述中介层的相对侧上。
7.根据权利要求1所述的封装结构，其中，在所述中介层和所述PCB之间未接合封装衬底。
8.一种封装结构，包括：
中介层，其中不包括晶体管，其中，所述中介层包括：
硅衬底；
互连结构，位于所述硅衬底的上方；
通孔，位于所述硅衬底中；和
重分布线，位于所述硅衬底的背侧上，其中，所述互连结构和所述重分布线通过所述通孔电连接；
器件管芯，位于所述中介层上方并且接合至所述中介层；以及
印刷电路板（PCB），位于所述中介层下方并且电连接至所述中介层，其中，在所述中介层和所述PCB之间未接合封装衬底。
9.根据权利要求8所述的封装结构，还包括：在其中模制所述器件管芯的第一模制材料，其中，所述第一模制材料包括与所述中介层的对应边缘对准的边缘。
10.一种方法，包括：
将器件管芯接合至中介层晶圆的正侧上；
使用第一模制材料模制所述中介层晶圆；
在所述中介层晶圆的衬底的背侧上实施背侧研磨，其中，在所述背侧研磨之后，暴露出所述衬底中的通孔；
附接焊球以电连接至所述通孔；
在所述模制材料和所述中介层晶圆上实施管芯锯切以形成封装件，其中，在所述封装件中，所述中介层晶圆的一部分被锯切为中介层；以及
将所述封装件直接接合在印刷电路板（PCB）上。
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