CN112368574A - 用于封装片上超声的方法和设备 - Google Patents

用于封装片上超声的方法和设备 Download PDF

Info

Publication number
CN112368574A
CN112368574A CN201980045060.6A CN201980045060A CN112368574A CN 112368574 A CN112368574 A CN 112368574A CN 201980045060 A CN201980045060 A CN 201980045060A CN 112368574 A CN112368574 A CN 112368574A
Authority
CN
China
Prior art keywords
interposer
metal
chip
coupled
ultrasound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201980045060.6A
Other languages
English (en)
Other versions
CN112368574B (zh
Inventor
刘建伟
基思·G·菲费
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Butterfly Network Inc
Original Assignee
Butterfly Network Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Butterfly Network Inc filed Critical Butterfly Network Inc
Publication of CN112368574A publication Critical patent/CN112368574A/zh
Application granted granted Critical
Publication of CN112368574B publication Critical patent/CN112368574B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
    • A61B8/44—Constructional features of the ultrasonic, sonic or infrasonic diagnostic device
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/06—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
    • B06B1/0644—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction using a single piezoelectric element
    • B06B1/0655—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction using a single piezoelectric element of cylindrical shape
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/06—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
    • B06B1/0688—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction with foil-type piezoelectric elements, e.g. PVDF
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N29/00—Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
    • G01N29/22—Details, e.g. general constructional or apparatus details
    • G01N29/24—Probes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894—Materials of the insulating layers or coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
    • A61B8/44—Constructional features of the ultrasonic, sonic or infrasonic diagnostic device
    • A61B8/4483—Constructional features of the ultrasonic, sonic or infrasonic diagnostic device characterised by features of the ultrasound transducer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0271—Resonators; ultrasonic resonators
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/09—Packages
    • B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/098—Arrangements not provided for in groups B81B2207/092 - B81B2207/097
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2291/00—Indexing codes associated with group G01N29/00
    • G01N2291/02—Indexing codes associated with the analysed material
    • G01N2291/024—Mixtures
    • G01N2291/02475—Tissue characterisation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/52—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00
    • G01S7/52017—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00 particularly adapted to short-range imaging
    • G01S7/52079—Constructional features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68372—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support a device or wafer when forming electrical connections thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Mechanical Engineering (AREA)
  • General Health & Medical Sciences (AREA)
  • Pathology (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Surgery (AREA)
  • Veterinary Medicine (AREA)
  • Public Health (AREA)
  • Biophysics (AREA)
  • Animal Behavior & Ethology (AREA)
  • Radiology & Medical Imaging (AREA)
  • Biomedical Technology (AREA)
  • Heart & Thoracic Surgery (AREA)
  • Medical Informatics (AREA)
  • Molecular Biology (AREA)
  • Immunology (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • Transducers For Ultrasonic Waves (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Gynecology & Obstetrics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)

Abstract

本文中描述了用于封装片上超声的方法和设备。片上超声可以耦接至再分布层以及耦接至中介层。包封体可以包封片上超声装置，并且第一金属柱可以延伸穿过包封体并且电耦接至再分布层。第二金属柱可以延伸穿过中介层。中介层可以包括氮化铝。第一金属柱可以电耦接至第二金属柱。印刷电路板可以耦接至中介层。

Description

用于封装片上超声的方法和设备
相关申请的交叉引用
本申请根据35U.S.C.§119(e)要求于2018年7月6日提交的代理人案号为B1348.70087US00并且题为“METHODS AND APPARATUSES FOR PACKAGING AN ULTRASOUND-ON-A-CHIP”的美国临时申请第62/694,810号的权益，其全部内容在此通过引用被并入本文中。
技术领域
一般地，本文中描述的技术的各方面涉及超声装置。一些方面涉及封装片上超声。
背景技术
超声装置可以用于使用具有相对于人类可听到的频率更高的频率的声波来执行诊断成像和/或治疗。超声成像可以用于观察内部软组织体结构，例如，用于查找疾病源或排除任何病状。当超声脉冲(例如，通过使用超声成像装置)被传送至组织中时，声波被组织反射，其中不同组织反射不同程度的声音。然后，这些反射声波可以被记录并且作为超声图像被显示给操作者。声信号的强度(幅度)以及波行进通过身体所花费的时间提供用于产生超声图像的信息。使用超声装置可以形成许多不同类型的图像，包括实时图像。例如，可以生成示出组织的二维截面、血液流动、组织随时间的运动、血液的位置、特定分子的存在、组织的硬度或三维区域的解剖结构的图像。
发明内容
根据至少一个方面，提供了一种设备。该设备包括：片上超声，其包括顶表面和底表面；以及中介层(interposer layer)，其包括顶表面和底表面；以及再分布层；其中：片上超声装置的顶表面耦接至再分布层；并且片上超声装置的底表面耦接至中介层的顶表面。
根据至少一个方面，提供了一种方法。该方法包括：将包括第一金属柱的中介层耦接至印刷电路板；以及将中介层耦接至包含第二金属柱的经封装的片上超声。
根据至少一个方面，提供了一种方法。该方法包括：在中介层中形成金属柱；将中介层耦接至片上超声；以及在片上超声上形成再分布层。
附图说明
将参照以下示例性且非限制性的附图来描述各个方面和实施方式。应当认识到，附图不一定按比例绘制。出现在多个附图中的项在所述项出现的所有附图中由相同或相似的附图标记指示。
图1至图37示出了根据本文描述的某些实施方式的在使用一个过程对片上超声装置的封装期间的各种结构的截面。
图38至图42示出了根据本文描述的某些实施方式的在使用另一过程对片上超声装置的封装期间的各种结构的截面；
图43示出了根据本文所描述的某些实施方式的用于封装片上超声的示例过程。
图44示出了根据本文所描述的某些实施方式的用于封装片上超声的示例过程。
具体实施方式
常规超声系统是大型的、复杂的且昂贵的系统，通常仅由具有大量财力资源的大型医疗机构购买。最近，已经引入了更便宜、便携且不太复杂的超声成像装置。这样的成像装置可以包括单片集成到单个半导体管芯上以形成单片超声装置的超声换能器。在于2017年1月25日提交的题为“UNIVERSAL ULTRASOUND DEVICE AND RELATED APPARATUS ANDMETHODS”(并转让给本申请的受让人)的美国专利申请第15/415,434号中描述了这样的片上超声装置的各方面，该美国申请的全部内容通过引用并入本文中。
发明人已经认识到以下特征，与诸如引线接合的其他封装方法相比，该特征可以有助于封装这样的片上超声装置。特别地，发明人已经认识到，集成的扇出(InFO)封装和用金属柱增强的中介层可以为封装片上超声装置提供益处。示例益处包括较低的寄生电感和电阻、较高的效率、较少的发热、较高的封装吞吐量以及较高的封装可靠性。此外，这样的封装可以使得装置具有较小的传感器头，这对于诸如心脏应用的超声成像应用可以是有帮助的，其中可能期望传感器头配装在肋之间。此外，这样的封装可以使得装置具有较薄的透镜，这可以增加信号强度。
应当认识到，本文描述的实施方式可以以许多方式中的任何方式来实现。以下仅出于说明性目的而提供具体实现方式的示例。应当认识到，所提供的这些实施方式和特征/能力可以单独使用、一起使用、或者以两个或更多个的任何组合使用，因为本文中描述的技术的各方面在该方面不受限制。
图1至图37示出了根据本文描述的某些实施方式的在使用一个过程对片上超声装置的封装期间的各种结构的截面。图1示出了耦接至载体基板106的离型层104和耦接至离型层104的绝缘层102。载体基板106可以包括例如玻璃。离型层104可以包括例如光热转换(LTHC)涂层材料。绝缘材料102可以包括例如可以通过曝光而图案化并且显影的聚合物，例如聚酰亚胺、聚苯并恶唑(PBO)或苯并环丁烯(BCB)。
在图2中，在绝缘层102上形成金属层108。金属层108可以例如使用物理气相沉积(PVD)或溅射来形成。金属层108可以包括例如铜，或者在一些实施方式中，金属层108可以包括两个层，例如耦接至绝缘层102的钛层和耦接至钛层的铜层。
在图3中，在金属层108上形成抗蚀剂层110。例如，抗蚀剂层110可以包括光致抗蚀剂。
在图4中，在抗蚀剂层110中形成开口。例如，通过光刻掩模的曝随后显影，可以在抗蚀剂层110的通过掩模曝光的部分中创建开口。
在图5中，使用电镀在抗蚀剂层110中的开口中形成金属柱112。金属层108可以用作电镀的种子层。金属柱112可以包括与金属层108相同的材料，例如铜。应当认识到，尽管示出了四个金属柱112，但是可以存在二维地布置的更多金属柱112(例如，几十个或几百个)。
在图6中，去除了抗蚀剂层110。例如，可以使用抗蚀剂剥离剂来去除抗蚀剂层110。金属层108的先前在抗蚀剂层110的未曝光部分之下的部分也被去除。例如，可以使用各向异性蚀刻来去除金属层108，其中，比金属柱112更快地蚀刻金属层108。
图7示出了耦接至绝缘层116的片上超声114。
在图8中，在绝缘层116中创建了开口(例如，使用光刻法)。
在图9中，在绝缘层116上形成抗蚀剂层118。
在图10中，在抗蚀剂层118中形成开口(例如，使用光刻法)，其中在抗蚀剂层118中创建的开口延伸到在绝缘层116中创建的开口中。
在图11中，在抗蚀剂层118和绝缘层116中的开口内形成金属触点120。例如，金属触点120可以通过电镀形成，并且可以包括铜或铜合金。在一些实施方式中，可以在金属触点120与片上超声114之间形成凸块下冶金层(在图11中未示出)。
在图12中，去除抗蚀剂层118(例如，使用抗蚀剂剥离剂)。
在图13中，向绝缘层116添加另外的绝缘材料以覆盖金属触点120。
在图14中，将管芯附接膜(DAF)122耦接至绝缘层102。
在图15中，将片上超声114耦接至管芯附接膜122。
在图16中，形成包封体(encapsulation)124，以包封片上超声114、绝缘层116、管芯附接膜122和金属柱112。包封体124可以包括模制化合物、模制底部填充物、环氧树脂或树脂。包封体124的顶表面在绝缘层116和金属柱112的顶表面上方延伸。
在图17中，使包封体124和绝缘层116的顶表面平坦化，直到暴露金属柱112和金属触点116的顶表面。例如，化学机械平坦化(CMP)可以用于平坦化。
在图18中，向绝缘层116添加附加的绝缘材料，使得绝缘层116覆盖金属触点120和金属柱112的顶表面。
在图19中，在金属触点120和金属柱112上方的绝缘层116中创建开口。例如，可以使用光刻法来创建开口。
在图20中，在绝缘层116中的开口中以及绝缘层116上形成再分布线(RDL)126。如所示出的，RDL 126可以将某些金属触点120电连接至某些金属柱122中。RDL 126可以包括金属迹线和通孔，可以使用电镀(包括未示出的种子层的形成)来形成，并且可以包括诸如铝、铜、钨和/或这些金属的合金的金属。RDL 126可以包括多层金属迹线和通孔。
在图21中，向绝缘层116添加附加的绝缘材料以覆盖RDL 126的顶表面。
在图22中，将载体基板106和离型层104与绝缘层102分离。例如，将光(例如，紫外线或激光)投射到离型层104上可以分解离型层104，从而使离型层104和载体基板106与绝缘层102分离。也可以清洗绝缘层102的表面以去除任何残留物。翻转图21的结构以达到图22的取向。
在图23中，在绝缘层102中创建开口。
在图24中，焊球128被放置在绝缘层102中的开口中。在一些实施方式中，焊球128可以通过电镀而形成。在一些实施方式中，可以在开口中形成其他形式的电连接器(例如，金属柱)。在一些实施方式中，可以在焊球128与金属柱112之间形成块下冶金层(在图24中未示出)。
图25示出了耦接至载体基板136的离型层134、耦接至离型层134的绝缘层132和耦接至绝缘层132的中介层130。中介层130可以包括例如氮化铝。
在图26中，在中介层130中形成开口。例如，可以使用激光钻孔来形成开口。
在图27中，在中介层130上形成金属层138。可以例如使用溅射来形成金属层138。金属层138可以包括例如铜，或者在一些实施方式中，金属层138可以包括两个层，例如耦接至中介层130的钛层和耦接至钛层的铜层。
在图28中，使用电镀在抗蚀剂层130中的开口中形成金属柱142。金属层138可以用作电镀的种子层。金属柱142可以包括与金属层138相同的材料，例如铜。应当理解，除了用作电气布线之外，金属柱142还可以帮助加强中介层130，该中介层130可能是易碎的。
在图29中，在金属层138和金属柱142上形成抗蚀剂层140。
在图30中，将抗蚀剂层140图案化(例如，使用光刻法)以阻挡金属柱142的顶表面。
在图31中，对金属层108的非阻挡部分进行蚀刻以使金属柱142电隔离。在一些实施方式中，替代或除了使用光刻法来阻挡金属柱142之外，还可以使用定时蚀刻或各向异性蚀刻。
在图32中，去除抗蚀剂层140(例如，使用抗蚀剂剥离剂)。
在图33中，将载体基板136和离型层134与绝缘层132分离。
在图34中，在绝缘绝缘层132中创建开口。
在图35中，将焊球144放置在绝缘层132中的开口中。
在图36中，将热粘合层150耦接至中介层142。在一些实施方式中，热粘合层150可以包括含银的环氧树脂。将焊球144耦接至印刷电路板(PCB)148。在一些实施方式中，可以使用表面安装技术(SMT)或倒装芯片焊接来将焊球144耦接至PCB 148。在绝缘层132与PCB148之间形成底部填充物(例如，环氧树脂)层146。
在图37中，将焊球128耦接至金属柱142。将金属柱112与金属柱142对准。在一些实施方式中，可以使用表面安装技术(SMT)或倒装芯片焊接来将焊球128耦接至金属柱142。在最终结构中，中介层可以提供片上超声114与PCB 148之间的电气布线，以及用于片上超声114的散热器。
图38至图42示出了根据本文中所描述的某些实施方式的在使用另一过程对片上超声装置的封装期间的各种结构的截面。图38示出了图32的结构。
在图39中，使用电镀使金属柱142向上延伸。可以看出，金属柱142延伸超过中介层130的顶表面。
在图40中，通过管芯附接膜122将片上超声114耦接至中介层130。
在图41中，向绝缘层116添加另外的绝缘材料。与图16类似地，形成包封体124以包封片上超声114、绝缘层116、管芯附接膜122和金属柱142。与图18至图21类似地，形成RDL126。
在图42中，与图33至图36类似地，将载体基板136和离型层134与绝缘层132分离，在金属柱142上形成焊球144，将焊球144耦接至PCB 148，并且在绝缘层132与PCB 148之间形成底部填充物层146。
与图1至图37的过程相比，图38至图42的过程可以使得片上超声114能够在半导体铸造厂中结合至中介层130，其中，过程控制、质量以及产量可以是高的。此外，虽然图1至图37的过程可能需要同时地将焊球128结合至金属柱142以及将绝缘层102结合至热粘合剂150，但是图38至图42的过程可以消除热粘合剂层150。
图43示出了根据本文描述的某些实施方式的用于封装片上超声的示例过程4300。在动作4302中，将包含金属柱的中介层耦接至印刷电路板。动作4302可以对应于图36所示的步骤。在动作4304中，将中介层耦接至包含金属柱的经封装的片上超声。动作4304可以对应于图37所示的步骤。可以通过热粘合剂层将中介层耦接至经封装的片上超声。
图44示出了根据本文描述的某些实施方式的用于封装片上超声的示例过程4400。在动作4402中，在中介层中形成金属柱。动作4402可以对应于图38至图39中所示的步骤。在动作4404中，将中介层耦接至片上超声。动作4404可以对应于图40所示的步骤。在动作4406中，在经封装的片上超声上形成再分布层。动作4406可以对应于图41所示的步骤。
本公开内容的各个方面可以单独使用、组合使用、或者以前面描述的实施方式中未具体讨论的各种布置使用，并且因此在其应用中不限于前面的描述中阐述的或附图中示出的部件的细节和布置。例如，一个实施方式中描述的各方面可以与其他实施方式中描述的方面以任何方式组合。
除非清楚地被指示为相反含义，否则如本文在说明书中和在权利要求中使用的不定冠词“a”和“an”应当被理解为意指“至少一个”。
如本说明书和权利要求书中使用的短语“和/或”应该被理解为表示如此结合的要素中的“一者或二者”，即，在一些情况下结合地存在而在其他情况下分离地存在的要素。用“和/或”列出的多个要素应以相同的方式解释，即，如此结合的要素中的“一个或更多个”要素。除了由“和/或”子句具体标识的要素之外，可以可选性地存在其他要素，而不管该要素是与具体标识的要素相关还是不相关。因此，作为非限制性示例，当与诸如“包括”的开放式语言结合使用时，对“A和/或B”的提及在一个实施方式中可以仅指代A(可选地包括除B以外的要素)；在另一个实施方式中，可以仅指代B(可选地包括除A之外的要素)；在又一实施方式中，可以指代A和B两者(可选地包括其他要素)；等等。
如本说明书和权利要求书中所使用的，关于一个或更多个要素的列表，短语“至少一个”应被理解为表示选自要素列表中的要素中的任何一个或更多个要素，但是不一定包括要素列表中具体列出的每一个要素中的至少一个要素，并且不排除要素列表中的要素的任何组合。该限定还允许可以可选地存在除了在短语“至少一个”涉及的要素列表内具体标识的要素之外的要素，而不管该要素与具体标识的那些要素相关还是不相关。因此，作为非限制性示例，“A和B中的至少一个”(或者等效地，“A或B中的至少一个”，或者等效地，“A和/或B中的至少一个”)在一个实施方式中可以指代至少一个A(可选地包括多于一个的A)而不存在B(并且可选地包括除B之外的要素)；在另一个实施方式中，可以指代至少一个B(可选地包括多于一个的B)而不存在A(并且可选地包括除A之外的要素)；在又一实施方式中，可以指代至少一个A，可选地包括多于一个的A，以及至少一个B，可选地包括多于一个的B(并且可选地包括其他要素)；等等。
在权利要求中使用诸如“第一”、“第二”、“第三”等序数术语来修饰权利要求要素本身并不意味着一个权利要求要素相对于另一权利要求要素的任何优先次序、优先地位或顺序，也不意味着执行方法动作的时间顺序，而是仅用作用以将具有某个名称的一个权利要求要素与(如果没有使用序数术语将)具有同一名称的另一要素进行区分的标记以将这些权利要求要素区分开。
如本文所使用的，对处于两个端点之间的数值的引用应当被理解为涵盖该数值可以取任一端点的情况。例如，除非另有说明，否则陈述某一特性的值在A与B之间或近似在A与B之间应当被理解为意指所指示的范围包括端点A和B。
在一些实施方式中，术语“近似”和“大约”可以用来意指在目标值的±20％内；在一些实施方式中，术语“近似”和“大约”可以用来意指在目标值的±10％内；在一些实施方式中，术语“近似”和“大约”可以用来意指在目标值的±5％内；而在一些实施方式中，术语“近似”和“大约”可以用来意指在目标值的±2％内。术语“近似”和“大约”可以包括该目标值。
此外，本文使用的措辞和术语是出于描述的目的，并且不应当被认为是限制性的。本文中“包括”、“包含”或“具有”、“含有”、“涉及”及其变型的使用意味着涵盖其后所列的项及其等同物以及附加项。
上面已经描述了至少一个实施方式的若干方面，应当认识到，本领域技术人员将容易想到各种改变、修改和改进。这样的改变、修改和改进旨在成为本公开内容的客体。因此，上述描述和附图仅作为示例。

Claims (29)

1.一种设备，包括：
片上超声，包括顶表面和底表面；
中介层，包括顶表面和底表面；以及
再分布层；
其中：
所述片上超声装置的顶表面耦接至所述再分布层；并且
所述片上超声装置的底表面耦接至所述中介层的顶表面。
2.根据权利要求1所述的设备，还包括：
包封体，包封所述片上超声装置；以及
第一金属柱，延伸穿过所述包封体并且电耦接至所述再分布层。
3.根据权利要求2所述的设备，其中，所述中介层包括延伸穿过所述中介层的第二金属柱。
4.根据权利要求3所述的设备，其中，所述中介层包括氮化铝。
5.根据权利要求3所述的设备，其中，所述第一金属柱电耦接至所述第二金属柱。
6.根据权利要求3所述的设备，其中，所述第一金属柱与所述第二金属柱对准。
7.根据权利要求3所述的设备，其中，焊球将所述第一金属柱电耦接至所述第二金属柱。
8.根据权利要求2所述的设备，还包括耦接至所述中介层的底表面的印刷电路板。
9.根据权利要求3所述的设备，还包括耦接至所述中介层的底表面的印刷电路板。
10.根据权利要求9所述的设备，其中，焊球将所述第二金属柱电耦接至所述印刷电路板。
11.根据权利要求1所述的设备，其中，所述片上超声通过热粘合剂耦接至所述中介层。
12.根据权利要求1所述的设备，还包括：
包封体，包封所述片上超声装置；以及
金属柱，延伸穿过所述中介层和所述包封体并且电耦接至所述再分布层。
13.根据权利要求12所述的设备，其中，所述中介层包括氮化铝。
14.根据权利要求11所述的设备，还包括耦接至所述中介层的底表面的印刷电路板。
15.根据权利要求14所述的设备，其中，焊球将所述金属柱电耦接至所述印刷电路板。
16.一种方法，包括：
将包括第一金属柱的中介层耦接至印刷电路板；以及
将所述中介层耦接至包含第二金属柱的经封装的片上超声。
17.根据权利要求16所述的方法，其中，经封装的片上超声装置包括：
包封体，包封所述片上超声装置；以及
再分布层，耦接至所述片上超声装置；
其中，所述第二金属柱延伸穿过所述包封体并且电耦接至所述再分布层。
18.根据权利要求16所述的方法，其中，所述第一金属柱延伸穿过所述中介层。
19.根据权利要求16所述的方法，其中，所述中介层包括氮化铝。
20.根据权利要求16所述的方法，其中，将所述中介层耦接至所述经封装的片上超声包括：将所述第一金属柱电耦接至所述第二金属柱。
21.根据权利要求16所述的方法，其中，将所述中介层耦接至所述经封装的片上超声包括：将所述第一金属柱与所述第二金属柱对准。
22.根据权利要求16所述的方法，其中，将所述中介层耦接至所述经封装的片上超声包括：通过焊球将所述第一金属柱电耦接至所述第二金属柱。
23.根据权利要求16所述的方法，其中，将所述中介层耦接至所述印刷电路板包括：通过焊球将所述印刷电路板电耦接至所述第二金属柱。
24.根据权利要求16所述的方法，其中，将所述中介层耦接至所述经封装的片上超声包括：通过热粘合剂将所述中介层耦接至所述经封装的片上超声。
25.一种方法，包括：
在中介层中形成金属柱；
将所述中介层耦接至片上超声；以及
在所述片上超声上形成再分布层。
26.根据权利要求25所述的方法，其中，在所述中介层中形成所述金属柱包括：形成所述金属柱，使得所述金属柱延伸超过所述中介层的顶表面。
27.根据权利要求25所述的方法，还包括：将所述金属柱和所述片上超声装置包封在包封体中。
28.根据权利要求25所述的方法，其中，所述中介层包括氮化铝。
29.根据权利要求25所述的方法，其中，形成所述再分布层包括：将所述再分布层电耦接至所述片上超声和所述金属柱。
CN201980045060.6A 2018-07-06 2019-07-03 用于封装片上超声的方法和设备 Active CN112368574B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862694810P 2018-07-06 2018-07-06
US62/694,810 2018-07-06
PCT/US2019/040516 WO2020010207A1 (en) 2018-07-06 2019-07-03 Methods and apparatuses for packaging an ultrasound-on-a-chip

Publications (2)

Publication Number Publication Date
CN112368574A true CN112368574A (zh) 2021-02-12
CN112368574B CN112368574B (zh) 2023-08-01

Family

ID=69059840

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980045060.6A Active CN112368574B (zh) 2018-07-06 2019-07-03 用于封装片上超声的方法和设备

Country Status (8)

Country Link
US (2) US11018068B2 (zh)
JP (1) JP2021529459A (zh)
KR (1) KR20210030951A (zh)
CN (1) CN112368574B (zh)
AU (1) AU2019297412A1 (zh)
CA (1) CA3105492A1 (zh)
TW (1) TW202011897A (zh)
WO (1) WO2020010207A1 (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW202000137A (zh) 2018-05-03 2020-01-01 美商蝴蝶網路公司 互補式金屬氧化物半導體感測器上超音波換能器的壓力口
US11018068B2 (en) * 2018-07-06 2021-05-25 Butterfly Network, Inc. Methods and apparatuses for packaging an ultrasound-on-a-chip
WO2020069252A1 (en) 2018-09-28 2020-04-02 Butterfly Network, Inc. Fabrication techniques and structures for gettering materials in ultrasonic transducer cavities
US11626343B2 (en) * 2018-10-30 2023-04-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with enhanced thermal dissipation and method for making the same
CA3118563A1 (en) 2018-11-13 2020-05-22 Butterfly Network, Inc. Getter technology for micromachined ultrasonic transducer cavities
AU2019378878A1 (en) 2018-11-15 2021-06-03 Butterfly Network, Inc. Anti-stiction bottom cavity surface for micromachined ultrasonic transducer devices
CN113454217A (zh) 2018-12-07 2021-09-28 奥科坦特公司 用于蛋白质-蛋白质相互作用筛选的系统
TW202045099A (zh) 2019-02-07 2020-12-16 美商蝴蝶網路公司 用於微加工超音波傳感器裝置的雙層金屬電極
TW202102312A (zh) 2019-02-25 2021-01-16 美商蝴蝶網路公司 用於微加工超音波換能器裝置的適應性空腔厚度控制
US11484911B2 (en) 2019-04-12 2022-11-01 Bfly Operations, Inc. Bottom electrode via structures for micromachined ultrasonic transducer devices
US11501562B2 (en) 2019-04-30 2022-11-15 Bfly Operations, Inc. Ultrasound face scanning and identification apparatuses and methods
US11684951B2 (en) 2019-08-08 2023-06-27 Bfly Operations, Inc. Micromachined ultrasonic transducer devices having truncated circle shaped cavities
US11676922B2 (en) * 2019-10-28 2023-06-13 Qualcomm Incorporated Integrated device comprising interconnect structures having an inner interconnect, a dielectric layer and a conductive layer
US11988640B2 (en) 2020-03-11 2024-05-21 Bfly Operations, Inc. Bottom electrode material stack for micromachined ultrasonic transducer devices
US11776820B2 (en) * 2020-09-30 2023-10-03 Huawei Technologies Co., Ltd. Vertical interconnection structure and manufacturing method thereof, packaged chip, and chip packaging method

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060055024A1 (en) * 2004-09-14 2006-03-16 Staktek Group, L.P. Adapted leaded integrated circuit module
US20100133704A1 (en) * 2008-12-01 2010-06-03 Stats Chippac, Ltd. Semiconductor Device and Method of Forming an Interposer Package with Through Silicon Vias
US20130237055A1 (en) * 2010-06-11 2013-09-12 Imec Method of redistributing functional element
CN104377171A (zh) * 2013-08-16 2015-02-25 台湾积体电路制造股份有限公司 具有中介层的封装件及其形成方法
CN106328619A (zh) * 2015-06-30 2017-01-11 台湾积体电路制造股份有限公司 3d封装件结构及其形成方法
CN106536067A (zh) * 2014-07-14 2017-03-22 蝴蝶网络有限公司 微加工超声换能器以及相关装置和方法
US20170365774A1 (en) * 2016-06-20 2017-12-21 Jonathan M. Rothberg Electrical contact arrangement for microfabricated ultrasonic transducer
CN108155160A (zh) * 2018-01-29 2018-06-12 中芯长电半导体（江阴）有限公司 指纹识别芯片的封装结构及封装方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7327554B2 (en) * 2003-03-19 2008-02-05 Ngk Spark Plug Co., Ltd. Assembly of semiconductor device, interposer and substrate
US7741686B2 (en) 2006-07-20 2010-06-22 The Board Of Trustees Of The Leland Stanford Junior University Trench isolated capacitive micromachined ultrasonic transducer arrays with a supporting frame
DE102007026445A1 (de) 2007-06-06 2008-12-11 Robert Bosch Gmbh Mikromechanisches Bauelement und Verfahren zur Herstellung eines mikromechanischen Bauelements
JP5676255B2 (ja) 2007-07-03 2015-02-25 コーニンクレッカ フィリップス エヌ ヴェ 存在検出のための薄膜検出器
US7843022B2 (en) 2007-10-18 2010-11-30 The Board Of Trustees Of The Leland Stanford Junior University High-temperature electrostatic transducers and fabrication method
US7781238B2 (en) 2007-12-06 2010-08-24 Robert Gideon Wodnicki Methods of making and using integrated and testable sensor array
WO2009135255A1 (en) 2008-05-07 2009-11-12 Signostics Pty Ltd Docking system for medical diagnostic scanning using a handheld device
US7825509B1 (en) 2009-06-13 2010-11-02 Mwm Acoustics, Llc Transducer package with transducer die unsupported by a substrate
US8207652B2 (en) 2009-06-16 2012-06-26 General Electric Company Ultrasound transducer with improved acoustic performance
EP2647032B1 (en) 2010-12-01 2016-03-09 1366 Technologies Inc. Making semiconductor bodies from molten material using a free-standing interposer sheet
WO2014123922A1 (en) 2013-02-05 2014-08-14 Butterfly Network, Inc. Cmos ultrasonic transducers and related apparatus and methods
WO2014123556A1 (en) 2013-02-05 2014-08-14 Sound Technology Inc. Ultrasound device
WO2014151525A2 (en) 2013-03-15 2014-09-25 Butterfly Network, Inc. Complementary metal oxide semiconductor (cmos) ultrasonic transducers and methods for forming the same
CN106659464B (zh) 2014-04-18 2020-03-20 蝴蝶网络有限公司 互补金属氧化物半导体(cmos)晶片中的超声换能器及相关装置和方法
US9252127B1 (en) 2014-07-10 2016-02-02 Invensas Corporation Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture
US20160009544A1 (en) * 2015-03-02 2016-01-14 Butterfly Network, Inc. Microfabricated ultrasonic transducers and related apparatus and methods
US9922896B1 (en) 2016-09-16 2018-03-20 Taiwan Semiconductor Manufacturing Company, Ltd. Info structure with copper pillar having reversed profile
US10196261B2 (en) 2017-03-08 2019-02-05 Butterfly Network, Inc. Microfabricated ultrasonic transducers and related apparatus and methods
AU2018289454A1 (en) 2017-06-21 2019-12-05 Butterfly Network, Inc. Microfabricated ultrasonic transducer having individual cells with electrically isolated electrode sections
KR20200115558A (ko) 2018-01-30 2020-10-07 버터플라이 네트워크, 인크. 초음파 온 칩을 패키징하기 위한 방법들 및 장치들
US11590532B2 (en) 2018-03-09 2023-02-28 Bfly Operations, Inc. Ultrasound transducer devices and methods for fabricating ultrasound transducer devices
WO2019213448A1 (en) 2018-05-03 2019-11-07 Butterfly Network, Inc. Vertical packaging for ultrasound-on-a-chip and related methods
US11018068B2 (en) 2018-07-06 2021-05-25 Butterfly Network, Inc. Methods and apparatuses for packaging an ultrasound-on-a-chip

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060055024A1 (en) * 2004-09-14 2006-03-16 Staktek Group, L.P. Adapted leaded integrated circuit module
US20100133704A1 (en) * 2008-12-01 2010-06-03 Stats Chippac, Ltd. Semiconductor Device and Method of Forming an Interposer Package with Through Silicon Vias
US20130237055A1 (en) * 2010-06-11 2013-09-12 Imec Method of redistributing functional element
CN104377171A (zh) * 2013-08-16 2015-02-25 台湾积体电路制造股份有限公司 具有中介层的封装件及其形成方法
CN106536067A (zh) * 2014-07-14 2017-03-22 蝴蝶网络有限公司 微加工超声换能器以及相关装置和方法
CN106328619A (zh) * 2015-06-30 2017-01-11 台湾积体电路制造股份有限公司 3d封装件结构及其形成方法
US20170365774A1 (en) * 2016-06-20 2017-12-21 Jonathan M. Rothberg Electrical contact arrangement for microfabricated ultrasonic transducer
CN108155160A (zh) * 2018-01-29 2018-06-12 中芯长电半导体（江阴）有限公司 指纹识别芯片的封装结构及封装方法

Also Published As

Publication number Publication date
JP2021529459A (ja) 2021-10-28
EP3818372A1 (en) 2021-05-12
US20210296195A1 (en) 2021-09-23
US20200013691A1 (en) 2020-01-09
US11018068B2 (en) 2021-05-25
TW202011897A (zh) 2020-04-01
CN112368574B (zh) 2023-08-01
CA3105492A1 (en) 2020-01-09
KR20210030951A (ko) 2021-03-18
US11676874B2 (en) 2023-06-13
WO2020010207A1 (en) 2020-01-09
AU2019297412A1 (en) 2021-01-28
EP3818372A4 (en) 2022-04-06

Similar Documents

Publication Publication Date Title
CN112368574B (zh) 用于封装片上超声的方法和设备
US20230158543A1 (en) Ultrasound transducer devices and methods for fabricating ultrasound transducer devices
TWI735702B (zh) 積體扇出型封裝及其製造方法
US11694943B2 (en) Semiconductor device including heat dissipation structure and fabricating method of the same
US11389137B2 (en) Methods and apparatuses for packaging an ultrasound-on-a-chip
TWI603452B (zh) 半導體裝置及其製造方法
US8703600B2 (en) Electronic component and method of connecting with multi-profile bumps
US20210183832A1 (en) Methods and apparatuses for packaging ultrasound-on-chip devices
JP4115326B2 (ja) 半導体パッケージの製造方法
TW202013650A (zh) 晶片封裝結構的形成方法
US20230034707A1 (en) Packaging structures and packaging methods for ultrasound-on-chip devices
TW202114121A (zh) 半導體封裝及其製造方法
EP3818372B1 (en) Methods and apparatuses for packaging an ultrasound-on-a-chip
JP2005026301A (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
US11244894B2 (en) Semiconductor packages
JP4352263B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
TWI856618B (zh) 半導體封裝及其製造方法
US7144801B2 (en) Bumping process to increase bump height
TW202435385A (zh) 半導體封裝及其製造方法
CN110931370A (zh) 晶片封装结构的形成方法
JP2009049306A (ja) 半導体装置
JP2009200132A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant