CN106659464B - 互补金属氧化物半导体(cmos)晶片中的超声换能器及相关装置和方法 - Google Patents
互补金属氧化物半导体(cmos)晶片中的超声换能器及相关装置和方法 Download PDFInfo
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- CN106659464B CN106659464B CN201580025730.XA CN201580025730A CN106659464B CN 106659464 B CN106659464 B CN 106659464B CN 201580025730 A CN201580025730 A CN 201580025730A CN 106659464 B CN106659464 B CN 106659464B
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- Micromachines (AREA)
Abstract
描述了形成在互补金属氧化物半导体(CMOS)晶片中的微加工超声换能器,以及制造这种装置的方法。可以通过牺牲释放来去除CMOS晶片的金属化层,以产生超声换能器的腔。剩余层可以形成超声换能器的膜。
Description
相关申请的交叉引用
本申请根据35U.S.C.§119(e)要求于2014年4月18日提交的代理人案号为B1348.70010US00的题为“ULTRASONIC TRANSDUCERS IN COMPLEMENTARY METAL OXIDESEMICONDUCTOR(CMOS) WAFERS AND RELATED APPARATUS AND METHODS”的美国临时专利申请序列第61/981,464号的权益,其全部内容通过引用并入本文。
背景技术
技术领域
本文所描述的技术涉及微加工超声换能器以及相关装置和方法。
相关技术
电容式微加工超声换能器(CMUT)是已知的装置,其包括在微加工的腔上方的膜。膜可以用于将声信号转换成电信号,或者将电信号转换成声信号。因此,CMUT可以用作超声换能器。
两种类型的工艺可以被用来制造CMUT。牺牲层工艺在衬底上在牺牲层上方形成CMUT的膜,然后去除牺牲层以在膜下方形成CMUT的腔。晶片接合工艺将两个晶片接合在一起以形成具有膜的腔。
发明内容
本技术的各方面提供了在互补金属氧化物半导体(CMOS)晶片中的微加工超声换能器(例如,CMUT),利用CMOS晶片的去除的金属化层作为用于一个或更多个微加工超声换能器的声腔。因此,超声换能器可以与CMOS晶片集成并且形成在晶片中,避免了为制造超声换能器而对于晶片接合的任何需要。因此,与使用晶片接合的情况相比,超声换能器与CMOS晶片的集成可以被简化并且变得更加稳健。此外,使用去除的 CMOS金属化层作为超声换能器的腔可以有利于在CMOS晶片上的超声换能器下方形成集成电路(IC),因此使CMOS晶片上形成集成的超声换能器和集成电路所需的空间减少或最小化。因此,根据一些实施方案,可以形成具有单片集成的超声换能器和CMOS IC的紧凑互补金属氧化物半导体(CMOS)超声换能器(CUT)。
根据本技术的一方面,互补金属氧化物半导体(CMOS)晶片包括半导体衬底和超声换能器。超声换能器包括:腔,其对应CMOS晶片的去除的第一金属化层;设置在腔与半导体衬底之间的电极;以及CMOS晶片的声学振动膜(acoustic film),其包括CMOS晶片的介电层和第二金属化层。腔可以设置在半导体衬底与声学振动膜之间。CMOS晶片还可以包括在半导体衬底上的集成电路,集成电路耦接至超声换能器并且被配置成控制超声换能器的运行。
根据本技术的一个方面,装置包括在互补金属氧化物半导体(CMOS) 晶片中的超声换能器,其中,金属化层的去除部分限定了超声换能器的声腔的至少一部分。
根据本技术的一个方面,互补金属氧化物半导体(CMOS)晶片包括半导体衬底、第一金属化层和超声换能器。超声换能器包括形成在第一金属化层中的腔,设置在腔与半导体衬底之间的电极,以及CMOS晶片的声学振动膜,CMOS晶片的声学振动膜包括CMOS晶片的第二金属化层和介电层。腔可以设置在半导体衬底与声学振动膜之间。CMOS晶片还包括在半导体衬底上的集成电路,集成电路耦接至超声换能器并且被配置成控制超声换能器的运行。
根据本技术的一方面,一种方法包括通过堆叠互补金属氧化物半导体 (CMOS)晶片的多个层来在CMOS晶片中形成超声换能器的声学振动膜,所述CMOS晶片的多个层包括CMOS晶片的至少一个介电层和第一金属化层。该方法还包括产生通往CMOS晶片的第二金属化层的至少一个进入孔,第二金属化层包括由第一导电衬层和第二导电衬层界定的内金属层,在一些实施方案中,第二金属化层包含金属。该方法还包括通过利用选择性蚀刻经由所述至少一个进入孔去除第一金属化层的内金属层的至少一部分来在CMOS晶片中形成腔,从而释放声学振动膜同时基本上保留第一导电衬层和第二导电衬层。该方法还包括用绝缘材料密封至少一个进入孔,以及将第一导电衬层和第二导电衬层耦接至CMOS晶片的集成电路。
根据本申请的一个方面,一种方法包括通过去除CMOS晶片的金属化层的至少一部分来至少部分地限定互补金属氧化物半导体(CMOS)晶片中的超声换能器的声腔。
附图说明
将参照以下附图对本申请的各个方面和实施方案进行描述。应当理解,附图不一定按比例绘制。在多个附图中出现的项在出现所述项的所有附图中由相同的附图标记表示。
图1示出了根据本申请的非限制性实施方案的形成在CMOS晶片中并且与CMOS IC集成以形成CUT的电容式微加工超声换能器(CMUT)。
图2是示出根据本申请的非限制性实施方案的在CMOS晶片中制造 CMUT的工艺的流程图。
图3A至3J示出了根据本申请的非限制性实施方案的与图2的工艺一致的用于在CMOS晶片中制造CMUT的制造工序。
具体实施方式
本技术的各方面源自申请人的如下理解:对于至少一些应用标准 CMOS晶片的某些特征尺寸基本上与超声换能器的某些目标特征尺寸相对应,因而可以通过利用这样的对应关系来在CMOS晶片中制造超声换能器。也就是说,申请人已经认识到,CMOS晶片的至少一些金属化层具有与超声换能器的目标腔深度基本上匹配的厚度。申请人还认识到, CMOS晶片的覆在金属化层之上的层的厚度与超声换能器的目标膜厚度基本上匹配。因此,申请人已经认识到,可以通过利用合适尺寸的CMOS 金属化层作为待释放以限定超声换能器的腔的牺牲层来在CMOS晶片中制造(并且因此与CMOS晶片集成)超声换能器。这种制造提供了实现超声换能器与CMOS晶片的高集成度的简单且稳健的方式。因此,本申请的各方面可以促进具有集成的超声换能器和电路的“芯片上超声系统”装置的形成。
此外,申请人已经认识到,使用具有适当定位衬层的牺牲的CMOS 金属化层可以进一步简化在CMOS晶片中超声换能器的制造。通过仅去除牺牲CMOS金属化层的内部金属,剩余的衬层可以用作用于超声换能器的电极,消除了为产生电极而对于进一步处理的任何需求。在这个意义上,超声换能器电极已经“内置(built in)”于CMOS金属化层。
因此,本技术的方面提供了在CMOS晶片中的微加工超声换能器(例如,CMUT),利用CMOS晶片的去除的金属化层作为用于一个或更多个微加工超声换能器的声腔。金属化可以表示用于在CMOS晶片上路径信号(routing signal)的信号线金属化,并且金属化层的不需要去除以形成超声换能器的声腔的部分可以保留在CMOS晶片上并且被配置为信号线。金属化层可以具有多层构造,包括内部金属和一个或更多个衬层。在一些实施方案中,内部金属可以被去除以形成声腔,而衬层可以被保留和配置为超声换能器的电极。
根据本技术的一个方面,利用牺牲释放技术从CMOS晶片中去除 CMOS金属化层,以产生形成在CMOS晶片中的超声换能器的声腔。以牺牲释放为目标的金属化可以具有基本上与声腔的目标深度相对应的厚度。在一些实施方案中,超声换能器可以在执行牺牲释放之前基本上完成,使得牺牲释放可以完成(或几乎完成)超声换能器的形成。集成电路可以任选地形成在CMOS晶片中的超声换能器下方,并且在一些实施方案中可以被配置为控制超声换能器的运行。
以下进一步对上述方面和实施方案,以及另外的方面和实施方案进行描述。这些方面和/或实施方案可以被单独使用、所有一起使用或者以两个或更多个的任意组合来使用,因为本申请在此方面不受限。
根据本技术的一个方面,CMOS晶片包括形成在其中的一个或更多个超声换能器,对于CMOS晶片,CMOS晶片的部分或完全去除的金属化层至少部分地限定了超声换能器的腔。图1示出了这种装置的非限制性实例。
如所示,装置100包括CMOS晶片102,其中在CMOS晶片102中形成有超声换能器104。示出了单个超声换能器104,但是应当理解,本申请的各方面提供了在CMOS晶片中的多个超声换能器,因此,图1是非限制性说明。这样的构造可以有助于形成包括集成的超声换能器和电路 (例如,如用以形成和/或显示超声图像的模拟和/或数字电路,诸如用于控制超声换能器的运行和/或处理由这种换能器产生的信号的前端电路和/ 或后端电路)的芯片上超声系统装置或芯片上超声子系统装置。在至少一些实施方案中,芯片上超声系统装置可以包括在单个衬底上与模拟和数字电路集成的超声换能器的布置,并且能够执行超声成像功能,诸如传输和接收超声波并且处理所接收的超声波以产生超声图像。
CMOS晶片102包括多晶硅层105、多个金属化层106a-106d和至少部分地限定超声换能器104的声腔108的去除的金属化层。超声换能器 104的膜110由CMOS晶片102的保留在腔108上方的层的组合形成。集成电路112可以形成在基础层114中在超声换能器104下方。集成电路可以是CMOS电路,并且可以与超声换能器104集成以形成CUT。在所示的非限制性实例中,集成电路在超声换能器104正下方。多晶硅层105 可以形成集成电路的一部分,例如表示用于晶体管的栅极层。在一些非限制性实施方案中,高电压布线可以设置在腔上方,但是所有电路可以位于超声换能器下方。
CMOS晶片102可以是用于形成CMOS集成电路并且包括一个或更多个金属化层的任意合适的CMOS晶片。在所示的实例中,CMOS晶片 102包括五个金属化层(金属化层106a-106d加上表示腔108的去除的金属化层),但是可以可替选地使用其他数目。
金属化层106a-106d以及用于形成腔108的去除的金属化层可以被配置为用于信号通路的标准CMOS金属化层。因此,在至少一些实施方案中,它们可以是基本上平面的,并且可以占据CMOS晶片内用于起信号通路层作用的平面的适当部分。例如,在一些实施方案中,在图案化以限定期望的信号通路配置之前,一个或更多个金属化层可以基本上占据CMOS晶片内的整个平面。此外,金属化层可以由任意合适的材料形成。例如,可以使用铝(Al)、铜(Cu)或其他金属。
在一些实施方案中(包括所示出的实施方案),一个或更多个金属化层可以包括多个层(即,多层构造),诸如具有下衬层和上衬层(或阻挡层)的内金属层。在图1的实例中,所示的金属化层中的每一个包括底衬层(例如,氮化钛(TiN))、Al层、顶衬层(例如,TiN)和在顶衬层之上的以在光刻步骤期间用作减反射涂层的氮氧化硅的层。对于待牺牲去除的金属化的多层结构可以是有益的,因为衬层可以被配置并且保留为超声换能器的电极。以这种方式,当最初形成待牺牲去除的金属化层时,简单且稳健地形成超声换能器的电极。可以通过仅去除金属化的内金属层而留下衬层,从而形成腔108。这种选择性去除可以使用诸如选择性湿法蚀刻的适当的选择性蚀刻工艺来实现,选择性湿法蚀刻对金属化的内部金属材料是选择性的(即蚀刻),并且对于衬层的材料是非选择性的(即不蚀刻)。以这种方式,腔的制造也被简化,因为不需要定时蚀刻来获得期望的腔尺寸。在一些实施方案中,蚀刻可以是氢氟酸(HF)蚀刻,尽管替代方案也是可能的。
例如,参照装置100,腔108在底部由层118限定,并且在顶部由层 120和122限定。层118可以表示金属化层的被去除以限定腔108的底衬层(例如,TiN的底衬层)。层120可以表示去除的金属化层的顶衬层(例如,TiN的顶衬层)。层122可以表示去除的金属化层的减反射涂层。层 118和120可以被配置为超声换能器104的电极。可以通过诸如通路124 和126的一个或更多个导电线(例如,通路)或以任意其他合适的方式制成至电极的电连接(例如通过CMOS晶片的一个或更多个剩余的金属化层)。
在一些实施方案中,当去除内部金属材料时,多层金属化层可以配置有绝缘膜。例如,金属化层可以依次包括TiN-氧化铝-Al-氧化铝 -TiN-SiON,使得当去除铝时,在TiN电极上方形成绝缘膜。
在至少一些实施方案中,被至少部分地去除以形成超声换能器的腔的金属化层实际上没有被完全去除。在这个意义上,去除可以是局部的,而不是全局的。在CMOS晶片的除了形成声腔的区域以外的区域中金属化层的部分可以被保留以用作信号线,例如以承载可应用于装置100的各种类型的信号,作为非限制性实例诸如功率、控制信号或感测信号。也就是说,相同的CMOS金属化层可在CMOS晶片的一个或更多个区域中用作信号线,并且在CMOS晶片的其他区域中可被去除以限定一个或更多个超声换能器的声腔。这种双重功能区别于在CMOS晶片上沉积金属仅仅是为了使用金属作为牺牲层的目的。
图1还示出了CMOS晶片102包括在金属化层之间的合适的介电或绝缘层(例如层107)。这些可以由任意合适的材料(例如,非导电性材料,例如SiO2)形成并且具有任意合适的厚度。
还包括密封的进入孔116。可以通过适当的蚀刻(例如定向蚀刻,诸如反应性离子蚀刻)来形成一个或更多个进入孔以进入被去除以形成腔 108的金属化层。金属化层的金属材料可以例如通过选择性湿蚀刻(例如,通过HF蚀刻)通过一个或更多个进入孔被去除。随后,进入孔可以被密封以产生密封腔,如所示,在一些实施方案中密封腔可以是真空腔,但是也可以形成非真空腔。可以使用任意合适的密封剂材料,其非限制性实例是Si3N4。
图1示出了用于腔108的两个进入孔。然而,应当理解,可以使用其他数目(任一个或更多个)。进入孔可以定位在相对于腔的任意合适的位置处(例如,如所示的外围、中心、既在外围又在中心处等),以允许充分地去除金属化层的金属材料以产生腔。另外,孔可以任选地被蚀刻,然后任选地填充在腔的边界周围以在换能器或换能器组之间提供隔离(例如,声隔离)。在这样的实施方案中,孔可以不穿过膜110,但可以任选地延伸到腔108。
在一些实施方案中,多个进入孔可以适当地定位成允许去除金属化层的金属材料,同时还适当地布置成允许金属信号连接成横跨芯片(例如,在相邻的超声换能器之间)。作为具体但非限制性实例,多个进入孔可以布置在腔的外围,但是在进入孔的至少两个进入孔之间可以有足够的空间,以允许金属信号线将相邻超声换能器的金属化层106d互连。考虑到这种构造的顶视图,腔可以具有圆形形状,并且多个进入孔可以围绕圆形的圆周形成,其中,金属信号线在一些进入孔之间延伸。替选方案是可以的。例如,所描述的圆形腔形状可以可替选地是矩形、正方形、六边形或具有任意其他合适的形状。
超声换能器104可以具有任意合适的尺寸。尺寸可以至少部分地由换能器的预期应用来规定,例如以提供期望的频率特性、期望的装置尺寸、期望的成像孔径或其他感兴趣的特征。以下提供了非限制性实例。
在一些实施方案中,腔尺寸和/或覆在腔之上的任意膜的膜厚度可以影响膜的频率特性,因而可对其进行选择来提供期望的频率性能(例如,期望的膜的共振频率)。例如,在一些实施方案中可以期望具有如下中心共振频率的超声换能器:约20kHz至约200MHz之间,约1MHz至约 40MHz之间,约1MHz至约10MHz之间,约2MHz至约5MHz之间,约5MHz至约15MHz之间,约10MHz至约20MHz之间,约20MHz 至约40MHz之间,约50kHz至约200kHz之间,约2.5MHz,约4MHz,上述范围之间的任意频率或频率范围,或者任意其他合适的频率。例如,可以期望在空气,气体,水或其他环境中使用该装置,例如用于医学成像、材料分析,或者用于可能期望各种工作频率的其他原因。可以相应地选择腔和/或膜的尺寸。
作为非限制性实例,腔108的宽度W1可以在约5微米至约500微米之间,约20微米至约100微米之间,可以为约30微米、约40微米、约 50微米、上述范围之间的任意宽度或宽度范围,或任意其他合适的宽度。在一些实施方案中,可以选择宽度以使空隙比(即被腔占据的面积的量相对于被周围结构占据的面积的量)最大。还可以利用宽度尺寸来限定腔的孔径尺寸,并且从而腔的孔径可以为上述任意值或任意其他合适的值。
腔108可以具有深度D1,深度D1可以在约0.05微米至约10微米之间,约0.1微米至约5微米之间,约0.5微米至约1.5微米之间,上述范围之间的任意深度或深度范围,或任意其他合适的深度。如前所述,申请人已经认识到,在标准CMOS晶片中使用的一些金属化层的厚度可以与声腔的目标深度基本对应,因而腔108的深度可以至少部分地由用作牺牲层的金属化层的厚度来限定。例如,在一个实施方案中,深度D1可以为约1/4微米,其可以与在CMOS晶片上提供的金属化厚度基本上对应。
膜110可以包括CMOS晶片102的限定厚度Tm的一个或更多个层和/或结构。在图1的非限制性实例中,膜110包括通路(例如,通路126)、金属层(例如,金属化层106d)和介电或绝缘层(例如,层107)。钝化层128(例如,由Si3N4形成)使表面钝化。厚度Tm(例如,如沿着与深度D1基本平行的方向测量的)可以小于100微米,小于50微米,小于 40微米,小于30微米,小于20微米,小于10微米,小于5微米,小于 1微米,小于0.1微米,上述范围之间的任意厚度范围(例如,大约在1 至5微米之间,大约在1至2微米之间等)或任意其他合适的厚度。在一些实施方案中,可以基于膜的期望的声学特性(诸如膜的期望的共振频率) 来选择厚度。此外,申请人已经认识到,对于一些标准CMOS晶片,使用在顶金属化层下方的金属化层作为用于限定超声换能器腔的牺牲层导致上覆膜110具有大约(并且在一些情况下基本上是)超声换能器的目标厚度(例如,大约在1-2微米之间)的厚度。因此,使用顶金属化层下方的金属化层作为牺牲层可以显著简化在CMOS晶片中制造超声换能器。
可以通过从膜的上表面添加/去除材料来调节厚度Tm。可以使用化学机械抛光(CMP),任意形式的蚀刻(包括选择性蚀刻、定向蚀刻、湿蚀刻或激光蚀刻)或任意其他合适的技术来实现这种材料的去除。另外,在一些实施方案中,膜可以具有非均匀的厚度,例如在腔上方的中心部分较厚,在腔的外围上方较薄,以形成活塞结构。这种结构可以提供对超声换能器的工作频率的控制。
作为腔深度和宽度以及膜厚度的合适尺寸的非限制性实例,在一个实施方案中,深度D1可以为约1/4微米,宽度W1可以为约50微米,并且膜110的厚度Tm可以为约1-2微米。替选方案是可能的。
可以在CMOS晶片102的基础层114中形成集成电路112。例如,基础层114可以是体硅层或其他半导体衬底,并且集成电路112可以包括一个或更多个有源硅电路元件(例如,具有在硅中掺杂的源极区和漏极区的MOS晶体管)、电容器、电阻器或其他电路部件。集成电路112可以适合于以传输和/或接收模式操作超声换能器104。
如所示,超声换能器104可以连接到IC 112,例如通过所示的层118 到通路124的连接。其他制造连接方式是可能的。
根据本技术的一个方面,提供了一种在CMOS晶片中制造超声换能器的方法,该方法涉及去除CMOS晶片的金属化层的至少一部分以产生超声换能器的腔。图2是示出该方法的一个实例的流程图。
方法200包括在步骤202处制备CMOS晶片。CMOS晶片包括部分地限定超声换能器的结构和至少一个金属化层。例如,可以形成电极和声学振动膜,诸如通过由金属化衬层限定的电极和由图1的声学振动膜110 表示的类型的声学振动膜。
在步骤204处,形成通往CMOS晶片的金属化层的一个或更多个进入孔。如前面结合图1所描述的,可以以任意合适的方式(例如,定向蚀刻)产生进入孔,并且可以使其定位在相对于超声换能器任意合适的位置,包括在将成为超声换能器的腔的区域的外围和/或中心。
在步骤206处,可以利用合适的蚀刻技术通过去除金属化层的至少一部分来产生在CMOS晶片中的超声换能器的腔。例如,可以使用对待去除的金属化层的材料(例如,金属)具有选择性的选择性蚀刻。在一些实施方案中,去除可以是局部的,但不是全局的。也就是说,可以去除CMOS 晶片中的超声换能器所设置的区域中的金属化层,但是可以保留在CMOS晶片的其他区域中的金属化层,例如作为信号线。
在步骤208处,可以密封在步骤204中形成的进入孔,以产生密封的超声换能器腔。可以使用任意合适的材料例如绝缘材料以任意合适的方式密封进入孔。在一些实施方案中,可以执行等离子体增强化学气相沉积(PECVD)来密封进入孔。例如,在一些实施方案中可以使用PECVD Si3N4,其可以使横向侵入到腔中的密封材料最小化。
方法200可以在晶片级执行,如通过参照贯穿图2的CMOS晶片应当理解的。因此,在CMOS晶片中可以以阵列或其他布置形成多个超声换能器。这种制造技术的一个益处是可以在单个晶片上以相对简单、成本有效的方式形成大量超声换能器(例如,CMUT)。因此,这样的技术可以便于利用微加工超声换能器的阵列(或其他布置)来制造芯片上超声系统装置。
应当理解,在一些实施方案中,方法200的步骤可以由不同方执行。例如,在制造CMOS晶片的业务中的一方可以执行步骤202。然后第二方(例如,CMOS晶片的购买者)可以执行步骤204、206和208。在其他实施方案中,单一实体可以执行该方法的所有步骤。
图3A至图3J示出了根据本申请的非限制性实施方案的与图2的工艺一致的在CMOS晶片中制造CMUT的制造工序。该工序的起始点示于图3A中,并且包括基础层114、图案化的多晶硅层105、金属化层106a 和金属化层106b以及层107。
如图3B至图3D所示,可以形成图1的通路124(以下在图3D中完全示出)。考虑到形成通路,如图3B所示,可以适当地蚀刻最上层107 并且可以沉积导电层302。导电层302可以由期望的通路材料形成,例如钨(W)。内衬材料(例如,TiN)可以在钨之前沉积,因而导电层302 可以具有如图所示的多层构造。
如图3C所示,可以对导电层302进行平坦化(例如,使用CMP),然后可以形成金属化层106c并且对金属化层106c进行图案化。可以在表面上方形成介电或绝缘层304(例如,SiO2)。
如图3D所示,可以对介电层304进行图案化以使得能够形成通路 124。通路124可以由期望的通路材料(诸如钨(W))形成。内衬材料(例如,TiN)可以在钨之前沉积,从而产生所示的通路124的多层特征。
然后,在图3E中,形成金属化层306。金属化层306可以表示牺牲的金属化层,源自牺牲的金属化层的图1的腔108(并且也在图3I中示出)将形成。因此,包括前述的层118、120和122。介电或绝缘层(例如,SiO2)308可以形成在最上表面上。
在图3F中,可以对介电层308进行图案化,并且在预计形成图1的通路126(也在图3G中示出)中沉积导电层310。导电层310可以由期望的通路材料形成,例如钨(W)。内衬材料(例如,TiN)可以在钨之前沉积,因而导电层310可以具有如所示的多层构造。
如图3G所示,可以对导电层310进行平坦化以形成通路126,并且可以形成金属化层106d并且对金属化层106d进行图案化。可以在结构的最上表面上形成介电或绝缘层312。
在图3H中,可以形成(例如,Si3N4的)钝化层313,并且可以形成通往金属化层306的进入孔314。可以使用合适的蚀刻工艺来形成进入孔。
然后,如图3I所示,可以经由进入孔314通过去除金属化层306的至少一部分来产生腔108。例如,金属化层可以包括内金属层,该内金属层被选择性地蚀刻(例如通过湿蚀刻,诸如HF蚀刻),留下层118和120。
在图3J中,可以利用合适的密封剂层316密封进入孔314。密封剂层可以包括钝化材料,例如Si3N4。其他材料也是可以的。因此,可以通过该制造工序来实现图1的装置100。
尽管图3A至图3J示出了适合与铝金属化层一起使用的制造工序,但是应当理解,本文所述的各个方面在这方面不受限制。例如,本技术的各方面可以使用铜金属化层代替铝。在一些实施方案中,可以使用衬有钽的铜。
另外,尽管本申请的方面已经被描述为利用CMOS晶片的多层金属化层来限定超声换能器的腔,但是替选方案可以替选地使用金属-绝缘体- 金属(MIM)层。例如,可以以本文所述的关于去除金属化层的内部金属材料的方式从相邻金属层之间去除MIM层的绝缘体。
此外,根据一些实施方案,可以形成没有被配置为与换能器的腔相邻的电极的金属衬层的超声换能器。例如,参照图1,在可替选实施方案中,可以省略层118和120(以及另外122),而是可以适当地设置通路126以组合地作为电极。例如,通路126可以相对于彼此间隔约0.1微米至约0.5 微米(例如,约0.2微米至约0.3微米)。这种通路的阵列可以组合地作为用于控制超声换能器的运行的电极。在这样的实施方案中,通路可以具有任意合适的尺寸,其非限制性实例的截面为约0.2微米×0.2微米,截面为约0.3微米×0.3微米或任意其他合适的尺寸。
本申请的方面可以用于构建超声装置,例如超声探头。探头可以适于对各种物体成像。根据一些实施方案的超声探头可以包括各种前端和/或后端电子器件。在一些实施方案中,探头可以是芯片上超声系统装置。
本申请的方面可以提供一个或更多个益处,先前已经描述了其中的一些。现在描述的是这样的益处的一些非限制性实例。应该理解的是,不是所有的方面和实施方案必须提供现在描述的所有益处。此外,应该理解的是,本申请的方面可以向现在描述的那些提供附加的益处。
本申请的方面提供适合于形成单片集成的超声换能器和CMOS结构 (例如,CMOSIC)的制造工艺。至少在一些实施方案中,该工艺可以简单、稳健、相对廉价地执行,并且可扩展至大量的超声换能器。可以避免与晶片接合相关的困难,例如不良的接合强度、低产率和使用高温退火。本申请的各方面提供用于制造用于与低电压CMOS IC结合工作的合适尺寸的超声换能器的工艺。还可以根据本申请的一个或更多个方面提供其他益处。
因此已经这样描述了本申请的技术的几个方面和实施方案,应该理解的是,本领域的普通技术人员将容易地做出各种变化方案、更改方案和改善方案。这样的变化方案、更改方案和改善方案旨在包含在本申请所描述的技术的精神和范围内。例如,本领域的普通技术人员将容易地预见各种用于执行所述功能和/或获得所述结果和/或本文所描述的一个或更多个优点的其他的方法和/或结构,并且这样的变化方案和/或更改方案中的每一个被认为在本文所描述的实施方案的范围内。本领域的技术人员将意识到或者仅仅利用常规的实验方法能够断定,与本文所描述的特定实施方案等同的许多实施方案。因此,应该理解的是,仅通过示例的方式呈现了前述实施方案,并且这些实施方案在所附权利要求及其等同物的范围内,可以实践除了具体描述之外的发明性的实施方案。另外,如果本文所描述的特征、系统、制品、材料、工具和/或方法不是互相抵触的,那么本文所述的这样的特征、系统、制品、材料、工具和/或方法的两种或更多种的任意组合在本公开内容的范围内。
此外,如所描述的,一些方面可以以一种或更多种方法实现。作为所述方法的一部分被执行的动作可以以任意合适的方式来安排。因此,实施方案可以被构建为其中动作被以与所示出的顺序不同的顺序执行,这可以包括同时执行相同的动作,尽管在所示出的实施方案中被示出为按顺序的动作。
如本文所限定和使用的所有定义应该被理解为控制词典定义、通过引用并入文件中的定义和/或所限定的术语的一般意义。
如本文中所使用的在说明书和权利要求书中的单数形式,除非清楚地被指定为相反的含义,否则应该被理解为意指“至少一个”。
如本文中所使用的在说明书和权利要求书中的短语“和/或”应该被理解为意指如此结合的元件(即,在一些情况下连接呈现的或者在其他情况下分离呈现的元件)中的“任意一个或两者”。用“和/或”列出的多个元件应该被理解为具有相同的方式,即,如此连接的“一个或更多个”元件。除了那些被通过“和/或”从句具体限定的那些元件之外的元件可以任选择地被呈现,或者与具体限定的那些元件相关或者与具体限定的那些元件不相关。因而,作为非限制性实例,当在用开放式的语言例如“包括”使用时,引用“A和/或B”在一种实施方案中可以仅指A(可选择地包括除了B之外的元件),在另一种实施方案中可以仅指B(可选择地包括除了A之外的元件),在又另一实施方案中可以指A和B两者(可选择地包括其他元件)等。
如本文中所使用的在说明书和权利要求书中,关于一组一个或更多个元件的短语“至少一个”应该被理解为意指选择所列元件中的任意一个或者更多个的至少一个元件,但是不必包括在所列元件内具体列出的每个元件中的至少一个并且不排除所列元件中元件的任意组合。这一规定还允许可以任选地呈现除了在短语“至少一个”所指的那些所列元件内具体限定的元件之外的元件,不管是否与具体限定的那些元件相关或者不相关。因而,作为非限制性实例,“A和B中至少之一”(或者等同于“A或B中至少之一”或者等同于“A和/或B中至少之一”)可以,在一种实施方案中指至少一个,可选地包括不止一个,A,不存在B(并且可选地包括除了B 的元件);在另一实施方案中,指至少一个,可选地包括不止一个,B,不存在A(并且可选地包括除了A的元件);在又另一实施方案中,指至少一个,可选地包括不止一个A,以及至少一个,可选择地包括不止一个 B(并且可选择地包括其他元件)等。
此外,本文所使用的表述和术语是为了描述的目的并且不应该被认为是限制性的。在本文中“包括”、“包含”或“具有”、“含有”、“涉及”及其变化形式的使用意在包括此后所列出的项目和其等同物以及附加项目。
在权利要求书以及上述说明书中,所有的惯用表述例如“包括”、“包含”、“承载”、“具有”、“含有”、“涉及”、“拥有”、“由……构成”等应该被理解为是开放的,即,意指包括但不限于。只有惯用表述“由……组成”和“基本由……组成”应该分别是封闭或者半封闭的惯用表述。
Claims (17)
1.一种互补金属氧化物半导体(CMOS)晶片,包括:
半导体衬底;
超声换能器,其包括:
腔,其通过部分去除所述互补金属氧化物半导体(CMOS)晶片的第一金属化层而产生;
设置在所述腔与所述半导体衬底之间的电极;以及
声学振动膜,其包括所述互补金属氧化物半导体(CMOS)晶片的第二金属化层和介电层,所述腔设置在所述半导体衬底与所述声学振动膜之间;以及
在所述半导体衬底中的集成电路,所述集成电路耦接至所述超声换能器并且被配置为控制所述超声换能器的运行;
其中,设置在所述腔与所述半导体衬底之间的所述电极是所述超声换能器的第一电极,其中,所述超声换能器还包括设置成与所述第一电极相对的第二电极,所述第二电极设置在所述腔和所述第二金属化层之间的声学振动膜中。
2.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,其中,设置在所述腔与所述半导体衬底之间的所述电极包括被部分去除的第一金属化层的衬层。
3.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,其中,所述声学振动膜包括一个或更多个导电通路。
4.根据权利要求3所述的互补金属氧化物半导体(CMOS)晶片,其中,所述声学振动膜的所述一个或更多个导电通路中的至少之一电连接到所述第二电极。
5.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,还包括穿过所述声学振动膜的至少一部分到达所述腔的至少一个填充的进入孔。
6.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,包括包含所述超声换能器的多个超声换能器。
7.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,其中,所述第二金属化层埋置在所述声学振动膜的所述介电层内。
8.根据权利要求1所述的互补金属氧化物半导体(CMOS)晶片,还包括被定位成不穿过所述声学振动膜的至少一个孔。
9.一种互补金属氧化物半导体(CMOS)晶片,包括:
半导体衬底;
超声换能器,其包括:
腔,其通过部分去除所述互补金属氧化物半导体(CMOS)晶片的第一金属化层而产生;
设置在所述腔与所述半导体衬底之间的电极;以及
声学振动膜,其包括所述互补金属氧化物半导体(CMOS)晶片的第二金属化层和介电层,所述腔设置在所述半导体衬底与所述声学振动膜之间;以及
在所述半导体衬底中的集成电路,所述集成电路耦接至所述超声换能器并且被配置为控制所述超声换能器的运行;
其中,设置在所述腔与所述半导体衬底之间的所述电极是所述超声换能器的底电极,其中,所述超声换能器还包括设置在位于所述腔与所述第二金属化层之间的所述声学振动膜中的顶电极,所述腔设置在所述底电极与所述顶电极之间,其中,所述底电极和所述顶电极包括被部分去除的第一金属化层的衬层。
10.一种互补金属氧化物半导体(CMOS)晶片,包括:
半导体衬底;
第一金属化层;以及
超声换能器,其包括:
形成在所述第一金属化层中的腔;
设置在所述腔与所述半导体衬底之间的第一电极,所述第一电极包括所述第一金属化层的第一部分;以及
声学振动膜,其包括介电层、第二电极和第二金属化层,所述腔设置在所述半导体衬底与所述声学振动膜之间,所述第二电极包括所述第一金属化层的第二部分,并且布置在所述腔与所述第二金属化层之间;以及
在所述半导体衬底中的集成电路,所述集成电路耦接至所述超声换能器并且被配置为控制所述超声换能器的运行。
11.根据权利要求10所述的互补金属氧化物半导体(CMOS)晶片,其中,所述第一金属化层被配置为在所述衬底的外围区域中传输电信号。
12.根据权利要求10所述的互补金属氧化物半导体(CMOS)晶片,其中,所述第一金属化层具有形成在其中的多个腔,其中,每个腔对应于不同的超声换能器。
13.一种互补金属氧化物半导体(CMOS)晶片的制备方法,包括:
通过堆叠互补金属氧化物半导体(CMOS)晶片的多个层来在所述互补金属氧化物半导体(CMOS)晶片中形成超声换能器的声学振动膜,所述互补金属氧化物半导体(CMOS)晶片的多个层包括所述互补金属氧化物半导体(CMOS)晶片的至少一个介电层和第一金属化层;
形成通往所述互补金属氧化物半导体(CMOS)晶片的第二金属化层的至少一个进入孔,所述第二金属化层包括由第一导电衬层和第二导电衬层界定的内金属层;
通过利用选择性蚀刻经由所述至少一个进入孔去除所述第二金属化层的所述内金属层的至少一部分来在所述互补金属氧化物半导体(CMOS)晶片中形成腔,从而释放所述声学振动膜,同时基本上保留所述第一导电衬层和所述第二导电衬层;
利用绝缘材料密封所述至少一个进入孔;以及
将所述第一导电衬层和所述第二导电衬层耦接至所述互补金属氧化物半导体(CMOS)晶片的集成电路。
14.根据权利要求13所述的方法,其中,形成所述声学振动膜还包括利用一个或更多个导电通路将所述互补金属氧化物半导体(CMOS)晶片的所述第一金属化层耦接至所述第二金属化层的所述第一导电衬层。
15.根据权利要求13所述的方法,其中,将所述第一导电衬层和所述第二导电衬层耦接至所述互补金属氧化物半导体(CMOS)晶片的集成电路包括通过一个或更多个导电通路将所述第一导电衬层耦接至所述互补金属氧化物半导体(CMOS)晶片的半导体衬底中的集成电路。
16.根据权利要求13所述的方法,其中,所述内金属层包含铝,其中,使用选择性蚀刻包括使用氢氟酸蚀刻。
17.根据权利要求16所述的方法,其中,所述第一导电衬层和所述第二导电衬层包含氮化钛(TiN)。
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JP2017516428A (ja) | 2017-06-15 |
US9899371B2 (en) | 2018-02-20 |
JP6636502B2 (ja) | 2020-01-29 |
CN106659464A (zh) | 2017-05-10 |
WO2015161147A1 (en) | 2015-10-22 |
CA2946133A1 (en) | 2015-10-22 |
TWI661534B (zh) | 2019-06-01 |
TW201921646A (zh) | 2019-06-01 |
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US20150298170A1 (en) | 2015-10-22 |
US10177139B2 (en) | 2019-01-08 |
AU2015247484B2 (en) | 2020-05-14 |
TW201543649A (zh) | 2015-11-16 |
KR20160143844A (ko) | 2016-12-14 |
EP3132470A1 (en) | 2017-02-22 |
US10707201B2 (en) | 2020-07-07 |
US20160379973A1 (en) | 2016-12-29 |
AU2015247484A1 (en) | 2016-11-10 |
KR102237662B1 (ko) | 2021-04-09 |
US20180130795A1 (en) | 2018-05-10 |
EP3132470B1 (en) | 2019-02-06 |
US9505030B2 (en) | 2016-11-29 |
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