CN103517548B - 布线基板及其制造方法 - Google Patents

布线基板及其制造方法 Download PDF

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Publication number
CN103517548B
CN103517548B CN201310232621.8A CN201310232621A CN103517548B CN 103517548 B CN103517548 B CN 103517548B CN 201310232621 A CN201310232621 A CN 201310232621A CN 103517548 B CN103517548 B CN 103517548B
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China
Prior art keywords
layer
wiring
core substrate
resin
wiring layer
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CN201310232621.8A
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English (en)
Chinese (zh)
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CN103517548A (zh
Inventor
本藤吉昭
竹内浩文
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Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication of CN103517548A publication Critical patent/CN103517548A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/652—Cross-sectional shapes
    • H10W70/6525—Cross-sectional shapes for securing the interconnections to the substrate, e.g. to prevent peeling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/695—Organic materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275—Fibers and reinforcement materials
    • H05K2201/029—Woven fibrous reinforcement or textile
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/601—Capacitive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Structure Of Printed Boards (AREA)
CN201310232621.8A 2012-06-15 2013-06-13 布线基板及其制造方法 Active CN103517548B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-135592 2012-06-15
JP2012135592A JP6208411B2 (ja) 2012-06-15 2012-06-15 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
CN103517548A CN103517548A (zh) 2014-01-15
CN103517548B true CN103517548B (zh) 2018-03-06

Family

ID=49755160

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310232621.8A Active CN103517548B (zh) 2012-06-15 2013-06-13 布线基板及其制造方法

Country Status (5)

Country Link
US (1) US9252096B2 (https=)
JP (1) JP6208411B2 (https=)
KR (1) KR102049327B1 (https=)
CN (1) CN103517548B (https=)
TW (1) TWI587764B (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015065322A (ja) * 2013-09-25 2015-04-09 日東電工株式会社 半導体装置の製造方法
JP6075789B2 (ja) * 2014-01-31 2017-02-08 京セラ株式会社 配線基板の製造方法
CN105307386B (zh) * 2015-09-15 2018-07-06 三星半导体(中国)研究开发有限公司 印刷电路板以及包括其的半导体封装件
US10643936B2 (en) * 2017-05-31 2020-05-05 Dyi-chung Hu Package substrate and package structure
KR102679997B1 (ko) * 2018-12-17 2024-07-02 삼성전기주식회사 인쇄회로기판
JP7207192B2 (ja) * 2019-06-19 2023-01-18 Tdk株式会社 センサー用パッケージ基板及びこれを備えるセンサーモジュール、並びに、センサー用パッケージ基板の製造方法
JP7364383B2 (ja) * 2019-07-19 2023-10-18 株式会社 大昌電子 プリント配線板の製造方法
US11439022B2 (en) 2019-09-02 2022-09-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board
CN111366839B (zh) * 2020-03-28 2022-04-12 深圳中科系统集成技术有限公司 一种晶圆测试用探针转接板及其制作方法
TWI751554B (zh) * 2020-05-12 2022-01-01 台灣愛司帝科技股份有限公司 影像顯示器及其拼接式電路承載與控制模組
KR102909754B1 (ko) * 2020-06-12 2026-01-09 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
TWI831318B (zh) * 2021-08-06 2024-02-01 美商愛玻索立克公司 電子器件封裝用基板、其製造方法及包括其的電子器件封裝

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1117345A (ja) * 1997-06-19 1999-01-22 Ibiden Co Ltd 多層プリント配線板
JP3373406B2 (ja) * 1997-10-14 2003-02-04 イビデン株式会社 プリント配線板およびその製造方法
WO2003072851A1 (en) * 2002-02-28 2003-09-04 Zeon Corporation Partial plating method, partially-plated resin base, method for manufacturing multilayer circuit board
JP4488684B2 (ja) * 2002-08-09 2010-06-23 イビデン株式会社 多層プリント配線板
KR101131759B1 (ko) * 2003-04-07 2012-04-06 이비덴 가부시키가이샤 다층프린트배선판
JP2006086233A (ja) * 2004-09-14 2006-03-30 Sumitomo Bakelite Co Ltd 多層配線板およびその製造方法
JP2007150221A (ja) * 2005-10-27 2007-06-14 Fujitsu Ltd 多層回路基板およびその製造方法
JP2008085111A (ja) * 2006-09-28 2008-04-10 Matsushita Electric Ind Co Ltd 配線基板とその製造方法
JP5042762B2 (ja) * 2007-09-27 2012-10-03 株式会社テラミクロス 半導体装置
JP5094323B2 (ja) * 2007-10-15 2012-12-12 新光電気工業株式会社 配線基板の製造方法
JP2010010329A (ja) 2008-06-26 2010-01-14 Kyocer Slc Technologies Corp 配線基板およびその製造方法
JP4844904B2 (ja) 2009-03-27 2011-12-28 Ｔｄｋ株式会社 多層配線板及びその製造方法
US8161637B2 (en) * 2009-07-24 2012-04-24 Ibiden Co., Ltd. Manufacturing method for printed wiring board
TWI471073B (zh) * 2009-12-31 2015-01-21 Unimicron Technology Corp 線路基板及其製作方法
JP5341796B2 (ja) 2010-02-26 2013-11-13 京セラＳｌｃテクノロジー株式会社 配線基板の製造方法
JP6109569B2 (ja) * 2010-05-07 2017-04-05 住友ベークライト株式会社 回路基板用エポキシ樹脂組成物、プリプレグ、積層板、樹脂シート、プリント配線板用積層基材、プリント配線板、及び半導体装置
JP2012069926A (ja) * 2010-08-21 2012-04-05 Ibiden Co Ltd プリント配線板及びプリント配線板の製造方法

Also Published As

Publication number Publication date
JP6208411B2 (ja) 2017-10-04
TW201406240A (zh) 2014-02-01
KR102049327B1 (ko) 2019-11-28
US20130334703A1 (en) 2013-12-19
JP2014003054A (ja) 2014-01-09
US9252096B2 (en) 2016-02-02
KR20130141372A (ko) 2013-12-26
CN103517548A (zh) 2014-01-15
TWI587764B (zh) 2017-06-11

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