CN103219293B - 在封装工艺中切割底部填充物 - Google Patents

在封装工艺中切割底部填充物 Download PDF

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Publication number
CN103219293B
CN103219293B CN201210193236.2A CN201210193236A CN103219293B CN 103219293 B CN103219293 B CN 103219293B CN 201210193236 A CN201210193236 A CN 201210193236A CN 103219293 B CN103219293 B CN 103219293B
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Prior art keywords
potted element
polymer
tube core
potted
face
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CN103219293A (zh
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卢思维
王英达
郭立中
林俊成
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种方法包括：在第三封装元件的顶面上接合第一封装元件和第二封装元件；及分配聚合物。该聚合物包括：位于第一封装元件和第三封装元件之间的间隔中的第一部分；位于第二封装元件和第三封装元件之间的间隔内的第二部分；及位于第一封装元件和第二封装元件之间的间隔内的第三部分。然后对聚合物实施固化工艺。在固化工艺之后，切割聚合物的第三部分以在第一封装元件和第二封装元件之间形成沟槽。本发明还提供了在封装工艺中切割底部填充物。

Description

在封装工艺中切割底部填充物
技术领域
本发明涉及集成电路的封装方法，具体而言，涉及一种在封装工艺中切割的方法。
背景技术
在集成电路的封装中，可以将多个管芯接合在中介层晶圆上，其包括在其中的多个中介层。在接合管芯之后，可以将底部填充物分配到管芯和中介层晶圆之间的间隔内。然后可以实施固化工艺使底部填充物固化。
可以发现固化后的底部填充物可以收缩。结果是，固化的底部填充物对管芯和中介层晶圆实施压力，并因此可以引起中介层晶圆翘曲。中介层晶圆翘曲进一步导致在随后的工艺中的工艺困难。例如，在随后工艺(例如，模塑、研磨、薄膜等等)中，中介层晶圆需要通过真空固定在工作盘上。然而，因为中介层晶圆具有翘曲，中介层晶圆可能不能固定在工作盘上。
发明内容
为了解决现有技术中存在的问题，根据本发明的一个方面，提供了一种方法，包括：在第三封装元件的顶面上接合第一封装元件和第二封装元件；分配第一聚合物，其中，所述第一聚合物包括：第一部分，位于所述第一封装元件和所述第三封装元件之间的间隔中；第二部分，位于所述第二封装元件和所述第三封装元件之间的间隔中；以及第三部分，位于所述第一封装元件和所述第二封装元件之间的间隔中；对所述第一聚合物实施固化；以及在所述固化之后，切割所述第一聚合物的所述第三部分以在所述第一封装元件和所述第二封装元件之间形成沟槽，其中一次实施所述切割工艺。
在上述方法中，其中，所述固化是部分固化，并且其中，所述方法还包括，在切割所述第一聚合物的所述第三部分的步骤之后，实施热步骤以完全固化所述第一聚合物。
在上述方法中，其中，在固化步骤之后，所述第一聚合物完全固化。
在上述方法中，还包括：在切割步骤之后，用第二聚合物模塑所述第一封装元件，所述第二封装元件，以及所述第三封装元件，其中，填充所述第二聚合物至所述沟槽内。
在上述方法中，还包括：在切割步骤之后，用第二聚合物模塑所述第一封装元件，所述第二封装元件，以及所述第三封装元件，其中，填充所述第二聚合物至所述沟槽内，还包括：在用所述第二聚合物模塑的步骤之后，对所述第三封装元件实施管芯切割以将所述第三封装元件分成单个封装件。
在上述方法中，其中，所述沟槽具有与所述第一封装元件和所述第二封装元件的底面基本上相平或者低的底部，并且其中，所述沟槽的底部高于所述第三封装元件的顶面。
在上述方法中，其中，在切割所述第一聚合物的所述第三部分之后，所述第一聚合物的所述第三部分包括在所述沟槽的相对面上的剩余部分，并且其中，所述剩余部分与所述第一封装元件和所述第二封装元件的侧壁接触。
根据本发明的另一方面，还提供了一种方法，包括：在晶圆的多个管芯的每一个的顶面上接合第一管芯和第二管芯；将底部填充物分配至所述第一管芯和所述第二管芯与所述晶圆之间的空间内，其中，所述底部填充物包括设置在所述第一管芯和所述第二管芯之间的间隔内的一部分；实施固化步骤以固化所述底部填充物；在所述固化步骤之后，切割所述底部填充物的所述部分以形成沟槽；以及在切割步骤之后，实施热步骤以退火所述底部填充物。
在上述方法中，其中，在所述固化步骤之后，所述底部填充物部分固化。
在上述方法中，还包括：在所述第一管芯、所述第二管芯、及所述晶圆上方模塑模塑料，其中，所述模塑料填充至所述沟槽内；以及将所述晶圆及所述第一管芯和所述第二管芯切割成多个封装件，其中，每个所述多个封装件包括各自的第一管芯和各自的第二管芯。
在上述方法中，还包括：在所述第一管芯、所述第二管芯、及所述晶圆上方模塑模塑料，其中，所述模塑料填充至所述沟槽内；以及将所述晶圆及所述第一管芯和所述第二管芯切割成多个封装件，其中，每个所述多个封装件包括各自的第一管芯和各自的第二管芯，还包括：在模塑所述模塑料的步骤之后和在切割所述晶圆的步骤之前，在所述晶圆的背面上形成多个连接件。
在上述方法中，其中，所述晶圆包括：衬底；以及多个衬底通孔，位于所述衬底中，其中，将所述多个衬底通孔电连接至所述第一管芯和所述第二管芯。
在上述方法中，其中，在切割所述底部填充物的所述部分以形成所述沟槽的步骤中，不切割所述晶圆。
根据本发明的又一方面，还提供了一种器件，包括：第一封装元件；第二封装元件和第三封装元件，所述第二封装元件和所述第三封装元件接合至所述第一封装元件的顶面；第一聚合物区，包括接触所述第一封装元件的第一侧壁的第一部分，其中，所述第一部分位于所述第二封装元件和所述第三封装元件之间的间隔内；以及第二聚合物区，设置在所述间隔内，其中，所述第二聚合物接触所述第一聚合物的所述第一部分的侧壁以形成第一可见界面，并且其中，所述第一可见界面包括基本上垂直于所述第一封装元件的顶面的部分。
在上述器件中，其中，所述第一聚合物区还包括：第二部分，位于所述间隔内，其中，所述第二聚合物区设置在所述第一聚合物区的所述第一部分和所述第二部分之间，其中，所述第二聚合物区接触所述第一聚合物区的所述第二部分的侧壁以形成第二可见界面，并且其中，所述第二可见界面包括基本上垂直于所述第一封装元件的顶面的部分。
在上述器件中，其中，所述第一聚合物区和所述第二聚合物区包括不同的聚合物。
在上述器件中，其中，所述第一聚合物区和所述第二聚合物区包括不同的聚合物，其中，所述第一聚合物区包括底部填充物，并且所述第二聚合物区包括模塑料。
在上述器件中，其中，所述第二封装元件和所述第三封装元件包括器件管芯，并且其中，所述第一封装件包括：衬底；以及多个衬底通孔，位于所述衬底中，其中，将所述多个衬底通孔电连接至所述第二封装元件和所述第三封装元件。
在上述器件中，其中，所述第二聚合物区的底部与所述第二封装元件和所述第三封装元件的底面基本上齐平。
在上述器件中，其中，所述第二聚合物的底部低于所述第二封装元件和所述第三封装元件的底面，并且高于所述第一封装元件的顶面。
附图说明
为了更充分地理解实施例及其优点，现在将结合附图所进行的以下描述作为参考，其中：
图1至图7C包括根据各个示例性实施例制造封装件的中间阶段的剖视图和俯视图。
具体实施方式
在下文详细地论述本发明实施例的制造和使用。然而，应当理解，实施例提供了许多可以在各种具体环境中实现的可应用的发明概念。所论述的具体实施例仅仅是示例性的，而不是用于限制本发明的范围
根据各个实施例提供了一种封装集成电路的方法。示出了根据示例性实施例的形成三维集成电路(3DIC)封装件的中间阶段。论述了实施例的变化。在所有的各个视图和示例性实施例中，相同的参考标号用于表示相同的元件。
图1至图7C是根据一些示例性实施例封装集成电路的中间阶段的剖视图。图1示出了封装元件20的剖视图。封装元件20可以包括衬底22。在一些实施例中，衬底22是半导体衬底，其还可以是晶体硅衬底，然而衬底可以包括其他半导体材料，诸如硅锗、碳化硅等等。在可选的实施例中，衬底22是介电衬底。封装元件20可以是器件晶圆，其包括形成在半导体衬底22的表面22A上的有源器件，诸如晶体管(未示出)。当封装元件20是器件晶圆时，其也可以包括无源器件(未示出)，诸如电阻和/或电容器。在可选的实施例中，封装元件20是其中不含有有源器件的中介层晶圆。在该实施例中，封装元件20可以包括形成在其中的无源器件。可以形成自衬底22的顶面22A延伸至衬底22中的衬底通孔(TV)24。当在硅衬底中形成TV24时，TV24有时也被称为穿透硅通孔。封装元件20包括多个封装元件40，他们可以彼此相同。多个切割道42位于邻近的封装元件40之间。封装元件40可以是器件管芯(也被称为芯片)、中介层管芯等等。
在半导体衬底22上方形成互连结构28，并且互连结构28用于电连接至集成电路器件和/或TV24。互连结构28可以包括多个介电层30。金属线32形成在介电层30中。通孔34形成在上面的金属线32和下面的金属线32之间，并且互连上面的金属线32和下面的金属线32。金属线32和通孔34有时被称为再分布层(RDL)32/34。在一些实施例中，介电层30包括氧化硅、氮化硅、碳化硅、氧氮化硅、其组合物、和/或其多层。可选地，介电层30可以包括具有低k值的一个或多个介电层。例如，介电层30中的低k介电材料的k值可以低于约3.0，或者低于约2.5。
在封装元件20顶面上形成连接件38。在一些实施例中，连接件38包括金属柱，其中在金属柱的顶面上可以形成，或者可以不形成焊料盖顶。在可选的实施例中，连接件38包括焊料区。在又一些实施例中，连接件38可以是包含有铜柱、镍层、焊料盖顶、无电镀镍浸金(ENIG)、无电镀镍钯金(ENEPIG)等等的复合凸块。
参考图2，将封装元件44接合至封装元件40，例如，通过倒装芯片接合。因而连接件38将封装元件44中的电路连接至封装元件20中的RDL32/34和TV24。封装元件44可以是包括有逻辑电路、记忆电路等等的器件管芯。因此，封装元件44在下文中可选地被称为管芯44。可选地，封装元件44可以包括封装件，该封装件包括有接合至相应的中介层的管芯、封装基板等。可以在每个管芯40的上面接合两个或者两个以上的管芯44。
接下来，如图3中所示，将聚合物52分配到管芯44和封装元件20之间的空间(间隔)内。聚合物52可以是底部填充物，并因此在下文中被称为底部填充物52，然而其也包括其他聚合物(诸如环氧树脂)。底部填充物52也可以是模塑底部填充物。也将底部填充物52填充至被接合至同一封装元件40的相邻管芯44之间的间隔(图2中标记45)内。底部填充物52可以不被填充至间隔47内，间隔47位于被接合至不同封装元件40的相邻管芯44之间。可选地，可以将底部填充物52填充至间隔47内。
然后在固化工艺中固化底部填充物52。在固化工艺之后，底部填充物52部分固化或者完全固化。在部分固化或者完全固化之后，底部填充物52比固化工艺之前变得更结实。部分固化可以不导致底部填充物52的完全凝固。在底部填充物52部分固化期间，底部填充物52可以紧致(收缩)，并且部分固化至少没有导致底部填充物52完全紧致。最终的底部填充物52在部分固化之后可以仍然表现为凝胶。在一些实施例中，采用热固化工艺实施固化工艺。在该实施例中，采用比完全固化底部填充物52所需要的相应温度和持续时间要低和/或短的温度和/或持续时间实施部分固化。根据一些示例性实施例，可以在介于约80℃和约120℃之间的温度下实施部分固化。示例性部分固化步骤的持续时间可以是介于约1个小时和3个小时之间。可以理解，理想的部分固化条件可以与底部填充物52的类型相关。此外，取决于底部填充物52的类型，可以使用其他固化方法(诸如紫外线(UV)固化)。当固化工艺是完全固化工艺时，底部填充物52完全凝固。
如图4A至图4C中所示，对底部填充物52实施切割步骤以形成沟槽54。可以采用激光或者刀片(未示出)实施切割步骤。在一些实施例中，在接合至同一管芯40的相邻管芯44之间形成沟槽54。在其中也将底部填充物52填充至被接合至不同管芯40的相邻管芯44之间的间隔(图3中的47)内的实施例中，也可以将接合至不同管芯40的相邻管芯44连接的底部填充部分切割形成沟槽54。在一些实施例中，沟槽54的侧壁54B的部分基本上与封装元件20的顶面20A垂直，侧壁54B的部分在下文中被称为垂直侧壁部分。在一些实施例中，垂直侧壁部分包括侧壁54B的上部。
在一些示例性实施例中，沟槽54的深度D可以是自管芯44的顶面测量至封装元件20的顶面20A的高度的约5％至100％。沟槽54的宽度W可以是介于约5μm至约500μm之间。直接在沟槽54下方的填充物52的部分的厚度T1可以是介于约0μm和约700μm之间。如图4A中所示，沟槽54的底部54A与管芯44的底面44A可以基本上齐平。可选地，如图4B中所示，底部54A可以高于底面44A。同样如图4C中所示，沟槽54的底部54A也可以低于底面44A，并且可以在高于封装元件20的顶面20A的任何平面。
再参考图4A，在一些实施例中，沟槽54的宽度W可以小于相邻管芯44之间的间隔S。在切割步骤之后，底部填充物52的一部分可以保留在一个或两个管芯44的侧壁上，并且可以保留在沟槽54的一面或者对立面上。底部填充物52的剩余部分的厚度T2可以是介于约0μm和约500μm之间，例如。图4B示出根据可选的实施例的封装件，其中沟槽54的宽度W可以大于相邻管芯44之间的间隔S。因此，切割管芯44的一部分。图4C示出了又一些实施例，其中沟槽54的宽度W基本上等同于间隔S。
在其中部分固化底部填充物52的实施例中，在切割之后，实施热步骤(在下文中被称为热步骤)使底部填充物52退火并且固化。可以在高于玻璃转化温度的温度下实施热步骤。根据一些示例性实施例，热步骤的温度是介于约140℃和约170℃之间。示例性热步骤的持续时间可以是介于约1个小时和3个小时之间，并且可以例如是介于约1.5小时和约2.5个小时之间。固化可以引起底部填充物52收缩。可以注意到如果不切割底部填充物52，设置在相邻管芯44之间的底部填充物52的部分将相邻管芯44拉向彼此，并因此引起封装元件20翘曲。在实施例中，然而，因为实施切割步骤，底部填充物52的收缩不再引起相邻管芯44拉向彼此，因此至少减少由底部填充物52的固化导致的封装元件20的翘曲，并且可以基本上消除。
图4D示出了图4A至图4C中的结构的一部分的俯视图，其中从图4D中的平面交叉线4-4获得图4A至图4C中示出的剖视图。如图4D中所示，沟槽54可以自底部填充物52的一个边缘从头到尾延伸到相对的边缘，并因此可以使降低底部填充物52的拉力的益处最大化。
接下来，如图5A至图5C中所示，在管芯44和封装元件20上模塑聚合物56，例如，采用压塑。分别从图4A、图4B和图4C中示出的结构获得图5A、图5B和图5C。在一些实施例中，聚合物56包括模塑料、环氧树脂、硅等等。聚合物56可以包括填充至沟槽54中的第一部分、填充至接合至不同管芯40的相邻管芯44之间的间隔的第二部分，及位于管芯44上方的第三部分。然后固化聚合物56。在一些实施例中，在固化聚合物56之后，可以实施平坦化步骤(诸如研磨)使聚合物56的顶面变平，从而去除第三部分且暴露出管芯44的顶面。
图6A至图6C示出了封装元件20的背面结构的形成。分别从图5A，图5B和图5C中示出的结构获得图6A，图6B和图6C。在背面结构的形成期间，首先将图5A，图5B或者图5C中示出的封装件上下翻转，并且使半导体衬底22朝上。对半导体衬底22的背面实施背面研磨以减薄半导体衬底22，直到暴露出TV24。在半导体衬底22的背面上形成介电层(或者多个介电层)60。也在半导体衬底22的背面上形成与TV24电连接的连接件58。在一些实施例中，连接件58是焊球。在其他实施例中，连接件58可以包括金属焊盘、金属凸块、焊料盖顶等等。可以在封装元件20的背面上和介电层60中可选地形成RDL，其中部件59代表RDL。连接件58可以用于接合至附加电元件(未示出)，其可以是半导体衬底、封装基板、印刷电路板(PCB)等等。
图6A至图6C也示出了用于形成封装件64的管芯切割步骤，其中线66代表切线。图7A，图7B和图7C中示出了分别从图6A，图6B和图6C中的结构获得的最终封装件64。在如图7A中的最终封装件64中，底部填充物52包括介于相邻管芯44之间的顶面52A。底部填充物52的侧壁52B与顶面52A和位于聚合物56底下的底部填充物52部分的顶面同时形成。顶面52A和侧壁52B也形成陡峭的过渡而不是平滑的过渡。此外，聚合物56和底部填充物52之间的界面52B可以是基本上垂直的。界面52B的一部分(诸如上部)可以基本上垂直于管芯40的顶面20A。由于聚合物56和底部填充物52由不同的工艺步骤形成以及聚合物56和底部填充物52可以包括不同聚合物的事实，界面52B是可见的。在图7B中，由于管芯44的切割，聚合物56延伸至管芯44的一部分内。在图7C中，聚合物56的部分56’可以具有基本上等同于邻近管芯44之间的间隔S的宽度W。
根据实施例，通过对底部填充物实施部分固化或者完全固化，切割底部填充物，并且然后对底部填充物实施热退火，显著降低在底部填充物下方的晶圆的翘曲。实施实验以形成第一和第二样品封装件，分别形成第一和第二样品晶圆。用于形成第一和第二样品封装件的工艺彼此相似，除了在形成第一样品封装件时候，对相应的底部填充物没有实施部分固化和切割。第一样品晶圆的最终翘曲是约800μm。作为对比，在第二样品封装件的形成期间对相应的底部填充物实施部分固化和切割工艺。使第二样品晶圆的翘曲降低至约350μm。这表明底部填充物的部分固化和切割可以引起晶圆翘曲的显著降低。
根据实施例，一种方法包括：在第三封装元件的顶面上接合第一封装元件和第二封装元件，并且分配聚合物。聚合物包括位于第一封装元件和第三封装元件之间的间隔中的第一部分，位于第二封装元件和第三封装元件之间的间隔中的第二部分，及位于第一封装元件和第二封装元件之间的间隔中的第三部分。然后对聚合物实施部分固化。在固化之后，切割聚合物的第三部分以在第一封装元件和第二封装元件之间形成沟槽。
根据其他实施例，一种方法包括：在晶圆的多个管芯的每一个的顶面上接合第一管芯和第二管芯，并且将底部填充物分配到第一管芯和第二管芯以及晶圆之间的间隔内。底部填充物包括设置在第一管芯和第二管芯之间的间隔内的部分。实施固化工艺使底部填充物变硬。在固化步骤之后，切割在间隔中的底部填充物的部分以形成沟槽。在切割步骤之后，实施热步骤以退火底部填充物。
根据又一个实施例，一种器件包括：第一封装元件，及接合至第一封装元件的顶面的第二封装元件和第三封装元件。第一聚合物区包括接触第一封装元件的第一侧壁的第一部分，其中第一部分位于第二封装元件和第三封装元件之间的间隔中。第二聚合物区设置在间隔中，其中第二聚合物接触第一聚合物的第一部分的侧壁从而形成了可见界面。该可见界面包括基本上垂直于第一封装元件的顶面的部分。
尽管已经详细地描述了实施例及其优势，但应该理解，可以在不背离所附权利要求限定的实施例的精神和范围的情况下，进行各种改变、替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员根据本发明应很容易理解，根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此，所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。此外，每条权利要求构成单独的实施例，并且多个权利要求和实施例的组合在本发明的范围内。

Claims (20)

1.一种半导体器件的封装方法，包括：
在第三封装元件的顶面上接合第一封装元件和第二封装元件；
分配第一聚合物，其中，所述第一聚合物包括：
第一部分，位于所述第一封装元件和所述第三封装元件之间的间隔中；
第二部分，位于所述第二封装元件和所述第三封装元件之间的间隔中；以及
第三部分，位于所述第一封装元件和所述第二封装元件之间的间隔中；
对所述第一聚合物实施固化；以及
在所述固化之后，切割所述第一聚合物的所述第三部分以在所述第一封装元件和所述第二封装元件之间形成沟槽，其中一次实施所述切割工艺，
其中，所述沟槽的底部高于所述第三封装元件的顶面。
2.根据权利要求1所述的封装方法，其中，所述固化是部分固化，并且其中，所述方法还包括，在切割所述第一聚合物的所述第三部分的步骤之后，实施热步骤以完全固化所述第一聚合物。
3.根据权利要求1所述的封装方法，其中，在固化步骤之后，所述第一聚合物完全固化。
4.根据权利要求1所述的封装方法，还包括：
在切割步骤之后，用第二聚合物模塑所述第一封装元件，所述第二封装元件，以及所述第三封装元件，其中，填充所述第二聚合物至所述沟槽内。
5.根据权利要求4所述的封装方法，还包括：
在用所述第二聚合物模塑的步骤之后，对所述第三封装元件实施管芯切割以将所述第三封装元件分成单个封装件。
6.根据权利要求1所述的封装方法，其中，所述沟槽具有与所述第一封装元件和所述第二封装元件的底面相平或者低的底部。
7.根据权利要求1所述的封装方法，其中，在切割所述第一聚合物的所述第三部分之后，所述第一聚合物的所述第三部分包括在所述沟槽的相对面上的剩余部分，并且其中，所述剩余部分与所述第一封装元件和所述第二封装元件的侧壁接触。
8.一种半导体器件的封装方法，包括：
在晶圆的多个管芯的每一个的顶面上接合第一管芯和第二管芯；
将底部填充物分配至所述第一管芯和所述第二管芯与所述晶圆之间的空间内，其中，所述底部填充物包括设置在所述第一管芯和所述第二管芯之间的间隔内的一部分；
实施固化步骤以固化所述底部填充物；
在所述固化步骤之后，切割所述底部填充物的所述部分以形成沟槽，所述沟槽的底部高于所述多个管芯的每一个的顶面；以及
在切割步骤之后，实施热步骤以退火所述底部填充物。
9.根据权利要求8所述的封装方法，其中，在所述固化步骤之后，所述底部填充物部分固化。
10.根据权利要求8所述的封装方法，还包括：
在所述第一管芯、所述第二管芯、及所述晶圆上方模塑模塑料，其中，所述模塑料填充至所述沟槽内；以及
将所述晶圆及所述第一管芯和所述第二管芯切割成多个封装件，其中，每个所述多个封装件包括各自的第一管芯和各自的第二管芯。
11.根据权利要求10所述的封装方法，还包括：
在模塑所述模塑料的步骤之后和在切割所述晶圆的步骤之前，在所述晶圆的背面上形成多个连接件。
12.根据权利要求8所述的封装方法，其中，所述晶圆包括：
衬底；以及
多个衬底通孔，位于所述衬底中，其中，将所述多个衬底通孔电连接至所述第一管芯和所述第二管芯。
13.根据权利要求8所述的封装方法，其中，在切割所述底部填充物的所述部分以形成所述沟槽的步骤中，不切割所述晶圆。
14.一种半导体器件，包括：
第一封装元件；
第二封装元件和第三封装元件，所述第二封装元件和所述第三封装元件接合至所述第一封装元件的顶面；
第一聚合物区，包括接触所述第二封装元件的第一侧壁的第一部分，其中，所述第一部分位于所述第二封装元件和所述第三封装元件之间的间隔内；以及
第二聚合物区，设置在所述间隔内，其中，所述第二聚合物接触所述第一聚合物的所述第一部分的侧壁以形成第一可见界面，并且其中，所述第一可见界面包括垂直于所述第一封装元件的顶面的部分，所述第二聚合物区的底部高于所述第一封装元件的顶面。
15.根据权利要求14所述的半导体器件，其中，所述第一聚合物区还包括：
第二部分，位于所述间隔内，其中，所述第二聚合物区设置在所述第一聚合物区的所述第一部分和所述第二部分之间，其中，所述第二聚合物区接触所述第一聚合物区的所述第二部分的侧壁以形成第二可见界面，并且其中，所述第二可见界面包括垂直于所述第一封装元件的顶面的部分。
16.根据权利要求14所述的半导体器件，其中，所述第一聚合物区和所述第二聚合物区包括不同的聚合物。
17.根据权利要求16所述的半导体器件，其中，所述第一聚合物区包括底部填充物，并且所述第二聚合物区包括模塑料。
18.根据权利要求14所述的半导体器件，其中，所述第二封装元件和所述第三封装元件包括器件管芯，并且其中，所述第一封装件包括：
衬底；以及
多个衬底通孔，位于所述衬底中，其中，将所述多个衬底通孔电连接至所述第二封装元件和所述第三封装元件。
19.根据权利要求14所述的半导体器件，其中，所述第二聚合物区的底部与所述第二封装元件和所述第三封装元件的底面齐平。
20.根据权利要求14的半导体器件，其中，所述第二聚合物的底部低于所述第二封装元件和所述第三封装元件的底面。
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