CN103199055B - 封装件及其形成方法 - Google Patents

封装件及其形成方法 Download PDF

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CN103199055B
CN103199055B CN201210213755.0A CN201210213755A CN103199055B CN 103199055 B CN103199055 B CN 103199055B CN 201210213755 A CN201210213755 A CN 201210213755A CN 103199055 B CN103199055 B CN 103199055B
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dielectric layer
interconnection structure
tube core
substrate
formation method
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CN103199055A (zh
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施应庆
卢思维
林俊成
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种封装件及其形成方法，包括：在衬底上方形成介电层；在介电层上方形成互连结构；以及接合管芯至互连结构。然后去除衬底，并且使介电层图案化。在介电层的表面形成连接件，其中将连接件电连接至管芯。本发明还提供了一种封装件。

Description

封装件及其形成方法
技术领域
本发明涉及一种封装件及其形成方法。
背景技术
三维集成电路(3DIC)通常用于冲破二维(2D)电路的障碍，在3DIC中，堆叠两个或两个以上的封装元件，其中封装元件包括含有穿透衬底通孔(TSV)、插件、封装基板等的器件管芯。
在现有的封装元件中的是插件。插件包括衬底，以及形成在衬底中的TSV。连接件形成在衬底的两面上，并且通过TSV互连。插件用于互连的目的，并且不包括其中的有源器件。
发明内容
为了解决现有技术中存在的问题，根据本发明的一个方面，提供了一种方法，包括：在衬底上方形成介电层；在所述介电层上方形成互连结构；接合管芯至所述互连结构；去除所述衬底；使所述介电层图案化；以及在所述介电层的表面形成连接件，其中，将所述连接件电连接至所述管芯。
在上述方法中，其中，所述衬底包括硅衬底。
在上述方法中，还包括：在接合所述管芯的步骤之后，在所述管芯上模塑聚合物，其中，所述聚合物与所述管芯的边缘接触。
在上述方法中，还包括在接合所述管芯的步骤之后，在所述管芯上模塑聚合物，其中，所述聚合物与所述管芯的边缘接触，还包括：在形成所述互连结构的步骤之后和在模塑所述聚合物的步骤之前，对所述互连结构实施预切以形成沟槽，其中，所述沟槽延伸至所述互连结构内。
在上述方法中，还包括在接合所述管芯的步骤之后，在所述管芯上模塑聚合物，其中，所述聚合物与所述管芯的边缘接触，还包括：在形成所述互连结构的步骤之后和在模塑所述聚合物的步骤之前，对所述互连结构实施预切以形成沟槽，其中，所述沟槽延伸至所述互连结构内，其中，所述沟槽的底部与所述介电层的顶面基本上齐平，并且其中，所述介电层的所述顶面与所述互连结构接触。
在上述方法中，还包括在接合所述管芯的步骤之后，在所述管芯上模塑聚合物，其中，所述聚合物与所述管芯的边缘接触，还包括：在形成所述互连结构的步骤之后和在模塑所述聚合物的步骤之前，对所述互连结构实施预切以形成沟槽，其中，所述沟槽延伸至所述互连结构内，其中，所述沟槽的底部延伸至所述介电层内。
在上述方法中，其中，所述介电层包括选自基本上由氮化硅、氧化硅、及其组合组成的组的材料。
根据本发明的另一方面，还提供了一种方法，包括：在衬底上形成介电层；在所述介电层上方形成互连结构，其中，所述互连结构包括：至少一个介电层；以及再分布线，位于所述至少一个介电层中；接合多个管芯至所述互连结构；用聚合物模塑所述多个管芯，其中，将所述聚合物填充至所述多个管芯之间的间隙内。研磨所述衬底以暴露出所述介电层；在所述研磨步骤之后，使所述介电层图案化；以及在所述介电层的表面形成互连件，其中，将所述互连件电连接至所述再分布线。
在上述方法中，其中，所述衬底是硅衬底。
在上述方法中，其中，形成所述互连结构的步骤包括镶嵌工艺。
在上述方法中，还包括：在形成所述互连结构的步骤之后和在用所述聚合物模塑所述多个管芯的步骤之前，对所述互连结构实施预切从而在所述互连结构中形成沟槽。
在上述方法中，还包括在形成所述互连结构的步骤之后和在用所述聚合物模塑所述多个管芯的步骤之前，对所述互连结构实施预切从而在所述互连结构中形成沟槽，其中，所述沟槽的底部与所述介电层的顶面基本上齐平，并且其中，所述介电层的所述顶面与所述互连结构接触。
在上述方法中，还包括在形成所述互连结构的步骤之后和在用所述聚合物模塑所述多个管芯的步骤之前，对所述互连结构实施预切从而在所述互连结构中形成沟槽，其中，所述沟槽的底部延伸至所述介电层内。
在上述方法中，还包括：管芯切割步骤以将所述互连结构和所述多个管芯分成多个封装件，并且其中，在每一个所述多个封装件中，所述聚合物的剩余部分位于所述互连结构的侧边上。
根据本发明的又一方面，还提供了一种器件，包括：互连结构，所述互连结构包括：介电层；多个介电层，邻接所述介电层，其中，所述多个介电层都不是由有机材料形成；以及多个再分布线，设置在所述多个介电层中；多个第一连接件，位于所述互连结构的第一面上，其中，所述多个第一连接件与所述介电层接触；多个第二连接件，位于所述互连结构的第二面上并且电连接至所述多个第一连接件，其中，所述第一面和所述第二面是相对面，并且其中，在所述第一连接件和所述第二连接件之间不形成衬底和通孔；封装元件，接合至所述多个第二连接件；以及聚合物，将所述封装元件模塑在其中。
在上述器件中，其中，所述介电层包括与所述聚合物的边缘对准的边缘，其中，所述多个介电层不包括任何与所述介电层的所述边缘对准的边缘，并且其中，所述多个介电层的边缘与所述聚合物接触。
在上述器件中，其中，所述多个第一连接件包括焊料区，所述焊料区延伸至所述介电层内。
在上述器件中，其中，所述介电层包括选自基本上由氮化硅、氧化硅、及其组合组成的组的材料。
在上述器件中，还包括接合至所述多个第一连接件封装基板。
在上述器件中，其中，所述多个介电层包括低-k介电材料。
附图说明
为了更充分地理解实施例及其优点，现在将结合附图所进行的以下描述作为参考，其中：
图1至图7是根据一些示例性实施例制造封装件的中间阶段的剖视图；以及
图8至图14是根据一些示例性实施例制造封装件的中间阶段的剖视图。
具体实施方式
在下文详细地讨论本发明实施例的制造和使用。然而，应当理解，实施例提供了许多可以在各种具体环境中实现的可应用的发明概念。所讨论的具体实施例是示例性的，而不是用于限制本发明的范围。
提供了一种三维集成电路(3DIC)封装件及其形成方法。示出了根据一些实施例制造封装件的中间阶段。讨论了实施例的变化。在所有的各个附图和示例性实施例中，相似的参考标号用于表示相似的元件。
图1至图7示出了根据一些示例性实施例制造封装件的中间阶段的剖视图。图1示出衬底20和形成在衬底20上的介电层22。衬底20可以是其中不形成有导电部件的空白(blank)衬底。在实施例中，衬底20是硅衬底，其还可以是空白硅晶圆。在可选的实施例中，衬底20可以由其他材料诸如玻璃、有机材料等形成。介电层22可以由诸如氮化硅的氮化物，诸如氧化硅、氮氧化硅、碳化硅及其组合的氧化物，及其中的多层形成。然而，可以意识到在整个说明书中所列举的尺寸仅仅是实例，并且可以变更为不同的值。在一些示例性实施例中，介电层22的形成包括热氧化衬底20，从而介电层22包括热氧化物。可选地，介电层22的形成方法包括化学汽相沉积(CVD)方法，诸如等离子体增强化学汽相沉积(PECVD)等等。
互连结构24形成在介电层22的上方，并且可以接触介电层22。互连结构24包括介电层26、及位于介电层26中的再分布线(RDL)28。其中一个介电层26的底部的底面可以接触介电层22的顶面。在一些实施例中，介电层26包括氮化硅、氧化硅、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、硼掺杂的磷硅酸盐玻璃(BPSG)、或者其他无机介电材料。在其他实施例中，介电层26包括低-k介电材料，诸如含碳和/或含氮低-k介电材料。介电层26可以不含有有机材料。RDL28可以由铜、铝、铝铜、钨、银、及其合金形成。RDL28的底层可以包括窄部和宽部，其中可以与介电层22接触的宽部可以作为在随后的接合工艺中的接合焊盘。
根据一些示例性实施例，因为衬底20可以是硅衬底，所以可以使用可用于硅衬底的后段工艺。例如，RDL28和介电层26的形成可以包括镶嵌工艺，诸如单镶嵌工艺和/或双镶嵌工艺。示例性镶嵌工艺包括形成介电层26其中之一；在介电层26中形成开口；在开口中填充金属材料；及实施化学机械抛光(CMP)以去除介电层26上方的多余金属材料。因而，位于开口中的金属材料的剩余部分形成RDL28，该RDL28包括金属线和通孔。用于镶嵌工艺中的金属材料可以由基本上纯的铜或者铜合金形成。在其中介电层26包括低-k介电材料的实施例中，可以在填充金属材料之前形成诸如钛层、钽层、氮化钛层、及氧化钽层的阻挡层(未示出)。
相比于有机介电层的各个尺寸和形成在有机介电层上的RDL的尺寸，采用诸如镶嵌工艺的硅后段工艺可以显著降低介电层26的尺寸和RDL28的尺寸。
在互连结构24的表面上形成前面连接件30，并且将前面连接件30电连接至RDL28。在实施例中，连接件30包括焊球。在可选的实施例中，连接件30包括金属柱、或者金属柱上具有焊料盖顶的金属柱。
在形成互连结构24之后，并且在形成连接件30之前或之后，可以实施预切以切割穿透互连结构24。结果是，形成沟槽36，并且从互连结构24的顶面延伸至互连结构24内。在一些实施例中，沟槽36的底部36A(由虚线示出)与介电层22的顶面22A基本上齐平。在可选的实施例中，沟槽36的底部36A可以位于介电层22的顶面22A和底面22B之间的中间水平面处，在又一些实施例中，介电层22可以在预切步骤中基本上被切割穿透，并且沟槽36的底部36A与介电层22的底面22B可以基本上齐平。在又一些可选的实施例中，沟槽36延伸至衬底20内。可以采用激光或刀片实施预切。
参考图2，将封装元件38接合至互连结构24的顶面，并且接合至连接件30。在一些实施例中，封装元件38是管芯，并因此在下文中被称为管芯38。管芯38可以是在其中包含有诸如晶体管、电容器、电感器、电阻器等的集成电路器件(未示出)的器件管芯。管芯38和连接件30之间的接合可以是焊料接合或者直接金属-与-金属(诸如铜-与-铜)接合。将底部填充剂32分配至管芯38和互连结构24之间的间隙内，并且使其固化。
参考图3，将聚合物34模塑至管芯38和互连结构24的上面。在实施例中，聚合物34包括模塑料，并因此在下文中被称为模塑料34，然而聚合物34也可以由诸如环氧树脂、模塑底部填充剂等的其他类型的聚合物底部填充剂形成。将模塑料34进一步填充至管芯38之间的间隙内，并且填充至沟槽36内。在固化模塑料34之后，可以对模塑料34实施研磨工艺以齐平模塑料34的顶面。结果是，模塑料34的顶面34A可以高于管芯38的顶面38A或者与顶面38A齐平。
在可选的实施例中，代替在单独的步骤中施用底部填充剂32和模塑料34，其中底部填充剂32和模塑料34的每一次分配都伴随着固化工艺，使用模塑底部填充剂替代底部填充剂32和模塑料34，并且在下文中被称为模塑底部填充剂32/34。因此，模塑底部填充剂填充管芯38和互连结构24之间的间隙，并且也填充管芯38之间的间隙。在分配模塑底部填充剂32/34之后，实施固化工艺。
参考图4，将图3中的封装件上下翻转。然后去除衬底20。为了准确控制衬底20的去除，可以实施研磨工艺以去除衬底20的大部分，从而剩下衬底20的薄层。然后实施蚀刻工艺以去除剩余的衬底20。在如图4中所示的得到的结构中，暴露出介电层22。
图5和图6示出连接件40的形成。参考图5，使介电层22图案化以暴露出RDL28中的金属焊盘，接下来，如图6中所示，形成连接件40。在一些示例性实施例中，连接件40的形成可以包括在RDL28的暴露部分上设置焊球，然后回流焊球。在可选的实施例中，连接件40的形成包括实施电镀步骤以在RDL28的暴露部分上形成焊料区，然后回流焊料区。连接件40也可以包括金属柱，或者金属柱和焊料盖顶，其也可以通过电镀形成。
在形成连接件40之后，可以实施管芯切割，从而形成封装件44。每一个封装件44包含互连结构22的一部分，以及接合在其上的管芯38。管芯切割的切口43可以窄于沟槽36(参见图1)。结果是，在切口43的相对面上保留部分模塑料34。因而，互连结构24中的介电层26通过模塑料34的剩余部分加以保护，该剩余部分覆盖介电层26的侧壁。
图7示出了封装元件44在封装元件46上的接合。在一些实施例中，封装元件46包括封装基板、印刷电路板(PCB)等等。连接件40可以将管芯38电连接至封装元件46中的导电部件(未示出)。底部填充剂48可以施用于封装件44和封装元件46之间的间隙。
在图7中的得到的结构中，模塑料34可以覆盖互连结构24的侧壁，也可以是介电层26的侧壁。在一些实施例中，介电层22的边缘22C可以与模塑料34的边缘34B对准。介电层26的边缘26A可以与模塑料34和介电层22各自的边缘34B和边缘22C不对准。此外，在连接件30和连接件40之间，可以没有衬底(包括半导体衬底)，并因此没有穿透衬底通孔。
图8至图14示出根据一些示例性实施例形成封装件的中间阶段的剖视图。除非另外说明，这些实施例中的元件的材料及形成方法与图1至图7中示出的实施例中通过相似参考标号表示的相似元件基本上相同。因而可以从图1至图7中示出的示例性实施例的论述中找到图8至图14中示出的实施例的形成细节。
图8至图14中的实施例与图1至图7中的实施例相似，除了没有实施预切来形成互连结构24中的沟槽。下面提供了这些实施例的简要论述。
参考图8，在衬底20上形成介电层22，接着是形成互连结构24。互连结构24包括形成在介电层26中的RDL28。在形成互连结构24之后，没有实施预切来切割互连结构24。参考图9，通过连接件30将管芯38接合至互连结构24。因为没有实施预切，如图10中所示，在应用模塑料34之后，模塑料34没有延伸至互连结构24中。
然后，例如通过研磨和蚀刻去除如图10中的衬底20。图11示出了得到的结构，在其中暴露出介电层22。然后使介电层22图案化，如图12中所示，从而暴露出部分RDL28。接下来，如图13中所示，形成连接件40。然后将图13中所示的结构切割成封装件44。在其中介电层26包括低-k介电层的一些实施例中，采用激光实施管芯切割以避免对低-k介电材料的损伤。在可选的实施例中，可以使用极光或刀片。
在图14中，在封装元件46上进一步接合得到的封装件44，接着是应用和固化底部填充剂48。在得到的结构中，模塑料34具有与介电层26的边缘26A和介电层22的边缘22C都对准的边缘34B。根据一些实施例，介电层22和介电层26可以由无机材料形成。此外，在连接件30和连接件40之间，可以没有衬底(包括半导体衬底)，以及没有穿透衬底通孔。
根据实施例，如图7和图14中所示，去除在其上形成有互连结构的衬底。因此，不需要形成通孔。结果是，与包含有衬底和衬底中的通孔的封装件相比，缩短了电流路径。另一方面，虽然去除了衬底，但在封装件的形成期间，可以采用硅后段工艺。因而降低互连结构的尺寸。
根据实施例，一种方法包括：在衬底上方形成介电层；在介电层上方形成互连结构；及接合管芯至互连结构。然而去除衬底，并且使介电层图案化。在介电层的表面形成连接件，其中将连接件电连接至管芯。
根据其他实施例，一种方法包括：在衬底上形成介电层，及在介电层上方形成互连结构。互连结构包括至少一个介电层，及位于至少一个介电层中的再分布线。将多个管芯接合至互连结构。用聚合物模塑多个管芯，其中将聚合物填充至多个管芯之间的间隙内。研磨衬底以暴露出介电层。在研磨步骤之后，使介电层图案化。在介电层的表面形成连接件，其中将连接件电连接至再分布线。
根据又一些实施例，一种器件包括：互连结构，该互连结构还包括：介电层，及与该介电层邻接的多个介电层，其中该多个介电层全都不是由有机材料形成。该器件还包括：设置在该多个介电层中的多个再分布线；位于互连结构的第一面上的多个第一连接件，其中多个第一连接件与介电层接触；及位于互连结构的第二面上的多个第二连接件并且电连接至多个第一连接件。第一面和第二面是相对面。在第一连接件和第二连接件之间不形成衬底和通孔。将封装元件接合至多个第二连接件。聚合物模塑其中的封装元件。
尽管已经详细地描述了实施例及其优势，但应该理解，可以在不背离所附权利要求限定的实施例的精神和范围的情况下，进行各种改变、替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员根据本发明应很容易理解，根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此，所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。此外，每条权利要求构成单独的实施例，并且多个权利要求和实施例的组合在本发明的范围内。

Claims (14)

1.一种封装件的形成方法，包括：
在衬底上方形成第一介电层；
在所述第一介电层上方形成互连结构，所述互连结构包括再分布线和第二介电层；
接合管芯至所述互连结构；
去除所述衬底以暴露所述第一介电层；
在去除所述衬底后，使所述第一介电层图案化；以及
在所述第一介电层的表面形成连接件，其中，将所述连接件电连接至所述管芯。
2.根据权利要求1所述的形成方法，其中，所述衬底包括硅衬底。
3.根据权利要求1所述的形成方法，还包括：
在接合所述管芯的步骤之后，在所述管芯上模塑聚合物，其中，所述聚合物与所述管芯的边缘接触。
4.根据权利要求3所述的形成方法，还包括：
在形成所述互连结构的步骤之后和在模塑所述聚合物的步骤之前，对所述互连结构实施预切以形成沟槽，其中，所述沟槽延伸至所述互连结构内。
5.根据权利要求4所述的形成方法，其中，所述沟槽的底部与所述第一介电层的顶面齐平，并且其中，所述第一介电层的所述顶面与所述互连结构接触。
6.根据权利要求4所述的形成方法，其中，所述沟槽的底部延伸至所述第一介电层内。
7.根据权利要求1所述的形成方法，其中，所述第一介电层包括选自由氮化硅、氧化硅、及其组合组成的组的材料。
8.一种封装件的形成方法，包括：
在衬底上形成介电层；
在所述介电层上方形成互连结构，其中，所述互连结构包括：
至少一个介电层；以及
再分布线，位于所述至少一个介电层中，所述至少一个介电层和所述再分布线由硅后段工艺形成；
接合多个管芯至所述互连结构；
用聚合物模塑所述多个管芯，其中，将所述聚合物填充至所述多个管芯之间的间隙内；
研磨所述衬底以暴露出所述介电层；
在所述研磨步骤之后，使所述介电层图案化；以及
在所述介电层的表面形成互连件，其中，将所述互连件电连接至所述再分布线。
9.根据权利要求8所述的形成方法，其中，所述衬底是硅衬底。
10.根据权利要求8所述的形成方法，其中，形成所述互连结构的步骤包括镶嵌工艺。
11.根据权利要求8所述的形成方法，还包括：
在形成所述互连结构的步骤之后和在用所述聚合物模塑所述多个管芯的步骤之前，对所述互连结构实施预切从而在所述互连结构中形成沟槽。
12.根据权利要求11所述的形成方法，其中，所述沟槽的底部与所述介电层的顶面齐平，并且其中，所述介电层的所述顶面与所述互连结构接触。
13.根据权利要求11所述的形成方法，其中，所述沟槽的底部延伸至所述介电层内。
14.根据权利要求8所述的形成方法，还包括：
管芯切割步骤以将所述互连结构和所述多个管芯分成多个封装件，并且其中，在每一个所述多个封装件中，所述聚合物的剩余部分位于所述互连结构的侧边上。
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