CN102246267B - 层叠有宽带隙半导体的复合基板的制造方法 - Google Patents

层叠有宽带隙半导体的复合基板的制造方法 Download PDF

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Publication number
CN102246267B
CN102246267B CN200980150180.9A CN200980150180A CN102246267B CN 102246267 B CN102246267 B CN 102246267B CN 200980150180 A CN200980150180 A CN 200980150180A CN 102246267 B CN102246267 B CN 102246267B
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substrate
band gap
bonded
substrates
treatment
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Chinese (zh)
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CN102246267A (zh
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秋山昌次
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Shin Etsu Chemical Co Ltd
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Shin Etsu Chemical Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
CN200980150180.9A 2008-12-11 2009-12-10 层叠有宽带隙半导体的复合基板的制造方法 Active CN102246267B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2008315566 2008-12-11
JP2008-315566 2008-12-11
JP2009-278561 2009-12-08
JP2009278561A JP5389627B2 (ja) 2008-12-11 2009-12-08 ワイドバンドギャップ半導体を積層した複合基板の製造方法
PCT/JP2009/070656 WO2010067835A1 (ja) 2008-12-11 2009-12-10 ワイドバンドギャップ半導体を積層した複合基板の製造方法

Publications (2)

Publication Number Publication Date
CN102246267A CN102246267A (zh) 2011-11-16
CN102246267B true CN102246267B (zh) 2016-04-27

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CN200980150180.9A Active CN102246267B (zh) 2008-12-11 2009-12-10 层叠有宽带隙半导体的复合基板的制造方法

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US (1) US8546245B2 (https=)
EP (1) EP2357660B1 (https=)
JP (1) JP5389627B2 (https=)
KR (1) KR101607725B1 (https=)
CN (1) CN102246267B (https=)
AU (1) AU2009325425B2 (https=)
TW (1) TWI482198B (https=)
WO (1) WO2010067835A1 (https=)

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JP5417399B2 (ja) 2011-09-15 2014-02-12 信越化学工業株式会社 複合ウェーハの製造方法
FR2984597B1 (fr) * 2011-12-20 2016-07-29 Commissariat Energie Atomique Fabrication d’une structure souple par transfert de couches
JP5884585B2 (ja) * 2012-03-21 2016-03-15 住友電気工業株式会社 炭化珪素半導体装置の製造方法
KR101436289B1 (ko) * 2012-07-18 2014-08-29 엔지케이 인슐레이터 엘티디 복합 웨이퍼 및 그 제조 방법
JP6160617B2 (ja) * 2012-07-25 2017-07-12 信越化学工業株式会社 ハイブリッド基板の製造方法及びハイブリッド基板
JP6265915B2 (ja) * 2012-12-26 2018-01-24 日本碍子株式会社 複合基板の製法
WO2014192597A1 (ja) * 2013-05-31 2014-12-04 日本碍子株式会社 複合基板用支持基板および複合基板
JP6165127B2 (ja) * 2014-12-22 2017-07-19 三菱重工工作機械株式会社 半導体装置及び半導体装置の製造方法
JP6396853B2 (ja) 2015-06-02 2018-09-26 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6396854B2 (ja) * 2015-06-02 2018-09-26 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6454606B2 (ja) * 2015-06-02 2019-01-16 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6396852B2 (ja) * 2015-06-02 2018-09-26 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6632462B2 (ja) * 2016-04-28 2020-01-22 信越化学工業株式会社 複合ウェーハの製造方法
JP6387375B2 (ja) 2016-07-19 2018-09-05 株式会社サイコックス 半導体基板
CN107785235A (zh) * 2016-08-31 2018-03-09 沈阳硅基科技有限公司 一种在基板上制造薄膜的方法
RU2699606C1 (ru) * 2016-11-28 2019-09-06 Федеральное государственное автономное образовательное учреждение высшего образования "Национальный исследовательский Нижегородский государственный университет им. Н.И. Лобачевского" Способ ионно-лучевого синтеза нитрида галлия в кремнии
CN107326435A (zh) * 2017-07-28 2017-11-07 西安交通大学 一种生长GaN的SiC衬底的剥离方法
US10510532B1 (en) * 2018-05-29 2019-12-17 Industry-University Cooperation Foundation Hanyang University Method for manufacturing gallium nitride substrate using the multi ion implantation
KR101969679B1 (ko) * 2018-07-27 2019-04-16 한양대학교 산학협력단 Soi 웨이퍼와 열처리 공정을 이용한 박막 형성 및 전사 방법
JP7416935B2 (ja) * 2019-11-14 2024-01-17 ファーウェイ デジタル パワー テクノロジーズ カンパニー リミテッド 半導体基板、その製造方法、及び半導体装置
CN111883651A (zh) * 2020-07-23 2020-11-03 奥趋光电技术(杭州)有限公司 一种制备高质量氮化铝模板的方法
US20250059676A1 (en) 2021-12-21 2025-02-20 Shin-Etsu Handotai Co., Ltd. Nitride semiconductor substrate and method for producing nitride semiconductor substrate
KR20240169017A (ko) * 2022-03-23 2024-12-02 치글러, 졸탄 복합 기판 형성 방법
TWI912574B (zh) * 2023-01-10 2026-01-21 中國砂輪企業股份有限公司 複合式基板及複合式基板之製備方法
CN117476831B (zh) * 2023-12-20 2024-03-19 青禾晶元(晋城)半导体材料有限公司 Led外延片及其制备方法、led芯片及其制备方法
US20250254943A1 (en) * 2024-02-02 2025-08-07 Wolfspeed, Inc. Power Semiconductor Devices with Stacked Layers
US12610767B2 (en) 2024-03-07 2026-04-21 Wolfspeed, Inc. Additives for grinding semiconductor workpieces
DE102024203093A1 (de) * 2024-04-04 2025-10-09 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zum Herstellen einer Driftzone mit p-dotierten Bereichen eines Superjunction-Leistungshalbleiterbauelements und ein Superjunction-Leistungshalbleiterbauelement

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EP1482548A1 (en) * 2003-05-26 2004-12-01 S.O.I. Tec Silicon on Insulator Technologies S.A. A method of manufacturing a wafer
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JP2008277552A (ja) * 2007-04-27 2008-11-13 Shin Etsu Chem Co Ltd 貼り合わせ基板の製造方法

Also Published As

Publication number Publication date
CN102246267A (zh) 2011-11-16
KR101607725B1 (ko) 2016-03-30
US8546245B2 (en) 2013-10-01
AU2009325425B2 (en) 2014-10-02
EP2357660A4 (en) 2012-06-20
TW201104726A (en) 2011-02-01
US20110227068A1 (en) 2011-09-22
EP2357660B1 (en) 2014-09-03
WO2010067835A1 (ja) 2010-06-17
KR20110099008A (ko) 2011-09-05
TWI482198B (zh) 2015-04-21
AU2009325425A1 (en) 2010-06-17
JP2010161355A (ja) 2010-07-22
EP2357660A1 (en) 2011-08-17
JP5389627B2 (ja) 2014-01-15

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