CN101283450A - 3d直通硅体系结构的集成微通道 - Google Patents

3d直通硅体系结构的集成微通道 Download PDF

Info

Publication number
CN101283450A
CN101283450A CNA2006800374412A CN200680037441A CN101283450A CN 101283450 A CN101283450 A CN 101283450A CN A2006800374412 A CNA2006800374412 A CN A2006800374412A CN 200680037441 A CN200680037441 A CN 200680037441A CN 101283450 A CN101283450 A CN 101283450A
Authority
CN
China
Prior art keywords
substrate
opening
integrated circuit
circuit lead
tube core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2006800374412A
Other languages
English (en)
Other versions
CN101283450B (zh
Inventor
D·卢
W·施
Y·白
Q·周
J·何
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of CN101283450A publication Critical patent/CN101283450A/zh
Application granted granted Critical
Publication of CN101283450B publication Critical patent/CN101283450B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06589—Thermal management, e.g. cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Micromachines (AREA)

Abstract

本发明的一些实施例包括与用于从3D直通硅体系结构除热的集成微通道相关的装置和方法。

Description

3D直通硅体系结构的集成微通道
技术领域
本发明的实施例涉及微电子封装。具体来说，本发明的实施例涉及3D直通硅体系结构的除热。
背景技术
在微电子封装方面，正在不断努力生产更小且更快的电子器件。3D封装体系结构，包括堆叠管芯体系结构，可提供优于2D封装体系结构的几个优点(例如更小的尺寸和减小的互连距离)。
典型的2D封装体系结构可包括以倒装芯片方式连接到衬底的管芯，使得管芯的有源表面(包括器件和金属层)朝向衬底。然后可在管芯的暴露背面上提供冷却解决方案。冷却解决方案例如可包括热沉、集成放热器或风扇。
图1示出一种典型的3D封装100，包括衬底110、中央处理单元(CPU)管芯120、动态随机存取存储器(DRAM)管芯130、闪存管芯140和模拟管芯150。衬底110通常可包括印刷电路板或母板。为了使3D封装100工作，各组件的有源表面必须电连接到衬底110或者相邻组件的有源表面。为了互连这些有源表面，导电直通硅通路(TSV)160可贯穿这些组件。
例如，CPU管芯120可通过倒装芯片方式连接到衬底110，使得CPU管芯120的有源表面朝向衬底110。DRAM管芯130可采用凸点焊接连接到CPU管芯120，使得DRAM管芯130的有源表面朝向CPU管芯120的非有源表面。CPU管芯120的TSV然后可将DRAM管芯130的有源表面电连接到CPU管芯120的有源表面，或连接到衬底110。
通过类似的方式，可电互连各组件的有源表面。
附图说明
在附图的各图中通过实例而非限制方式示出了本发明，附图中相似参考标号表示相似单元，附图包括：
图1示出现有技术装置。
图2A-2B示出截面型侧视图，其中管芯附连到衬底，冷却解决方案附连到管芯，并且第二管芯附连到冷却解决方案。
图3A-3H示出用于形成具有微通道和通孔的冷却解决方案的方法。
具体实施方式
在各种实施例中，描述了与3D晶片或管芯封装体系结构相关的装置和方法。但是，实施各种实施例可以没有具体细节中的一个或多个，或者可以采用其它方法、材料或组件。在其它情况下，没有详细示出或描述众所周知的结构、材料或操作，以免模糊了本发明各种实施例的各个方面。类似地，为了便于说明，阐述了具体数量、材料和配置，以便提供对本发明的透彻理解。然而，没有这些具体细节也可实施本发明。此外，要理解，附图所示的各种实施例是说明性的表示，并不一定按比例绘制。
为了生产更小且更快的电子器件，可增大半导体芯片(或管芯)的封装密度。用于增大封装密度的一种解决方案可包括3D封装体系结构、诸如芯片堆叠。在操作中，堆叠中的芯片的有源区或区域可能发热。为了增强芯片的性能、使用具有增强性能能力的芯片或者实现高功率封装，可去除产生的热量。典型的3D封装体系结构可能没有提供任何热量去除或热解决方案。
通常，在单个芯片封装中，可用背面冷却解决方案、诸如集成放热器或风扇来去除热量。但是，在堆叠芯片布置中，可能使用背面冷却解决方案是行不通的，因为某些芯片的背面可能由于空间限制或者由于与电连接布线不一致而没有暴露出来。简言之，本发明的实施例可提供用于包含用于芯片间电布线的通路的堆叠芯片的冷却解决方案。
图2A和图2B示出根据本发明可提供堆叠芯片除热的装置200的截面视图。图2B示出沿图2A的线段A-A’得到的视图。
装置200包括衬底210、管芯220、冷却解决方案230和管芯270。冷却解决方案230包括衬底240、通孔260和微通道250。管芯220可包括通孔225。
衬底210可包括用于安装管芯220的任何适当衬底。在各种实施例中，衬底210可包括印刷电路板(PCB)、母板或内插板。衬底210可包括导电迹线和导电焊盘或凸点，以便帮助安装管芯220。管芯220可通过任何适当的技术安装到衬底210。在一个实施例中，管芯220可通过焊料凸点、铜凸点、导电连接焊盘(landing pad)等以倒装芯片方式连接到衬底210，使得管芯220的有源表面朝向衬底210。在一个实施例中，通孔225可提供通过管芯220的电布线。在一个实施例中，通孔225可包含铜。
冷却解决方案230和管芯220可通过任何适当的技术连接。在一个实施例中，冷却解决方案230和管芯220可通过扩散粘结进行连接。在一个实施例中，冷却解决方案230和管芯220均可包括硅，并且它们可通过硅-硅扩散粘结进行连接。在其它实施例中，冷却解决方案230可通过包括凸点或连接焊盘的凸点焊接技术附连到管芯220。在各种实施例中，冷却解决方案230的尺寸可比管芯220更大、更小或与其相同。
管芯270和冷却解决方案230可通过任何适当的直通硅通路技术进行连接。在一个实施例中，冷却解决方案230和管芯270可通过扩散粘结进行连接。在一个实施例中，冷却解决方案230和管芯270均可包括硅，并且它们可通过硅-硅扩散粘结进行连接。在其它实施例中，冷却解决方案230可通过包括凸点或连接焊盘的凸点焊接技术附连到管芯270。在各种实施例中，管芯270的有源表面可朝向冷却解决方案230，或者管芯270的有源表面可避开冷却解决方案230。在一个实施例中，管芯270可包括导电通孔(未示出)，以便提供通过管芯270的电布线。在一个实施例中，冷却解决方案230可包括粘结焊盘或凸点，以帮助连接到管芯270。
管芯220和管芯270可包括任何适当的管芯、集成电路或芯片。例如，管芯220和管芯270可包括中央处理单元(CPU)、动态随机存取存储器(DRAM)、模拟器件或闪存管芯的任何组合。在一个实施例中，管芯220和管芯270均可包括CPU。在另一个实施例中，管芯220可包括CPU，而管芯270可包括DRAM管芯。在一个实施例中，管芯220可包括减薄的管芯。在另一个实施例中，管芯270可包括减薄的管芯。
此外，任何数量的附加管芯或者与冷却解决方案230类似的冷却解决方案可以任何布置堆叠在管芯270之上。堆叠在管芯270之上的管芯可包括CPU、DRAM、模拟器件或闪存的任何组合。在一个实施例中，管芯220可包括CPU，管芯270可包括DRAM，并且闪存和模拟器件可堆叠在管芯270之上。在另一个实施例中，管芯220和管芯270可包括CPU以及包含冷却解决方案的堆叠，并且DRAM管芯可堆叠在管芯270之上。
如上所述，冷却解决方案230包括衬底240、微通道250和通孔260。通孔260可延伸过衬底240，以便提供导电布线。在一个实施例中，通孔260可提供管芯220与管芯270之间的最小长度或直接电布线。通孔260可包括任何适当的导电材料或者这类材料的组合。在一个实施例中，通孔260可包含铜。衬底240可包括任何适当的材料。在一个实施例中，衬底240可包括硅，并且通孔260可以是直通硅通路(TSV)。
微通道250可在衬底240内为冷却剂(未示出)提供一个基本上封闭的区域。在一个实施例中，冷却剂可流过微通道250，以便从管芯220和管芯270去除热量。在一个实施例中，可提供单个微通道。单个微通道可基本上贯穿整个衬底240。在其它实施例中，可提供任何数量的分立微通道。在一个实施例中，微通道250可设计成符合管芯220、管芯270或者两者的除热需求。在一个实施例中，微通道250可对需要更大除热的管芯220或管芯270的区域、诸如热点提供更多微通道或通道区。
如图2B所示，可与微通道250一起提供输入/输出280。可根据需要提供任何数量的输入/输出。例如，如果使用单个微通道，则可使用单个或多个输入/输出。如果使用多个分立的微通道，则可为每个微通道提供至少一个输入/输出。
冷却剂可包括可除热的任何适当材料。在一个实施例中，冷却剂可包括液体。在一个实施例中，冷却剂可包括两相流动冷却剂。在一个实施例中，冷却剂可在冷却解决方案230与可冷却或冷凝冷却剂的一个或多个外部热交换器之间流动。
图3A-3H示出一种可提供根据本发明的冷却解决方案的方法。
图3A示出起始衬底300。衬底300可包括任何适当材料。在一个实施例中，衬底300可包括硅。在一个实施例中，衬底300可以是晶片。在另一个实施例中，衬底300可以是晶片的一部分或芯片。
如图3B所示，可在衬底300中形成开口310和开口320。在一个实施例中，开口310随后可形成微通道，而开口320随后可形成通孔，这在下面进一步论述。
开口310可以为任何适当宽度。在一个实施例中，开口310可具有大约5到10微米范围的宽度。在另一个实施例中，开口310可具有大约6到8微米范围的宽度。在一个实施例中，开口310可具有大约7到10微米范围的宽度。开口310还可具有任何适当的深度，只要它们比开口320浅。因此，开口310可被认为是浅开口，而开口320可被认为是深开口。在一个实施例中，开口310可具有大约50到100微米范围的深度。在另一个实施例中，开口310可具有大约60到80微米范围的深度。在一个实施例中，开口310可具有大约75到100微米范围的深度。
开口310可形成供给微通道的图案，该微通道基本上贯穿或穿过整个衬底300或者衬底300的一部分。例如，如果衬底300是芯片或管芯，则开口310可形成基本上贯穿整个衬底300的图案。在另一个实施例中，如果衬底300是晶片，则开口310可形成用于几个微通道布局的图案，其中每个微通道布局对应于一个管芯，使得该晶片可对准集成电路的晶片(图3G)，以为各集成电路提供微通道布局。在另一个实施例中，开口310可形成为芯片或管芯提供多个分立微通道的图案。
开口320可具有任何尺寸，并且可符合3D体系结构的通孔的期望图案。在一个实施例中，当由上向下看时，开口320可具有一般圆形或椭圆形。开口320可具有任何深度。在一个实施例中，开口320的深度可在大约100到150微米范围内。在另一个实施例中，开口320的深度可在大约80到120微米范围内。在一个实施例中，开口320的深度可在大约50到100微米范围内。
在一个实施例中，开口320的深度可大于开口310的深度。在一个实施例中，开口320可比开口310深大约5到10微米。在另一个实施例中，开口320可比开口310深大约2到8微米。在一个实施例中，开口320可比开口310深大约10到20微米。在另一个实施例中，开口320可贯穿衬底300。
开口310和开口320可通过任何适当的技术形成。在一个实施例中，它们可通过两个光刻和蚀刻步骤形成。在一个实施例中，开口310和开口320可通过以下步骤形成：在衬底300上形成抗蚀图案，蚀刻衬底300的暴露部分以形成开口310或开口320，去除第一抗蚀图案，在衬底310上形成第二抗蚀图案，蚀刻衬底300的暴露部分以形成其余开口，以及去除第二抗蚀图案。
图3C示出第二起始衬底330。衬底330可包括任何适当的材料。在一个实施例中，衬底330可包括硅。在一个实施例中，衬底330可以是晶片。在另一个实施例中，衬底330可以是晶片的一部分或芯片。
如图3D所示，可在衬底330中形成开口340。在一个实施例中，其中一些开口340随后可形成一部分通孔。在一个实施例中，其中一些开口340随后可形成微通道的输入/输出。
开口340可具有任何适当的深度和宽度。在一个实施例中，开口340可具有对应于开口320的图案和尺寸的图案。开口340可通过任何适当的技术形成。在一个实施例中，它们可通过光刻和蚀刻形成。在一个实施例中，开口340可通过以下步骤形成：在衬底330上形成抗蚀图案，蚀刻衬底330的暴露部分以形成任一个开口340，以及去除抗蚀图案。在一个实施例中，开口340可贯穿衬底330。
如图3E所示，可对准和粘结衬底300和330。衬底300和330可通过任何适当的技术来对准和粘结。在一个实施例中，可对准衬底300和330，使得开口320和340基本上对准。在一个实施例中，多个开口340可与开口310对准，使得可形成微通道的输入和输出(为了清楚起见，这种对准在图3E中未示出)。在一个实施例中，衬底300和330可通过扩散粘结进行粘结。在另一个实施例中，衬底300和330可包括硅，并且它们可通过硅-硅扩散粘结进行粘结。在其它实施例中，可使用粘合剂或环氧树脂来粘结衬底300和330。
如图3F所示，可减薄衬底300和330以形成装置335。在所示的截面看来，衬底已经分开了；但是，衬底可能保持连续，如在其它可得到的截面示出的。图3F还示出通孔350的形成。在图3F中，为了清楚起见，未示出衬底300与330之间的任何接缝。衬底300和330可通过任何适当的技术、如背面研磨技术来减薄。
在所示的实施例中，粘结示为在减薄之前。但是，如果需要的话，减薄也可在粘结之前执行。在一个实施例中，衬底300可在粘结之前减薄。在另一个实施例中，衬底330可在粘结之前减薄。在一个实施例中，衬底300和330二者都可在粘结之前减薄。在另一个实施例中，可不需要减薄任一个衬底或两个衬底。
如图3G所示，装置335可对准并粘结到衬底360。衬底360可包括通孔370和凸点380。在一个实施例中，衬底360可包括芯片或管芯。在一个实施例中，衬底360可包括集成电路。在一些实施例中，衬底360可包括CPU、DRAM、模拟器件或闪存器件。在另一个实施例中，衬底360可包括集成电路的晶片。在另一个实施例中，装置335可对准衬底360，使得一些通孔350与一些通孔370对准。在各种实施例中，衬底360的有源表面可朝向装置335，或者有源表面可避开装置335。
如图3H所示，可形成导电通孔390。导电通孔390可包括任何适当的导电材料。在一个实施例中，导电通孔390可包括铜。导电通孔390可通过例如溅射、化学或物理汽相沉积、电镀、无电镀等任何适当的技术形成。
如图所示，装置335可粘结到衬底，并且可形成导电通孔。在其它实施例中，在形成导电通孔390之前装置335可不粘结到衬底。在一个实施例中，可在装置335中形成导电通孔390(图3F)，以形成具有微通道和导电通孔的装置。以该方式形成的装置可通过例如扩散粘结或凸点焊接粘结等任何适当技术附连到管芯或多个管芯。
如图3I所示，装置335可对准并粘结到衬底410。衬底410可包括通孔420。在一个实施例中，衬底410可包括芯片或管芯。在一个实施例中，衬底410可包括集成电路。在一些实施例中，衬底410可包括CPU、DRAM、模拟器件或闪存器件。在另一个实施例中，衬底410可包括集成电路的晶片。在另一个实施例中，装置335可对准衬底400，使得一些通孔420与一些通孔370对准。在一个实施例中，衬底410可通过扩散粘结进行粘结。在一个实施例中，衬底410可通过凸点焊接粘结进行附连。在一个实施例中，可在衬底410、装置330或者它们两者上形成凸点，以便于粘结。在各种实施例中，衬底410的有源表面可朝向装置335，或者有源表面可避开装置335。
如果以上技术与具有分立集成电路组件和微通道冷却解决方案的晶片一起使用，则图3H或图3I的实施例可被切割成小片，以形成各个管芯和冷却解决方案组件。
本说明书中提到“一个实施例”或“实施例”是指结合该实施例所述的具体特征、结构、材料或特性包含在本发明的至少一个实施例中。因此，在本说明书中各种位置出现的短语“在一个实施例中”或“在实施例中”不一定指的是本发明的同一实施例。此外，具体特征、结构、材料或特性可通过任何适当方式结合在一个或多个实施例中。
要理解，以上描述是说明性而非限制性的。对于本领域的技术人员，在阅读了以上描述后，许多其它实施例是显然的。因此，应当参照所附权利要求书，连同这种权利要求书赋予权利的等效方案的整个范围一起来确定本发明的范围。

Claims (20)

1.一种用于从管芯除热的装置，包括：
衬底，包含用于冷却剂的基本上封闭的微通道；以及
导电通路，贯穿所述衬底。
2.如权利要求1所述的装置，其中所述微通道包括输入和输出。
3.如权利要求1所述的装置，其中所述衬底包括用于第二冷却剂的第二微通道。
4.如权利要求1所述的装置，其中所述微通道的宽度在大约5到10微米的范围，而高度在大约50到100微米的范围。
5.一种装置，包括：
集成电路管芯，包含通孔；以及
衬底，附连到所述集成电路管芯，其中所述衬底包括第二通孔和基本上封闭的微通道，以从所述集成电路管芯除热。
6.如权利要求5所述的装置，其中所述集成电路管芯和所述衬底通过硅-硅粘结剂进行粘结。
7.如权利要求5所述的装置，其中所述衬底与所述集成电路管芯的有源表面相对。
8.如权利要求7所述的装置，还包括：
第二衬底，电连接到所述集成电路管芯的所述有源表面。
9.如权利要求7所述的装置，还包括：
第二集成电路管芯，附连到所述衬底。
10.如权利要求9所述的装置，其中所述集成电路管芯包括中央处理单元，而所述第二集成电路管芯包括第二中央处理单元。
11.如权利要求9所述的装置，其中所述集成电路管芯包括中央处理单元，而所述第二集成电路管芯包括动态随机存取存储器。
12.如权利要求11所述的装置，还包括：闪存组件，附连到所述第二集成电路管芯，其中所述第二集成电路管芯包括第三通孔。
13.一种方法，包括：
在衬底中形成深开口和浅开口；
在第二衬底中形成开口；
粘结所述衬底和所述第二衬底，其中所述深开口和所述开口基本上对准；
减薄所述衬底；以及
在所述深开口和所述开口中形成导电通孔。
14.如权利要求13所述的方法，还包括：
减薄所述第二衬底。
15.如权利要求13所述的方法，其中所述第二衬底中的所述开口贯穿所述第二衬底。
16.如权利要求13所述的方法，其中所述衬底和所述第二衬底包括硅，并且其中粘结所述衬底和所述第二衬底包括硅-硅扩散粘结。
17.如权利要求13所述的方法，还包括：
切割所述衬底和所述第二衬底，其中所述衬底和所述第二衬底包括晶片。
18.如权利要求13所述的方法，其中在所述衬底中形成所述深开口和所述浅开口包括：
在所述衬底上形成第一图案；
蚀刻所述衬底由所述第一图案暴露的部分，以形成所述深开口；
在所述衬底上形成第二图案；以及
蚀刻所述衬底由所述第二图案暴露的部分，以形成所述浅开口。
19.如权利要求13所述的方法，还包括：
将所粘结的衬底和第二衬底安装到第三衬底，其中所述第三衬底包括集成电路和第二导电通孔。
20.如权利要求13所述的方法，其中在所述衬底中形成所述深开口和所述浅开口包括形成第二浅开口，其中在所述第二衬底中形成所述开口包括在所述第二衬底中形成第二开口，并且其中粘结所述衬底和所述第二衬底对准所述第二浅开口和所述第二开口，以形成微通道的输入。
CN2006800374412A 2005-10-13 2006-10-06 3d直通硅体系结构的集成微通道 Expired - Fee Related CN101283450B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/250,644 US7432592B2 (en) 2005-10-13 2005-10-13 Integrated micro-channels for 3D through silicon architectures
US11/250,644 2005-10-13
PCT/US2006/039246 WO2007044577A1 (en) 2005-10-13 2006-10-06 Integrated micro-channels for 3d through silicon architectures

Publications (2)

Publication Number Publication Date
CN101283450A true CN101283450A (zh) 2008-10-08
CN101283450B CN101283450B (zh) 2012-05-02

Family

ID=37680676

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800374412A Expired - Fee Related CN101283450B (zh) 2005-10-13 2006-10-06 3d直通硅体系结构的集成微通道

Country Status (6)

Country Link
US (2) US7432592B2 (zh)
JP (1) JP5114414B2 (zh)
CN (1) CN101283450B (zh)
DE (1) DE112006002686T5 (zh)
TW (1) TWI371837B (zh)
WO (1) WO2007044577A1 (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199086B (zh) * 2013-03-19 2015-10-28 华进半导体封装先导技术研发中心有限公司 具有带屏蔽功能的微流道结构的硅基转接板及其制作方法
CN108666283A (zh) * 2018-05-03 2018-10-16 中国电子科技集团公司第二十九研究所 一种微通道散热器结构及其制备方法
CN111653489A (zh) * 2019-09-24 2020-09-11 浙江集迈科微电子有限公司 一种基于多层散热结构的三维射频模组制作方法
CN112614785A (zh) * 2020-12-17 2021-04-06 上海先方半导体有限公司 集成微流道的三维封装结构及封装方法
WO2022227189A1 (zh) * 2021-04-26 2022-11-03 武汉新芯集成电路制造有限公司 三维集成电路模块及制作方法

Families Citing this family (188)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7432592B2 (en) * 2005-10-13 2008-10-07 Intel Corporation Integrated micro-channels for 3D through silicon architectures
US20070158807A1 (en) * 2005-12-29 2007-07-12 Daoqiang Lu Edge interconnects for die stacking
JP2008159619A (ja) * 2006-12-20 2008-07-10 Shinko Electric Ind Co Ltd 半導体装置
US8232183B2 (en) * 2007-05-04 2012-07-31 Taiwan Semiconductor Manufacturing Company, Ltd. Process and apparatus for wafer-level flip-chip assembly
TWI341554B (en) * 2007-08-02 2011-05-01 Enthone Copper metallization of through silicon via
US8035223B2 (en) * 2007-08-28 2011-10-11 Research Triangle Institute Structure and process for electrical interconnect and thermal management
US7738249B2 (en) * 2007-10-25 2010-06-15 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal cooling structure and electrical assembly utilizing same
US8106505B2 (en) 2007-10-31 2012-01-31 International Business Machines Corporation Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly
US8492263B2 (en) * 2007-11-16 2013-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Protected solder ball joints in wafer level chip-scale packaging
US7786584B2 (en) * 2007-11-26 2010-08-31 Infineon Technologies Ag Through substrate via semiconductor components
JP2009147175A (ja) * 2007-12-14 2009-07-02 Shinko Electric Ind Co Ltd 発光装置及び車両用前照灯
KR101420817B1 (ko) 2008-01-15 2014-07-21 삼성전자주식회사 3 차원의 직렬 및 병렬 회로들을 가지고 차례로 적층된집적회로 모듈들을 전기적으로 접속하는 반도체 집적회로장치 및 그 장치의 형성방법
US7821107B2 (en) * 2008-04-22 2010-10-26 Micron Technology, Inc. Die stacking with an annular via having a recessed socket
US8154134B2 (en) * 2008-05-12 2012-04-10 Texas Instruments Incorporated Packaged electronic devices with face-up die having TSV connection to leads and die pad
US7772123B2 (en) 2008-06-06 2010-08-10 Infineon Technologies Ag Through substrate via semiconductor components
US8334170B2 (en) * 2008-06-27 2012-12-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method for stacking devices
US7851346B2 (en) * 2008-07-21 2010-12-14 Taiwan Semiconductor Manufacturing Company, Ltd. Bonding metallurgy for three-dimensional interconnect
US8932906B2 (en) 2008-08-19 2015-01-13 Taiwan Semiconductor Manufacturing Company, Ltd. Through silicon via bonding structure
US8014166B2 (en) * 2008-09-06 2011-09-06 Broadpak Corporation Stacking integrated circuits containing serializer and deserializer blocks using through silicon via
US9524945B2 (en) 2010-05-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with L-shaped non-metal sidewall protection structure
WO2011149965A2 (en) 2010-05-24 2011-12-01 Enthone Inc. Copper filling of through silicon vias
US7943421B2 (en) * 2008-12-05 2011-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Component stacking using pre-formed adhesive films
TWI460838B (zh) * 2008-12-08 2014-11-11 United Microelectronics Corp 半導體結構
US8518822B2 (en) * 2009-03-25 2013-08-27 Stats Chippac Ltd. Integrated circuit packaging system with multi-stacked flip chips and method of manufacture thereof
US9117828B2 (en) * 2009-03-27 2015-08-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of handling a thin wafer
US20120099274A1 (en) * 2009-07-10 2012-04-26 Coolsilicon Llc Devices and methods providing for intra-die cooling structure reservoirs
TWI396265B (zh) * 2009-07-21 2013-05-11 Powertech Technology Inc 晶片封裝結構及其方法
US8841766B2 (en) 2009-07-30 2014-09-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
US8377816B2 (en) 2009-07-30 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming electrical connections
US8324738B2 (en) 2009-09-01 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned protection layer for copper post structure
US8803332B2 (en) * 2009-09-11 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. Delamination resistance of stacked dies in die saw
US8522569B2 (en) * 2009-10-27 2013-09-03 Industrial Idea Partners, Inc. Utilization of data center waste heat for heat driven engine
US8659155B2 (en) 2009-11-05 2014-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming copper pillar bumps
US8247895B2 (en) * 2010-01-08 2012-08-21 International Business Machines Corporation 4D device process and structure
US8299616B2 (en) * 2010-01-29 2012-10-30 Taiwan Semiconductor Manufacturing Company, Ltd. T-shaped post for semiconductor devices
US10297550B2 (en) 2010-02-05 2019-05-21 Taiwan Semiconductor Manufacturing Company, Ltd. 3D IC architecture with interposer and interconnect structure for bonding dies
US8610270B2 (en) * 2010-02-09 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and semiconductor assembly with lead-free solder
US8803319B2 (en) 2010-02-11 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. Pillar structure having a non-planar surface for semiconductor devices
US8318596B2 (en) 2010-02-11 2012-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Pillar structure having a non-planar surface for semiconductor devices
US7990711B1 (en) * 2010-02-24 2011-08-02 International Business Machines Corporation Double-face heat removal of vertically integrated chip-stacks utilizing combined symmetric silicon carrier fluid cavity and micro-channel cold plate
US9385095B2 (en) 2010-02-26 2016-07-05 Taiwan Semiconductor Manufacturing Company, Ltd. 3D semiconductor package interposer with die cavity
US8519537B2 (en) * 2010-02-26 2013-08-27 Taiwan Semiconductor Manufacturing Company, Ltd. 3D semiconductor package interposer with die cavity
US10181454B2 (en) * 2010-03-03 2019-01-15 Ati Technologies Ulc Dummy TSV to improve process uniformity and heat dissipation
US8378480B2 (en) * 2010-03-04 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy wafers in 3DIC package assemblies
US8587121B2 (en) * 2010-03-24 2013-11-19 International Business Machines Corporation Backside dummy plugs for 3D integration
US8455995B2 (en) 2010-04-16 2013-06-04 Taiwan Semiconductor Manufacturing Company, Ltd. TSVs with different sizes in interposers for bonding dies
US8441124B2 (en) 2010-04-29 2013-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
US9431316B2 (en) * 2010-05-04 2016-08-30 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation
US8716867B2 (en) 2010-05-12 2014-05-06 Taiwan Semiconductor Manufacturing Company, Ltd. Forming interconnect structures using pre-ink-printed sheets
US8674513B2 (en) 2010-05-13 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures for substrate
US9142533B2 (en) 2010-05-20 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate interconnections having different sizes
US8901736B2 (en) 2010-05-28 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Strength of micro-bump joints
FR2961017B1 (fr) 2010-06-02 2013-10-11 Commissariat Energie Atomique Puce electronique, composants electroniques et bras de commutation incorporant cette puce electronique
US9018758B2 (en) 2010-06-02 2015-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall spacer and metal top cap
US8426961B2 (en) 2010-06-25 2013-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded 3D interposer structure
US8241963B2 (en) 2010-07-13 2012-08-14 Taiwan Semiconductor Manufacturing Company, Ltd. Recessed pillar structure
US8492911B2 (en) 2010-07-20 2013-07-23 Lsi Corporation Stacked interconnect heat sink
US8581418B2 (en) 2010-07-21 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-die stacking using bumps with different sizes
US8629568B2 (en) 2010-07-30 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device cover mark
US8540506B2 (en) 2010-08-16 2013-09-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor molding chamber
US8546254B2 (en) 2010-08-19 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming copper pillar bumps using patterned anodes
US8541262B2 (en) 2010-09-02 2013-09-24 Taiwan Semiconductor Manufacturing Company, Ltd. Die edge contacts for semiconductor devices
US9343436B2 (en) 2010-09-09 2016-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Stacked package and method of manufacturing the same
US8936966B2 (en) 2012-02-08 2015-01-20 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging methods for semiconductor devices
US8105875B1 (en) 2010-10-14 2012-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Approach for bonding dies onto interposers
US9064879B2 (en) 2010-10-14 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging methods and structures using a die attach film
JP5740903B2 (ja) * 2010-10-19 2015-07-01 富士通株式会社 電子装置、半導体装置、サーマルインターポーザ及びその製造方法
US8338945B2 (en) 2010-10-26 2012-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Molded chip interposer structure and methods
TW201225246A (en) 2010-12-06 2012-06-16 Ind Tech Res Inst Multi-chip stack structure
US8797057B2 (en) * 2011-02-11 2014-08-05 Taiwan Semiconductor Manufacturing Company, Ltd. Testing of semiconductor chips with microbumps
US8563365B2 (en) * 2011-03-09 2013-10-22 Georgia Tech Research Corporation Air-gap C4 fluidic I/O interconnects and methods of fabricating same
US8519515B2 (en) 2011-04-13 2013-08-27 United Microlectronics Corp. TSV structure and method for forming the same
US8481425B2 (en) 2011-05-16 2013-07-09 United Microelectronics Corp. Method for fabricating through-silicon via structure
US8610285B2 (en) 2011-05-30 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. 3D IC packaging structures and methods with a metal pillar
US8664760B2 (en) 2011-05-30 2014-03-04 Taiwan Semiconductor Manufacturing Company, Ltd. Connector design for packaging integrated circuits
US8822336B2 (en) 2011-06-16 2014-09-02 United Microelectronics Corp. Through-silicon via forming method
JP2013033914A (ja) * 2011-06-27 2013-02-14 Toshiba Corp 半導体装置
US8501590B2 (en) 2011-07-05 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and methods for dicing interposer assembly
US8580683B2 (en) 2011-09-27 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and methods for molding die on wafer interposers
US8828745B2 (en) 2011-07-06 2014-09-09 United Microelectronics Corp. Method for manufacturing through-silicon via
US8476770B2 (en) 2011-07-07 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and methods for forming through vias
US8647796B2 (en) 2011-07-27 2014-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Photoactive compound gradient photoresist
US20130040423A1 (en) 2011-08-10 2013-02-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of Multi-Chip Wafer Level Packaging
US8754514B2 (en) 2011-08-10 2014-06-17 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-chip wafer level package
US8557684B2 (en) 2011-08-23 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional integrated circuit (3DIC) formation process
US8963334B2 (en) 2011-08-30 2015-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Die-to-die gap control for semiconductor structure and method
US8531032B2 (en) 2011-09-02 2013-09-10 Taiwan Semiconductor Manufacturing Company, Ltd. Thermally enhanced structure for multi-chip device
US9245773B2 (en) 2011-09-02 2016-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packaging methods and structures thereof
US9530761B2 (en) 2011-09-02 2016-12-27 Taiwan Semiconductor Manufacturing Company, Ltd. Package systems including passive electrical components
US9390060B2 (en) 2011-09-02 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging methods, material dispensing methods and apparatuses, and automated measurement systems
US9418876B2 (en) 2011-09-02 2016-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method of three dimensional integrated circuit assembly
US9219016B2 (en) 2011-09-28 2015-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Structure design for 3DIC testing
US10475759B2 (en) 2011-10-11 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure having dies with connectors of different sizes
US8878182B2 (en) 2011-10-12 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Probe pad design for 3DIC package yield analysis
US8518753B2 (en) 2011-11-15 2013-08-27 Taiwan Semiconductor Manufacturing Company, Ltd. Assembly method for three dimensional integrated circuit
US8779599B2 (en) 2011-11-16 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Packages including active dies and dummy dies and methods for forming the same
US8759118B2 (en) 2011-11-16 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Plating process and structure
US8629043B2 (en) 2011-11-16 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for de-bonding carriers
US8772929B2 (en) 2011-11-16 2014-07-08 Taiwan Semiconductor Manufacturing Company, Ltd. Package for three dimensional integrated circuit
US8779588B2 (en) 2011-11-29 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structures for multi-chip packaging
US8643148B2 (en) 2011-11-30 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-Wafer structures and methods for forming the same
US8653658B2 (en) 2011-11-30 2014-02-18 Taiwan Semiconductor Manufacturing Company, Ltd. Planarized bumps for underfill control
US8557631B2 (en) 2011-12-01 2013-10-15 Taiwan Semiconductor Manufacturing Co., Ltd. Interposer wafer bonding method and apparatus
US8536573B2 (en) 2011-12-02 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Plating process and structure
US8558229B2 (en) 2011-12-07 2013-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Passivation layer for packaged chip
US8828848B2 (en) 2011-12-16 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Die structure and method of fabrication thereof
US8518823B2 (en) 2011-12-23 2013-08-27 United Microelectronics Corp. Through silicon via and method of forming the same
US8871568B2 (en) 2012-01-06 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Packages and method of forming the same
US8518796B2 (en) 2012-01-09 2013-08-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor die connection system and method
US8691706B2 (en) 2012-01-12 2014-04-08 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing substrate warpage in semiconductor processing
US9620430B2 (en) 2012-01-23 2017-04-11 Taiwan Semiconductor Manufacturing Company, Ltd. Sawing underfill in packaging processes
US8698308B2 (en) 2012-01-31 2014-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structural designs to minimize package defects
US8609529B2 (en) 2012-02-01 2013-12-17 United Microelectronics Corp. Fabrication method and structure of through silicon via
US9406500B2 (en) 2012-02-08 2016-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Flux residue cleaning system and method
US9230932B2 (en) 2012-02-09 2016-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect crack arrestor structure and methods
US8975183B2 (en) 2012-02-10 2015-03-10 Taiwan Semiconductor Manufacturing Co., Ltd. Process for forming semiconductor structure
US8816495B2 (en) 2012-02-16 2014-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Structures and formation methods of packages with heat sinks
US8900922B2 (en) 2012-02-16 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Fine-pitch package-on-package structures and methods for forming the same
US9646942B2 (en) 2012-02-23 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for controlling bump height variation
JP5849777B2 (ja) * 2012-03-02 2016-02-03 富士通株式会社 半導体装置、冷却システム、及び、半導体装置の製造方法
US8953336B2 (en) 2012-03-06 2015-02-10 Taiwan Semiconductor Manufacturing Co., Ltd. Surface metal wiring structure for an IC substrate
US8962392B2 (en) 2012-03-13 2015-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Underfill curing method using carrier
US9006004B2 (en) 2012-03-23 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Probing chips during package formation
US9034695B2 (en) 2012-04-11 2015-05-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated thermal solutions for packaging integrated circuits
US9391000B2 (en) 2012-04-11 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming silicon-based hermetic thermal solutions
US9425136B2 (en) 2012-04-17 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Conical-shaped or tier-shaped pillar connections
US9646923B2 (en) 2012-04-17 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices
US9299674B2 (en) 2012-04-18 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Bump-on-trace interconnect
US9515036B2 (en) 2012-04-20 2016-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for solder connections
US8741691B2 (en) 2012-04-20 2014-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating three dimensional integrated circuit
JP5980556B2 (ja) * 2012-04-27 2016-08-31 ルネサスエレクトロニクス株式会社 半導体装置
US8691600B2 (en) 2012-05-02 2014-04-08 United Microelectronics Corp. Method for testing through-silicon-via (TSV) structures
US9576830B2 (en) 2012-05-18 2017-02-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for adjusting wafer warpage
US9583365B2 (en) 2012-05-25 2017-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming interconnects for three dimensional integrated circuit
US8691688B2 (en) 2012-06-18 2014-04-08 United Microelectronics Corp. Method of manufacturing semiconductor structure
US9275933B2 (en) 2012-06-19 2016-03-01 United Microelectronics Corp. Semiconductor device
US8900996B2 (en) 2012-06-21 2014-12-02 United Microelectronics Corp. Through silicon via structure and method of fabricating the same
US8525296B1 (en) 2012-06-26 2013-09-03 United Microelectronics Corp. Capacitor structure and method of forming the same
US9035452B2 (en) * 2012-08-07 2015-05-19 General Electric Company Electronic device cooling with autonomous fluid routing and method of assembly
US8970035B2 (en) 2012-08-31 2015-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structures for semiconductor package
US9111817B2 (en) 2012-09-18 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure and method of forming same
US8628990B1 (en) 2012-09-27 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Image device and methods of forming the same
US8912844B2 (en) 2012-10-09 2014-12-16 United Microelectronics Corp. Semiconductor structure and method for reducing noise therein
US9035457B2 (en) 2012-11-29 2015-05-19 United Microelectronics Corp. Substrate with integrated passive devices and method of manufacturing the same
US8912643B2 (en) 2012-12-10 2014-12-16 General Electric Company Electronic device cooling with microjet impingement and method of assembly
US8716104B1 (en) 2012-12-20 2014-05-06 United Microelectronics Corp. Method of fabricating isolation structure
CN203243595U (zh) * 2013-03-07 2013-10-16 杭州华三通信技术有限公司 一种pcb结构
US9646894B2 (en) 2013-03-15 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging mechanisms for dies with different sizes of connectors
US9070644B2 (en) 2013-03-15 2015-06-30 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging mechanisms for dies with different sizes of connectors
JP6083516B2 (ja) * 2013-03-28 2017-02-22 富士通株式会社 マイクロチャネル熱交換装置及び電子機器
US8884398B2 (en) 2013-04-01 2014-11-11 United Microelectronics Corp. Anti-fuse structure and programming method thereof
US9269603B2 (en) * 2013-05-09 2016-02-23 Globalfoundries Inc. Temporary liquid thermal interface material for surface tension adhesion and thermal control
US9287173B2 (en) 2013-05-23 2016-03-15 United Microelectronics Corp. Through silicon via and process thereof
US9123730B2 (en) 2013-07-11 2015-09-01 United Microelectronics Corp. Semiconductor device having through silicon trench shielding structure surrounding RF circuit
US9024416B2 (en) 2013-08-12 2015-05-05 United Microelectronics Corp. Semiconductor structure
US8916471B1 (en) 2013-08-26 2014-12-23 United Microelectronics Corp. Method for forming semiconductor structure having through silicon via for signal and shielding structure
US9048223B2 (en) 2013-09-03 2015-06-02 United Microelectronics Corp. Package structure having silicon through vias connected to ground potential
US20150069618A1 (en) * 2013-09-11 2015-03-12 Innovative Micro Technology Method for forming through wafer vias
US9117804B2 (en) 2013-09-13 2015-08-25 United Microelectronics Corporation Interposer structure and manufacturing method thereof
US9343359B2 (en) 2013-12-25 2016-05-17 United Microelectronics Corp. Integrated structure and method for fabricating the same
US9449896B2 (en) 2014-01-13 2016-09-20 Stmicroelectronics Sa Device comprising a three-dimensional integrated structure with simplified thermal dissipation, and corresponding fabrication method
US10340203B2 (en) 2014-02-07 2019-07-02 United Microelectronics Corp. Semiconductor structure with through silicon via and method for fabricating and testing the same
US9768090B2 (en) 2014-02-14 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US9653443B2 (en) 2014-02-14 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal performance structure for semiconductor packages and method of forming same
US9935090B2 (en) 2014-02-14 2018-04-03 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US10056267B2 (en) 2014-02-14 2018-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US10026671B2 (en) 2014-02-14 2018-07-17 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
FR3018631B1 (fr) 2014-03-11 2016-04-29 St Microelectronics Sa Caloduc et son procede de fabrication
JP6430153B2 (ja) * 2014-06-10 2018-11-28 国立研究開発法人産業技術総合研究所 半導体装置、インターポーザ及びその製造方法
US9484328B2 (en) 2014-08-01 2016-11-01 Empire Technology Development Llc Backside through silicon vias and micro-channels in three dimensional integration
TWI710671B (zh) 2014-09-15 2020-11-21 美商麥德美樂思公司 微電子技術中銅沈積用之平整劑
US9564416B2 (en) 2015-02-13 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Package structures and methods of forming the same
US9439330B1 (en) * 2015-03-29 2016-09-06 Banqiu Wu 3D IC computer system
US9613931B2 (en) 2015-04-30 2017-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out stacked system in package (SIP) having dummy dies and methods of making the same
WO2017059382A1 (en) 2015-09-30 2017-04-06 Microfabrica Inc. Micro heat transfer arrays, micro cold plates, and thermal management systems for cooling semiconductor devices, and methods for using and making such arrays, plates, and systems
KR102059610B1 (ko) * 2015-12-18 2019-12-26 주식회사 엘지화학 고전도성 방열 패드를 이용한 인쇄회로기판의 방열 시스템
US9818726B2 (en) 2015-12-28 2017-11-14 International Business Machines Corporation Chip stack cooling structure
US10096537B1 (en) 2015-12-31 2018-10-09 Microfabrica Inc. Thermal management systems, methods for making, and methods for using
US10032694B2 (en) 2016-03-08 2018-07-24 Toyota Motor Engineering & Manufacturing North America, Inc Power electronics assemblies having a semiconductor cooling chip and an integrated fluid channel system
US10231364B2 (en) 2016-10-24 2019-03-12 Toyota Motor Engineering & Manufacturing North America, Inc. Fluidly cooled power electronics assemblies having a thermo-electric generator
US10566265B2 (en) 2016-11-18 2020-02-18 Toyota Motor Engineering & Manufacturing North America, Inc. Electronic assemblies having a cooling chip layer with impingement channels and through substrate vias
US10192814B2 (en) 2016-11-18 2019-01-29 Toyota Motor Engineering & Manufacturing North America, Inc. Electronic assemblies having a cooling chip layer with fluid channels and through substrate vias
US10615100B2 (en) 2016-12-08 2020-04-07 Toyota Motor Engineering & Manufacturing North America, Inc. Electronics assemblies and cooling structures having metalized exterior surface
WO2019146039A1 (ja) * 2018-01-25 2019-08-01 ソフトバンク株式会社 三次元積層集積回路の冷媒による冷却方式と、それを用いた三次元積層集積回路
JP6404515B1 (ja) * 2018-03-19 2018-10-10 株式会社パラット 半田付け装置、および半田付け装置用ノズル
CN112806112A (zh) 2019-02-07 2021-05-14 慧与发展有限责任合伙企业 光蚀刻机壳冷却壁
US11081424B2 (en) 2019-06-18 2021-08-03 International Business Machines Corporation Micro-fluidic channels having various critical dimensions
KR102553024B1 (ko) * 2021-07-26 2023-07-11 한국과학기술원 반도체 패키지

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0728000B2 (ja) * 1985-07-10 1995-03-29 株式会社日立製作所 冷却兼信号接続基板およびその製造方法、並びに半導体集積回路装置
JPS6453440A (en) * 1987-08-25 1989-03-01 Hitachi Ltd Three-dimensional semiconductor integrated circuit device
JPH0724294B2 (ja) * 1987-09-29 1995-03-15 株式会社日立製作所 半導体実装冷却構造体
JPH02121355A (ja) * 1988-10-28 1990-05-09 Shimadzu Corp セラミックス多層基板
DE59101555D1 (de) * 1990-08-03 1994-06-09 Siemens Nixdorf Inf Syst Einbausystem für elektrische Funktionseinheiten insbesondere für die Datentechnik.
JP2622038B2 (ja) * 1991-06-03 1997-06-18 シャープ株式会社 半導体装置及びその製造方法
US5199165A (en) * 1991-12-13 1993-04-06 Hewlett-Packard Company Heat pipe-electrical interconnect integration method for chip modules
JP3528375B2 (ja) * 1994-11-30 2004-05-17 住友電気工業株式会社 基板およびこれを用いた放熱基板、半導体装置、素子搭載装置
US5682062A (en) * 1995-06-05 1997-10-28 Harris Corporation System for interconnecting stacked integrated circuits
CN1057424C (zh) * 1996-02-29 2000-10-11 中国科学院上海光学精密机械研究所 微通道冷却热沉
JP2002176137A (ja) * 2000-09-28 2002-06-21 Toshiba Corp 積層型半導体デバイス
US6582987B2 (en) 2000-12-30 2003-06-24 Electronics And Telecommunications Research Institute Method of fabricating microchannel array structure embedded in silicon substrate
US6627980B2 (en) * 2001-04-12 2003-09-30 Formfactor, Inc. Stacked semiconductor device assembly with microelectronic spring contacts
US6606251B1 (en) * 2002-02-07 2003-08-12 Cooligy Inc. Power conditioning module
US20050211418A1 (en) * 2002-11-01 2005-09-29 Cooligy, Inc. Method and apparatus for efficient vertical fluid delivery for cooling a heat producing device
US6992891B2 (en) * 2003-04-02 2006-01-31 Intel Corporation Metal ball attachment of heat dissipation devices
US7355277B2 (en) * 2003-12-31 2008-04-08 Intel Corporation Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package
US7115987B2 (en) * 2003-12-31 2006-10-03 Intel Corporation Integrated stacked microchannel heat exchanger and heat spreader
US7432592B2 (en) * 2005-10-13 2008-10-07 Intel Corporation Integrated micro-channels for 3D through silicon architectures

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199086B (zh) * 2013-03-19 2015-10-28 华进半导体封装先导技术研发中心有限公司 具有带屏蔽功能的微流道结构的硅基转接板及其制作方法
CN108666283A (zh) * 2018-05-03 2018-10-16 中国电子科技集团公司第二十九研究所 一种微通道散热器结构及其制备方法
CN111653489A (zh) * 2019-09-24 2020-09-11 浙江集迈科微电子有限公司 一种基于多层散热结构的三维射频模组制作方法
CN112614785A (zh) * 2020-12-17 2021-04-06 上海先方半导体有限公司 集成微流道的三维封装结构及封装方法
CN112614785B (zh) * 2020-12-17 2023-07-28 上海先方半导体有限公司 集成微流道的三维封装结构及封装方法
WO2022227189A1 (zh) * 2021-04-26 2022-11-03 武汉新芯集成电路制造有限公司 三维集成电路模块及制作方法

Also Published As

Publication number Publication date
CN101283450B (zh) 2012-05-02
JP5114414B2 (ja) 2013-01-09
DE112006002686T5 (de) 2008-10-02
US8012808B2 (en) 2011-09-06
TW200731484A (en) 2007-08-16
TWI371837B (en) 2012-09-01
WO2007044577A1 (en) 2007-04-19
JP2009512215A (ja) 2009-03-19
US20070085198A1 (en) 2007-04-19
US20090201643A1 (en) 2009-08-13
US7432592B2 (en) 2008-10-07

Similar Documents

Publication Publication Date Title
CN101283450A (zh) 3d直通硅体系结构的集成微通道
JP4746283B2 (ja) 回路組立体および集積回路デバイスに放熱器を接続する方法
US8581392B2 (en) Silicon based microchannel cooling and electrical package
US7230334B2 (en) Semiconductor integrated circuit chip packages having integrated microchannel cooling modules
JP3560488B2 (ja) マルチチップ用チップ・スケール・パッケージ
US7098080B2 (en) Method of making a semiconductor package with integrated heat spreader attached to a thermally conductive substrate core
US7230332B2 (en) Chip package with embedded component
JPH0613541A (ja) 積層可能な三次元マルチチップ半導体デバイスとその製法
JP2004221583A (ja) 平衡積層構造（ｂａｌａｎｃｅｄｌａｍｉｎａｔｉｏｎ）を利用したフレックス（ｆｌｅｘ）・ベースのＩＣパッケージ構造
JP2013513942A (ja) 埋め込まれた基板及びリードフレームを備えたモジュールパッケージ
JPH07170098A (ja) 電子部品の実装構造および実装方法
KR20050060966A (ko) 열방출형 적층 패키지 및 그들이 실장된 모듈
US7038309B2 (en) Chip package structure with glass substrate
TWI459512B (zh) 使用相互連接的三維層片將垂直封裝的ｍｏｓｆｅｔ和積體電路功率器件構建成集成模組
JP4047819B2 (ja) Ｂｇａハンダ・ボールによる相互接続部およびその作製方法
JP2006324646A (ja) モジュール基板
TWI435667B (zh) 印刷電路板組件
JP2004087700A (ja) 半導体装置およびその製造方法
JP3093278B2 (ja) 向上したパッド設計による電子パッケージ
CN109872987B (zh) 带有散热结构的系统封装板卡结构及其制作方法
WO2024066124A1 (en) Chip packaging method and chip packaging structure
KR20060081900A (ko) 엠시엠 비지에이 패키지의 설계 방법 및 엠시엠 비지에이패키지
JPH1131713A (ja) フィルムキャリアテープを用いたｂｇａ型半導体装置
KR100990940B1 (ko) 스택 패키지 제조용 기판
KR100207901B1 (ko) 멀티칩 장착용 고방열 패키지의 제조 방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120502

Termination date: 20191006

CF01 Termination of patent right due to non-payment of annual fee