JP4746283B2 - 回路組立体および集積回路デバイスに放熱器を接続する方法 - Google Patents
回路組立体および集積回路デバイスに放熱器を接続する方法 Download PDFInfo
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S29/00—Metal working
- Y10S29/037—Stamping with other step
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
- Y10T29/49135—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting and shaping, e.g., cutting or bending, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
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Description
110 ICパッケージ
120 第1基板
121,127,151 端子パッド
122 相互接続用貫通導体
125 第1表面
126 第2表面
130 IC素子
131 電気の端末
132 第1(活性)表面
133 第2(非活性)表面
134 電気結合器(はんだバンプ)
136 充填材
140,240,340 放熱装置
141,241,341,343 脚部
142 第1伝熱材料
143 第2伝熱材料
145,242 プレート部分
150 プリント回路基板
152 はんだ用ボール
154 貫通導体
342 上部表面
344 底部表面
Claims (12)
- フリップチップ構造で基板に接続された集積回路デバイスに放熱器を接続する方法において、
(a)放熱器プレートおよび複数の脚部を有する放熱器を一枚の平らな金属シートから形成するステップであって、前記脚部が前記一枚の平らな金属シートの各々の角を矩形の脚部の一つの角とするように金属シートの各片に沿って折り曲げ、その際、隣接する各脚部の間は、折り曲げずに平坦のままとすることで、4つの脚部以外の金属シートを平坦な放熱器プレートとし、放熱器プレートと4つの脚部とからなる放熱器の全領域が矩形となるように形成され、前記4つの脚部は前記放熱器プレートに実質的に平行かつ前記放熱器プレートの角に形成される平坦プレート部分であるステップと、
(b)前記集積回路デバイスの非活性側に前記放熱器プレートを接続するために第1の伝熱材料を使用するステップと、
(c)前記放熱器プレートの角に形成される前記複数の脚部の各々を前記放熱器プレートの角の下の前記基板に接続するために第2の伝熱材料を使用するステップとを備え、
前記放熱器は、複数の脚部のうちの各隣接する一対の脚部間においてそれぞれ接続部分を有しており、前記接続部分は前記放熱器プレートと同一平面上にあり、
前記放熱器プレートの部分、脚部及び接続部分は合体して矩形を形成することを特徴とする方法。 - 前記ステップ(a)は、前記放熱器を一枚の平らな銅シートから打ち抜きで形成することを含む請求項1記載の方法。
- 前記ステップ(a)の前に、
複数のはんだバンプを前記集積回路デバイスに設けるステップと、
前記基板上に前記デバイスを配置するステップと、
前記基板上の端子パッドと電気的接続を形成するためにはんだバンプをリフローしてフリップチップ構造を形成するステップとをさらに備える請求項1記載の方法。 - 前記第1および第2の伝熱材料の各々は、接着剤、伝熱性グリース、はんだ、および相変化材料からなる群から選択される請求項1記載の方法。
- 前記第1および第2の伝熱材料の各々は伝熱性接着剤である請求項1記載の方法。
- 前記ステップ(b)の後に、前記伝熱材料を固化させるステップをさらに備える請求項5記載の方法。
- 前記4つの脚部の隣接する各脚部の間のそれぞれの最短距離は流体が自由に入出できるほど大きい請求項1記載の方法。
- 前記ステップ(a)は、前記放熱器を一枚の平らな銅シートから打ち抜きで形成することを含む請求項7記載の方法。
- 前記ステップ(a)の前に、
複数のはんだバンプを前記集積回路デバイスに設けるステップと、
前記基板上に前記デバイスを配置するステップと、
前記基板上の端子パッドと電気的接続を形成するためにはんだバンプをリフローしてフリップチップ構造を形成するステップとをさらに備える請求項7記載の方法。 - 前記第1および第2の伝熱材料の各々は、接着剤、伝熱性グリース、はんだ、および相変化材料からなる群から選択される請求項7記載の方法。
- 前記第1および第2の伝熱材料の各々は伝熱性接着剤である請求項7記載の方法。
- 前記ステップ(b)の後に、前記伝熱材料を固化させるステップをさらに備える請求項11記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/193832 | 1998-11-17 | ||
US09/193,832 US6118177A (en) | 1998-11-17 | 1998-11-17 | Heatspreader for a flip chip device, and method for connecting the heatspreader |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11326032A Division JP2000150735A (ja) | 1998-11-17 | 1999-11-16 | 回路組立体および集積回路デバイスに放熱器を接続する方法 |
Publications (2)
Publication Number | Publication Date |
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JP2004312034A JP2004312034A (ja) | 2004-11-04 |
JP4746283B2 true JP4746283B2 (ja) | 2011-08-10 |
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JP11326032A Pending JP2000150735A (ja) | 1998-11-17 | 1999-11-16 | 回路組立体および集積回路デバイスに放熱器を接続する方法 |
JP2004175054A Expired - Fee Related JP4746283B2 (ja) | 1998-11-17 | 2004-06-14 | 回路組立体および集積回路デバイスに放熱器を接続する方法 |
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JP11326032A Pending JP2000150735A (ja) | 1998-11-17 | 1999-11-16 | 回路組立体および集積回路デバイスに放熱器を接続する方法 |
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US (2) | US6118177A (ja) |
JP (2) | JP2000150735A (ja) |
KR (1) | KR100662218B1 (ja) |
TW (1) | TW429560B (ja) |
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- 1998-11-17 US US09/193,832 patent/US6118177A/en not_active Expired - Lifetime
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1999
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2000
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TW429560B (en) | 2001-04-11 |
US6681482B1 (en) | 2004-01-27 |
JP2004312034A (ja) | 2004-11-04 |
JP2000150735A (ja) | 2000-05-30 |
KR20000035379A (ko) | 2000-06-26 |
KR100662218B1 (ko) | 2007-01-02 |
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