CN101138081A - 集成电路及其制造方法 - Google Patents

集成电路及其制造方法 Download PDF

Info

Publication number
CN101138081A
CN101138081A CNA2006800073364A CN200680007336A CN101138081A CN 101138081 A CN101138081 A CN 101138081A CN A2006800073364 A CNA2006800073364 A CN A2006800073364A CN 200680007336 A CN200680007336 A CN 200680007336A CN 101138081 A CN101138081 A CN 101138081A
Authority
CN
China
Prior art keywords
silicon
crystal orientation
layer
silicon layer
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2006800073364A
Other languages
English (en)
Other versions
CN101138081B (zh
Inventor
A·M·韦特
S·卢宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of CN101138081A publication Critical patent/CN101138081A/zh
Application granted granted Critical
Publication of CN101138081B publication Critical patent/CN101138081B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H01L27/1207—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

提供一种集成电路及其制造方法。该集成电路(20)包括主体硅衬底(bulk silicon substrate)(24)，其具有〈100〉晶向的第一区域(64，66)及〈110〉晶向(crystalline orientation)的第二区域(66，64)。绝缘层上硅(silicon on insulator，SOI)层(62)叠放设置于一部分的主体硅衬底上。至少一场效应晶体管(96，98)形成在该绝缘层上硅层(62)中，至少一P沟道场效应晶体管(90，92)形成在该〈110〉晶向的第二区域(66，64)中，且至少一N沟道场效应晶体管(90，92)形成在该〈100〉晶向的第一区域(64，66)中。

Description

集成电路及其制造方法
技术领域
本发明通常是关于FETIC及其制造方法，且尤其是关于具有SOI装置的FETIC及PFET和NFET混合定向(Hybrid Orientation，HOT)装置及其制造方法。
背景技术
现今集成电路(IC)主要经由使用多个互相连结的场效应晶体管(FET)，亦称为金属氧化物半导体场效应晶体管(MOSFET或MOS晶体管)，而施行。IC通常使用P沟道和N沟道FET而形成，且IC于是称为互补MOS或CMOS电路。经由叠放设置在绝缘层上的硅薄层形成FET，可达成FETIC的某些效能改良。例如，该等绝缘层上硅(SOI)FET展现低接面电容(junction capacitance)且因此可以高速操作。其中制造有FET的硅衬底，不论是主体硅衬底或SOI，通常为<100>晶向。选择此晶向是因为<100>晶向达到最高的电子移动率且因此达到最高速的N沟道FET。在CMOS电路中可达到的额外效能增进为藉由增进P沟道FET的空穴移动率。空穴移动率可藉由在具有<110>晶向的硅上制造P沟道FET而增进。混合定向技术(HOT)系对N沟道FET使用<100>晶向且对P沟道FET使用<110>晶向。
因此，期望在单一集成电路中结合所要之绝缘层上硅FET特性与所要之可由混合定向技术获得的特性。此外，期望提供制造CMOS集成电路的方法，该CMOS集成电路结合在相同衬底上之SOIFET与主体HOT N沟道及P沟道FET。再者，其它本发明所期望之特性从后续详细说明结合所附图式及前述技术领域及先前技术之描述而变为明显。
发明内容
提供一种CMOS集成电路，利用主体混合定向(HOT)晶体管与绝缘层上硅晶体管结合而获得优势。该集成电路利用在<110>晶向的主体硅中增加空穴移动率且在<100>晶向的主体硅中增加电子移动率而获得优势。该集成电路包括主体硅衬底，其具有<100>晶向的第一区域及<110>晶向的第二区域。绝缘层上硅层叠放设置于一部份的该主体硅衬底上。至少一场效应晶体管形成在该绝缘层上硅层中，至少一P沟道场效应晶体管形成在该<110>晶向的第二区域中，且至少一N沟道场效应晶体管形成在该<100>晶向的第一区域中。
提供一种制造该CMOS集成电路的方法。该方法包括提供使具有第一晶向的硅衬底有第二晶向的叠放设置硅层的步骤。绝缘层上硅层是形成叠放设置于一部份的该硅层上。具有该第一晶向的第一外延层成长在该硅衬底的一部份上且具有该第二晶向的第二外延层成长在该硅层的一部份上。第一HOT场效应晶体管形成在该第一外延层中，第二HOT场效应晶体管形成在该第二外延层中，且第三场效应晶体管形成在该绝缘层上硅层中。
附图说明
本发明之后配合下述图式描述，其中类似组件符号标示类似构件，且其中：
图1至13以剖面图示意地描述集成电路之一实施例及其制造方法之步骤；以及
图14至18以剖面图示意地描述根据本发明之另一实施例之制造集成电路之方法步骤。
主要组件符号说明
20CMOS集成电路22硅层
24硅载体衬底
26绝缘层上硅层(SOI层)
28箭头30氧化硅层、绝缘材料层
34晶圆36氧化物、氧化物层
38、54氮化硅层40、44、56、156光刻胶层
42、46、58、158沟槽48、152、162间隔物
49、50外延硅层、外延区域
52多晶硅59绝缘材料
60浅沟槽隔离(STI)
62绝缘层上硅区域(SOI区域)
64、66区域70、72部份
90N沟道HOT FET92P沟道HOT FET
96、98FET100栅极电极
102栅极绝缘层104源极与漏极区域
154、164层
具体实施方式
下列详细说明仅用于解释而非用于限制本发明或本发明之应用与用途。再者，并不使用任何出现在前述技术领域、先前技术、发明内容或后续实施方式之表示或暗含的理论限制本发明。
图1至13示意地描述根据本发明多种实施例之CMOS集成电路20及制造该CMOS集成电路之方法步骤。在这些描述性实施例中，只有绘示小部份的CMOS集成电路20。多种制造CMOS装置的步骤为习知，所以为了简短起见，许多习知步骤在此只有简短提及或整个忽略而没有提供已广为所知的制程细节。
如图1所示，根据本发明之一实施例的方法开始于硅层22接合至硅载体衬底24。如在此处所使用，术语“硅层”和“硅衬底”系用于包含通常用于半导体产业之相对纯硅材料以及硅与其它元素(如锗、碳等)混合以形成结晶半导体材料。硅层22及硅载体衬底24将用于形成主体混合定向(HOT)晶体管。以已知之晶圆接合技术将硅层22接合至硅载体衬底24，且该硅层由例如化学机械平坦化(CMP)技术而薄化至约300奈米(nm)之厚度。硅层及硅载体衬底具有不同晶向。选择硅层或硅载体衬底之一以具有<100>晶向，且选择另一者以具有<110>晶向。在较佳实施例中，但非用于限制，硅层会具有<100>晶向且硅载体衬底会具有<110>晶向。在本发明之另一实施例中，硅层会具有<110>晶向且硅载体衬底会具有<100>晶向。<100>晶向或<110>晶向系意指晶向在真实晶向的约±2°内。硅层和硅载体衬底两者较佳具有每平方至少约18至33欧姆(18-33 Ohms per square)的电阻。硅可为N型或P型之杂质掺杂，但较佳为掺杂P型。
图2绘示一方法，而图3与4绘示另一方法，两者皆依据本发明之实施例用以形成绝缘层上硅(SOI)层26叠放设置在硅层22上。图2绘示藉由SIMOX制程形成薄SOI层26之制程。SIMOX制程为习知制程，其中氧离子植入硅层22之次表面(sub-surface)区域，如箭头28所示。硅层及植入之氧接着加热以形成次表面氧化硅层30，该次表面氧化硅层30使SOI层26与硅层22的其余部份电性隔离。SOI层具有约10至100 nm之厚度。SOI层26的厚度根据植入离子的能量而定；亦即，调整植入能量使得植入之氧离子的范围正好超过SOI层26的期望厚度。SOI层26会具有与硅层22相同之晶向，且较佳具有<100>晶向。
在绘示于图3及4之另一实施例中，SOI层26藉由晶圆接合制程形成。如图3所绘示，如二氧化硅之绝缘材料层30(本文中亦有称为＂绝缘材料30″、″绝缘层30″)形成在硅层22的上表面及/或第二硅晶圆34之表面上。晶圆34接合至硅载体衬底24，使得绝缘材料30将硅层22及第二硅晶圆34分开。如图4所绘示，第二硅晶圆藉由例如CMP薄化，以留下薄硅层26在绝缘层30上，该绝缘层30叠放设置在硅层22上。薄硅层26，在此实施例中，可具有10至200nm之厚度，且可轻浓度杂质(lightly impurity doped)掺杂为N型或P型。较佳薄硅层26为杂质掺杂P型至每平方约30欧姆且具有<100>晶向。根据本发明之此实施例，薄硅层26不必与硅层22具有相同晶向。此外，硅层22在此实施例中可较薄，因为绝缘层上硅层26藉由接合至硅层22而形成，而非由硅层22形成。
如图5所示，在绝缘层上硅层26的表面上，将SOI衬底(无论由SIMOX制程或晶圆接合制程形成)氧化以形成具有约5至20nm厚度之薄垫氧化物36。具有约50至200nm之厚度之氮化硅层38接着沉积至垫氧化物36上。垫氧化物可藉由在氧气环境中加热SOI衬底而生长。氮化硅可经由，例如，由二氯硅烷与氨之反应以低压化学气相沉积(LPCVD)或电浆强化化学气相沉积(PECVD)而沉积。氮化硅层如下所述接着使用为CMP抛光停止层(polish stop)。
光刻胶层40施于氮化硅层38之表面且被微影图案化(photolichographically patterned)如图6所示。以图案化之光刻胶层做为蚀刻掩膜而蚀刻出通过氮化硅层38、氧化物层36、绝缘层上硅层26、绝缘层30、硅层22且至硅载体衬底24的上部的沟槽42。沟槽可藉由反应性离子蚀刻(RIE)制程进行蚀刻，使用CF4或CHF3化学品以蚀刻绝缘层，及使用氯或溴化氢化学品以蚀刻硅。光刻胶层40在沟槽42蚀刻完成后移除。或者，微影图案化光刻胶层40可在用于做为氮化硅层38蚀刻的蚀刻掩膜之后移除。氮化硅之蚀刻层可接着做为硬掩膜以掩膜氧化物36、绝缘层上硅26、绝缘层30、硅层22的蚀刻。又在此另一制程中，蚀刻步骤在蚀刻至硅载体衬底24之上部后终止。
移除光刻胶层40之后，施用另一光刻胶层44覆盖沟槽42及氮化硅层38之剩余部份，且被微影图案化如图7所示。以图案化之光刻胶层44做为蚀刻掩膜而蚀刻出通过硅层22上方之叠放设置层且进入硅层22的上部的第二沟槽(沟槽46)。如同沟槽42，沟槽46可藉由反应性离子蚀刻而蚀刻。光刻胶层44可在完成沟槽46的蚀刻后移除，或者，在蚀刻氮化硅层38之后移除。在另一制程中，图案化之氮化硅层接着做为硬掩膜以掩膜而蚀刻出通过氧化物36、SOI层26、绝缘层30且进入硅层22之上部的沟槽。在此例示之延伸进入硅载体层24之一部份的沟槽42为在延伸进入硅层22之一部份的沟槽46之前蚀刻。根据本发明之另一实施例(未图标)，两沟槽的形成顺序可相反且沟槽46可先形成。
在移除光刻胶层44之后，氧化硅或氮化硅层沉积在包括两沟槽42及44内之结构表面。氧化物或氮化物层被非等向性蚀刻(如藉由RIE)以形成侧壁间隔物48在沟槽42及沟槽46的垂直侧壁上，如图8所示。
根据本发明之一实施例，选择性外延硅层49及50接着生长于暴露之硅表面上。外延硅层49生长在位于沟槽42底部之硅载体衬底24之暴露表面上，且外延硅层50生长在位于沟槽46底部之硅层22的暴露表面上。外延硅层可经由在HCl存在下还原硅烷(SiH4)或二氯硅烷(SiH2Cl2)而生长。氯源的存在促进生长的选择特性，亦即，与在绝缘层(氧化硅或氮化硅)表面上相比外延硅优先生长在暴露硅表面上。外延硅层生长之晶向模仿其生长于其上之硅材料的晶向。于较佳实施例中，外延硅层49以相同于硅载体衬底24之<110>晶向生长而外延硅层50以相同于硅层22之<100>晶向生长。侧壁间隔物48延缓在沟槽46的边缘与尤其是沟槽42的边缘上之沉积硅成核(nucleation)。当不存在侧壁间隔物时，外延生长可能在沟槽边缘及沟槽底部所暴露之硅上成核，造成较不理想之外延硅层。这在外延硅层生长于沟槽42中时特别为真，因为生长层可能在暴露在沟槽边缘之<100>晶向硅层22上以及在暴露于沟槽底部之<110>晶向硅载体衬底24上成核。可能会发生一些硅过度生长超出氮化硅层38的顶部表面之高度，且一些硅可以多晶硅52之形式沉积在氮化硅层38上。多晶硅52可形成因为外延生长制程不是完美选择性的。在氮化硅层上的硅沉积会是多晶硅而非单晶硅，因为氮化硅没有提供沉积硅可模仿之结晶结构。
过度生长超出氮化硅层38之顶部高度之选择性外延硅以及多晶硅52可藉由CMP移除如图10所示。氮化硅层38使用做为CMP之抛光停止层。
在外延硅层平坦化之后，于该结构上沉积另一氮化硅层54。光刻胶层56施于氮化硅层54上，且被图案化如图11所示。移除间隔物48且沟槽58经由反应性离子蚀刻使用图案化之光刻胶层为蚀刻掩膜而形成。
移除间隔物48及形成沟槽58之后，移除光刻胶层56且沟槽58藉由例如LPCVD或PECVD而以沉积氧化物或其它绝缘材料59填满。所沉积之绝缘材料59填满沟槽58，但亦沉积在氮化硅层54上。在氮化硅层54上之过多绝缘材料使用CMP抛光移除以完成浅沟槽隔离(STI)60之形成，如第12图所示。氮化硅层54使用做为CMP制程期间之抛光停止层。在此技术领域具有通常知识者会了解，在介于组成集成电路之装置间，可使用许多已知制程及许多已知材料来形成STI或其它形式之电性隔离，且因此该些已知制程及材料不需在此讨论。图12所示之结构包括绝缘层上硅区域62及两主体硅区域64及66，其中一者具有<100>晶向且另一者具有<110>晶向。在形成浅沟槽隔离之后，分别在主体区域64及66之外延硅49及50可适当地以已知方法，例如经由离子植入，进行杂质掺杂。根据本发明之较佳实施例，主体区域64具有<110>晶向且以N型杂质而杂质掺杂，且主体区域66具有<100>晶向且以P型杂质而杂质掺杂。无论硅载体衬底24为<110>晶向且硅层22为<100>晶向，或硅载体衬底24为<100>晶向且硅层22为<110>晶向，<100>晶向区域系以P型杂质而杂质掺杂且<110>晶向区域系以N杂质而杂质掺杂。SOI区域62亦可适当地以相同方式杂质掺杂。如果SOI区域62将用于制造CMOS装置，区域62之部份70可以P型杂质掺杂而形成P型井以用于形成N沟道FET，且区域62之其它部份72可以N型杂质掺杂而形成N型井以用于形成P沟道FET。多种区域的杂质掺杂可由已知方法进行，根据欲制造之装置种类决定植入物种、剂量及能量。所选区域的植入可经由例如以图案化之光刻胶掩膜其它区域而进行。
在剥除剩余之层36、38及54之后，实质上共平面之SOI层26与各主体硅区域64及66之表面为暴露的，且此结构可用于制造施行所需集成电路功能之必须FET。可使用习知CMOS制程技术实施多种装置、在SOI区域62之部份70与72中之CMOS装置及在区域64与66中之主体HOT P沟道与N沟道FET之制造。用于制造CMOS装置之多种制造流程对此领域具有通常知识者为已知者且不需在此叙述。在此领域具有通常知识者知道多种制造流程系根据参数而定，如所使用之最小几何、可用于激活IC之电源供应、IC所期望之处理速度等。无论用于完成IC制造之制程流程为何，根据本发明之一实施例之IC20包括制造于具有<100>晶向之主体硅区域66之主体N沟道HOTFET90、制造于具有<110>晶向之主体硅区域64之主体P沟道HOT FET92、及分别制造于SOI区域62之部份70与72之CMOS晶体管N沟道SOIFET96及P沟道SOIFET98。虽然未图标，一些电性隔离形式例如浅沟槽隔离可在FET96与98之间施行，或者，可连接接面104在一起以经由pn接面的性质提供电性隔离。于例示实施例中，硅载体衬底24及外延硅49为<110>晶向且P沟道HOT FET92为形成于区域64中。又根据例示实施例，硅层22及外延硅50为<100>晶向且N沟道HOT FET90形成于区域66中。选择硅载体衬底为<110>晶向在此例示实施例为随机的；在此领域具有通常知识者会了解硅载体衬底24及硅层22之晶向可互换而未偏离本发明之范围及目的。
如图13所示，各主体HOT FET90与92及各SOIFET96及98包括叠放设置在栅极绝缘层102上之栅极电极100，且源极与漏极区域104位于栅极电极的两侧。栅极电极可为多晶硅、金属、硅化物等。栅极绝缘层可为二氧化硅、氮氧化硅、高介电常数材料等，根据所施行特定电路功能所需而定。该源极与漏极区域可包含单一杂质掺杂区域或多个对准杂质掺杂区域(aligned impurity doped region)。虽然未图标，导电接触栓(contact)与导电线路(trace)可与适当栅极电极及源极与漏极区域耦合，以使集成电路之多种晶体管互连。
根据例示实施例，尤其如图6至10所示，<100>及<110>晶向外延区域49及50在相同步骤生长，且其表面在相同步骤抛光。根据本发明之进一步实施例，两个外延区域可分别生长如图14至18所示。根据本发明之此实施例之方法类似于前述方法直至图6所述之步骤。然而不同于图7所示之蚀刻第二沟槽，氧化硅或氮化硅层沉积在氮化物层38之表面上及沟槽42内。沉积层经反应性离子蚀刻以形成侧壁间隔物152在沟槽42之边缘上如图14所示。
根据本发明之此实施例，尤其如图15所示，经由如上所述之选择性外延生长制程生长选择性硅外延层154在沟槽42中。层154之生长为成核在沟槽42底部所暴露之硅载体衬底24之部份，且以相同于衬底24之晶向生长。
施用另一光刻胶层156覆盖氮化物层38之表面及硅外延层154之表面。该光刻胶层经微影图案化且做为掩膜以用于蚀刻出延伸进入硅层22之额外沟槽158，如图16所示。沟槽158可以RIE制程蚀刻。
蚀刻沟槽158之后，移除光刻胶层156且沉积另一氧化硅或氮化硅层在氮化物层38之表面及硅外延层154之表面上。所沉积之氧化硅或氮化硅层经反应性离子蚀刻以形成在沟槽158壁上之侧壁间隔物162，如图17所示。根据本发明之进一步实施例，所沉积之层系通过保持在外延层154表面上之图案化光刻胶层而被蚀刻，因此未从外延层154移除该层。
根据本发明之此实施例，如图18所示，选择性硅外延层164以上述之选择性外延生长制程生长于沟槽158中。层164的生长为成核在沟槽158底部所暴露之硅层22之部份，且以相同于硅层22之晶向生长。如果用于形成间隔物162的沉积层保留在外延层154上，该层避免在层164之生长期间在层154上的进一步外延生长。
在氮化物层38的任何过度外延硅生长可藉由CMP移除，无论是以生长外延层164后之单一CMP步骤，或是以两个分开步骤，在每一分开外延硅生长步骤之后进行一次。CMP步骤或多个步骤可用于移除任何用于形成间隔物162之沉积层之所余部份。在CMP移除多余外延硅之后，结构相同于图10所示者。制造积体结构的制程可接着如图11至13所示之步骤完成。如前述实施例，两个沟槽被蚀刻且接着以外延硅填满之顺序可反转且不偏离本发明之范围。
虽至少一例示实施例已于前述详细说明，须了解存在数量繁多的改变。亦须了解的是例示实施例仅用于例示，且非用于以任何方式限制本发明之范围、应用或配置。反而前述详细说明系提供在相关技术领域中具有通常知识者方便的准则以应用例示实施例。须了解在功能及组件配置可进行多种变化而不偏离本发明的范围，本发明的范围如所附权利要求书及其法律上均等物所界定者。

Claims (10)

1.一种集成电路(20)，包括：
主体硅衬底(24)，包括具有<100>晶向的第一区域(64，66)及<110>晶向的第二区域(66，64)；
叠放设置在该主体硅衬底的一部份上的绝缘层上硅层(62)；
至少一场效应晶体管(96，98)，形成于该绝缘层上硅层(62)中；
至少一P沟道场效应晶体管(90，92)，形成在该第二区域(66，64)中；以及
至少一N沟道场效应晶体管(90，92)，形成在该第一区域(64，66)中。
2.如权利要求1所述的集成电路(20)，其中，该第一区域(64)包括形成在该硅衬底(24)上的P型杂质掺杂区域，且该第二区域(66)包括形成在接合至该硅衬底(24)的硅层(22)上的N型杂质掺杂区域。
3.如权利要求1所述的集成电路(20)，其中，该第二区域(64)包括形成在该硅衬底(24)上的N型杂质掺杂区域，且该第一区域(66)包括形成在接合至该硅衬底的硅层(22)上的P型杂质掺杂区域。
4.一种集成电路(20)，包括：
硅衬底(24)，具有第一晶向；
第一硅层(22)，具有不同于该第一晶向的第二晶向且接合至该硅衬底(24)，该第一硅层(22)具有上表面；
绝缘层(30)，在该第一硅层(22)的上表面上；
第二硅层(26)，在该绝缘层(30)上；
第一晶向的第一区域(49)，生长在该硅衬底(24)上；
第二晶向的第二区域(50)，生长在该第一硅层(22)上；
第一沟道导电型的第一场效应晶体管(92)，形成在该第一区域(49)中；
第二沟道导电型的第二场效应晶体管(90)，形成在该第二区域(50)中；以及
互补场效应晶体管(96，98)，形成在该第二硅层(26)中。
5.如权利要求4所述的集成电路(20)，其中，该第一晶向包括<110>晶向且该第二晶向包括<100>晶向。
6.如权利要求4所述的集成电路(20)，其中，该第一晶向包括<100>晶向且第二晶向包括<110>晶向。
7.一种制造集成电路(20)的方法，包括下列步骤：
提供具有第一晶向的硅衬底(24)；
提供叠放设置在该硅衬底(24)上的硅层(22)，该硅层(22)具有不同于该第一晶向的第二晶向；
形成绝缘层上硅层(26)叠放设置在该硅层的一部份上；
在该硅衬底(24)的一部份上生长具有该第一晶向的第一外延层(49)；
在该硅层(22)的一部份上生长具有该第二晶向的第二外延层(50)；以及
在该第一外延层(49)中形成第一场效应晶体管(92)、在该第二外延层(50)中形成第二场效应晶体管(90)及在该绝缘层上硅层(26)中形成第三场效应晶体管(96，98)。
8.如权利要求7所述的方法，其中，提供具有第一晶向的硅衬底(24)的步骤包括提供具有<100>晶向的硅衬底(24)的步骤，而且，提供叠放设置在该硅衬底上的硅层(22)的步骤包括提供具有<110>晶向的硅层(22)的步骤。
9.如权利要求7所述的方法，其中，提供具有第一晶向的硅衬底(24)的步骤包括提供具有<110>晶向的硅衬底(24)的步骤，且其中，提供叠放设置在该硅衬底(24)上的硅层(22)的步骤包括提供具有<100>晶向的硅层(22)的步骤。
10.如权利要求9所述的方法，其中，在该第一外延层(49)中形成第一场效应晶体管(92)的步骤包括形成P沟道场效应晶体管的步骤，以及在该第二外延层(50)中形成第二场效应晶体管(90)的步骤包括形成N沟道场效应晶体管的步骤。
CN2006800073364A 2005-03-07 2006-02-28 集成电路及其制造方法 Expired - Fee Related CN101138081B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/075,774 US6972478B1 (en) 2005-03-07 2005-03-07 Integrated circuit and method for its manufacture
US11/075,774 2005-03-07
PCT/US2006/006936 WO2006096380A1 (en) 2005-03-07 2006-02-28 Integrated circuit and method for its manufacture

Publications (2)

Publication Number Publication Date
CN101138081A true CN101138081A (zh) 2008-03-05
CN101138081B CN101138081B (zh) 2011-03-02

Family

ID=35430424

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800073364A Expired - Fee Related CN101138081B (zh) 2005-03-07 2006-02-28 集成电路及其制造方法

Country Status (8)

Country Link
US (1) US6972478B1 (zh)
EP (1) EP1856731B1 (zh)
JP (1) JP4814304B2 (zh)
KR (1) KR101183273B1 (zh)
CN (1) CN101138081B (zh)
DE (1) DE602006012283D1 (zh)
TW (1) TWI395295B (zh)
WO (1) WO2006096380A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103548140A (zh) * 2011-05-24 2014-01-29 国际商业机器公司 具有多个阈值电压和有源阱偏置能力的cmos绝缘体上极薄硅的改进型结构

Families Citing this family (390)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7119403B2 (en) 2003-10-16 2006-10-10 International Business Machines Corporation High performance strained CMOS devices
US7186622B2 (en) * 2004-07-15 2007-03-06 Infineon Technologies Ag Formation of active area using semiconductor growth process without STI integration
US7315466B2 (en) * 2004-08-04 2008-01-01 Samsung Electronics Co., Ltd. Semiconductor memory device and method for arranging and manufacturing the same
US7199451B2 (en) * 2004-09-30 2007-04-03 Intel Corporation Growing [110] silicon on [001]-oriented substrate with rare-earth oxide buffer film
US7298009B2 (en) * 2005-02-01 2007-11-20 Infineon Technologies Ag Semiconductor method and device with mixed orientation substrate
US7268377B2 (en) * 2005-02-25 2007-09-11 International Business Machines Corporation Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices
US7358164B2 (en) * 2005-06-16 2008-04-15 International Business Machines Corporation Crystal imprinting methods for fabricating substrates with thin active silicon layers
US7473985B2 (en) * 2005-06-16 2009-01-06 International Business Machines Corporation Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates
US7439108B2 (en) * 2005-06-16 2008-10-21 International Business Machines Corporation Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same
US7432149B2 (en) * 2005-06-23 2008-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. CMOS on SOI substrates with hybrid crystal orientations
US7611937B2 (en) * 2005-06-24 2009-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. High performance transistors with hybrid crystal orientations
US7342287B2 (en) * 2005-07-19 2008-03-11 International Business Machines Corporation Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structures
US7978561B2 (en) * 2005-07-28 2011-07-12 Samsung Electronics Co., Ltd. Semiconductor memory devices having vertically-stacked transistors therein
US8530355B2 (en) 2005-12-23 2013-09-10 Infineon Technologies Ag Mixed orientation semiconductor device and method
US7790581B2 (en) * 2006-01-09 2010-09-07 International Business Machines Corporation Semiconductor substrate with multiple crystallographic orientations
US7492016B2 (en) * 2006-03-31 2009-02-17 International Business Machines Corporation Protection against charging damage in hybrid orientation transistors
US7396407B2 (en) * 2006-04-18 2008-07-08 International Business Machines Corporation Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates
US7385257B2 (en) * 2006-04-26 2008-06-10 International Business Machines Corporation Hybrid orientation SOI substrates, and method for forming the same
EP1873821B1 (en) * 2006-06-27 2015-11-11 STMicroelectronics Srl SOI device with contact trenches formed during epitaxial growing
US20080124847A1 (en) * 2006-08-04 2008-05-29 Toshiba America Electronic Components, Inc. Reducing Crystal Defects from Hybrid Orientation Technology During Semiconductor Manufacture
US20080048269A1 (en) * 2006-08-25 2008-02-28 International Business Machines Corporation Method of fabricating structure for integrated circuit incorporating hybrid orientation technology and trench isolation regions
US7595232B2 (en) * 2006-09-07 2009-09-29 International Business Machines Corporation CMOS devices incorporating hybrid orientation technology (HOT) with embedded connectors
US7755140B2 (en) * 2006-11-03 2010-07-13 Intel Corporation Process charging and electrostatic damage protection in silicon-on-insulator technology
US7521776B2 (en) * 2006-12-29 2009-04-21 International Business Machines Corporation Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers
US8003539B2 (en) 2007-01-04 2011-08-23 Freescale Semiconductor, Inc. Integrated assist features for epitaxial growth
US20080169535A1 (en) * 2007-01-12 2008-07-17 International Business Machines Corporation Sub-lithographic faceting for mosfet performance enhancement
JP5016938B2 (ja) * 2007-02-06 2012-09-05 セイコーインスツル株式会社 半導体装置
US7608522B2 (en) * 2007-03-11 2009-10-27 United Microelectronics Corp. Method for fabricating a hybrid orientation substrate
US7575968B2 (en) * 2007-04-30 2009-08-18 Freescale Semiconductor, Inc. Inverse slope isolation and dual surface orientation integration
US7776679B2 (en) * 2007-07-20 2010-08-17 Stmicroelectronics Crolles 2 Sas Method for forming silicon wells of different crystallographic orientations
US8115254B2 (en) * 2007-09-25 2012-02-14 International Business Machines Corporation Semiconductor-on-insulator structures including a trench containing an insulator stressor plug and method of fabricating same
US7696573B2 (en) * 2007-10-31 2010-04-13 International Business Machines Corporation Multiple crystallographic orientation semiconductor structures
US7795680B2 (en) * 2007-12-07 2010-09-14 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system employing selective epitaxial growth technology
US8211786B2 (en) * 2008-02-28 2012-07-03 International Business Machines Corporation CMOS structure including non-planar hybrid orientation substrate with planar gate electrodes and method for fabrication
JP2010067635A (ja) * 2008-09-08 2010-03-25 Imec 電子回路および電子回路の製造方法
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US8293616B2 (en) * 2009-02-24 2012-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of fabrication of semiconductor devices with low capacitance
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8415743B2 (en) 2011-05-24 2013-04-09 International Business Machines Corporation ETSOI CMOS with back gates
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US9341296B2 (en) 2011-10-27 2016-05-17 Asm America, Inc. Heater jacket for a fluid line
US9096931B2 (en) 2011-10-27 2015-08-04 Asm America, Inc Deposition valve assembly and method of heating the same
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US9005539B2 (en) 2011-11-23 2015-04-14 Asm Ip Holding B.V. Chamber sealing member
US9167625B2 (en) 2011-11-23 2015-10-20 Asm Ip Holding B.V. Radiation shielding for a substrate holder
US8610172B2 (en) * 2011-12-15 2013-12-17 International Business Machines Corporation FETs with hybrid channel materials
CN103999200B (zh) * 2011-12-23 2016-12-28 英特尔公司 具有包含不同材料取向或组成的纳米线或半导体主体的共衬底半导体器件
US9202727B2 (en) 2012-03-02 2015-12-01 ASM IP Holding Susceptor heater shim
US8946830B2 (en) 2012-04-04 2015-02-03 Asm Ip Holdings B.V. Metal oxide protective layer for a semiconductor device
US8728832B2 (en) 2012-05-07 2014-05-20 Asm Ip Holdings B.V. Semiconductor device dielectric interface layer
US8933375B2 (en) 2012-06-27 2015-01-13 Asm Ip Holding B.V. Susceptor heater and method of heating a substrate
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9117866B2 (en) 2012-07-31 2015-08-25 Asm Ip Holding B.V. Apparatus and method for calculating a wafer position in a processing chamber under process conditions
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9169975B2 (en) 2012-08-28 2015-10-27 Asm Ip Holding B.V. Systems and methods for mass flow controller verification
US9021985B2 (en) 2012-09-12 2015-05-05 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US8815699B2 (en) * 2012-11-07 2014-08-26 Globalfoundries Inc. Fabrication of reverse shallow trench isolation structures with super-steep retrograde wells
US8963208B2 (en) * 2012-11-15 2015-02-24 GlobalFoundries, Inc. Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US8894870B2 (en) 2013-02-01 2014-11-25 Asm Ip Holding B.V. Multi-step method and apparatus for etching compounds containing a metal
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US8993054B2 (en) 2013-07-12 2015-03-31 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9018111B2 (en) 2013-07-22 2015-04-28 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9396931B2 (en) * 2013-08-01 2016-07-19 Qualcomm Incorporated Method of forming fins from different materials on a substrate
US9396934B2 (en) 2013-08-14 2016-07-19 Asm Ip Holding B.V. Methods of forming films including germanium tin and structures and devices including the films
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9240412B2 (en) * 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9605343B2 (en) 2013-11-13 2017-03-28 Asm Ip Holding B.V. Method for forming conformal carbon films, structures conformal carbon film, and system of forming same
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US9490161B2 (en) * 2014-04-29 2016-11-08 International Business Machines Corporation Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same
US10056293B2 (en) * 2014-07-18 2018-08-21 International Business Machines Corporation Techniques for creating a local interconnect using a SOI wafer
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9508799B2 (en) 2014-08-26 2016-11-29 United Microelectronics Corp. Substrate of semiconductor device including epitaxial layer and silicon layer having same crystalline orientation
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
KR102300403B1 (ko) 2014-11-19 2021-09-09 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
KR102263121B1 (ko) 2014-12-22 2021-06-09 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 및 그 제조 방법
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US9892913B2 (en) 2016-03-24 2018-02-13 Asm Ip Holding B.V. Radial and thickness control via biased multi-port injection settings
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
KR102592471B1 (ko) 2016-05-17 2023-10-20 에이에스엠 아이피 홀딩 비.브이. 금속 배선 형성 방법 및 이를 이용한 반도체 장치의 제조 방법
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
KR20180070971A (ko) 2016-12-19 2018-06-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
KR102457289B1 (ko) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
KR102401446B1 (ko) 2017-08-31 2022-05-24 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
KR102630301B1 (ko) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
KR102443047B1 (ko) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 방법 및 그에 의해 제조된 장치
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
JP7206265B2 (ja) 2017-11-27 2023-01-17 エーエスエム アイピー ホールディング ビー．ブイ． クリーン・ミニエンバイロメントを備える装置
CN111316417B (zh) 2017-11-27 2023-12-22 阿斯莫Ip控股公司 与批式炉偕同使用的用于储存晶圆匣的储存装置
US10818778B2 (en) * 2017-11-27 2020-10-27 Taiwan Semiconductor Manufacturing Co., Ltd. Heterogeneous semiconductor device substrates with high quality epitaxy
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
CN111630203A (zh) 2018-01-19 2020-09-04 Asm Ip私人控股有限公司 通过等离子体辅助沉积来沉积间隙填充层的方法
TWI799494B (zh) 2018-01-19 2023-04-21 荷蘭商Ａｓｍ 智慧財產控股公司 沈積方法
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
KR102501472B1 (ko) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
KR20190128558A (ko) 2018-05-08 2019-11-18 에이에스엠 아이피 홀딩 비.브이. 기판 상에 산화물 막을 주기적 증착 공정에 의해 증착하기 위한 방법 및 관련 소자 구조
KR20190129718A (ko) 2018-05-11 2019-11-20 에이에스엠 아이피 홀딩 비.브이. 기판 상에 피도핑 금속 탄화물 막을 형성하는 방법 및 관련 반도체 소자 구조
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
WO2020003000A1 (en) 2018-06-27 2020-01-02 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
KR20210024462A (ko) 2018-06-27 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 금속 함유 재료를 형성하기 위한 주기적 증착 방법 및 금속 함유 재료를 포함하는 필름 및 구조체
KR20200002519A (ko) 2018-06-29 2020-01-08 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
KR20200030162A (ko) 2018-09-11 2020-03-20 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110970344A (zh) 2018-10-01 2020-04-07 Asm Ip控股有限公司 衬底保持设备、包含所述设备的系统及其使用方法
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US10811255B2 (en) * 2018-10-30 2020-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming semiconductor devices
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
JP2020096183A (ja) 2018-12-14 2020-06-18 エーエスエム・アイピー・ホールディング・ベー・フェー 窒化ガリウムの選択的堆積を用いてデバイス構造体を形成する方法及びそのためのシステム
TWI819180B (zh) 2019-01-17 2023-10-21 荷蘭商Ａｓｍ 智慧財產控股公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
TW202104632A (zh) 2019-02-20 2021-02-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
KR20200102357A (ko) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. 3-d nand 응용의 플러그 충진체 증착용 장치 및 방법
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
JP2020136678A (ja) 2019-02-20 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材表面内に形成された凹部を充填するための方法および装置
JP2020133004A (ja) 2019-02-22 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材を処理するための基材処理装置および方法
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
KR20200108248A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOCN 층을 포함한 구조체 및 이의 형성 방법
KR20200116033A (ko) 2019-03-28 2020-10-08 에이에스엠 아이피 홀딩 비.브이. 도어 개방기 및 이를 구비한 기판 처리 장치
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー．ブイ． ウェハボートハンドリング装置、縦型バッチ炉および方法
JP2020188254A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー．ブイ． ウェハボートハンドリング装置、縦型バッチ炉および方法
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141003A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 가스 감지기를 포함하는 기상 반응기 시스템
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP2021015791A (ja) 2019-07-09 2021-02-12 エーエスエム アイピー ホールディング ビー．ブイ． 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010820A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
CN112242296A (zh) 2019-07-19 2021-01-19 Asm Ip私人控股有限公司 形成拓扑受控的无定形碳聚合物膜的方法
CN112309843A (zh) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
CN112323048B (zh) 2019-08-05 2024-02-09 Asm Ip私人控股有限公司 用于化学源容器的液位传感器
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー．ブイ． 成膜原料混合ガス生成装置及び成膜装置
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TW202129060A (zh) 2019-10-08 2021-08-01 荷蘭商Ａｓｍ Ｉｐ控股公司 基板處理裝置、及基板處理方法
TW202115273A (zh) 2019-10-10 2021-04-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成光阻底層之方法及包括光阻底層之結構
KR20210045930A (ko) 2019-10-16 2021-04-27 에이에스엠 아이피 홀딩 비.브이. 실리콘 산화물의 토폴로지-선택적 막의 형성 방법
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
KR20210065848A (ko) 2019-11-26 2021-06-04 에이에스엠 아이피 홀딩 비.브이. 제1 유전체 표면과 제2 금속성 표면을 포함한 기판 상에 타겟 막을 선택적으로 형성하기 위한 방법
CN112885692A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
CN112885693A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
JP2021090042A (ja) 2019-12-02 2021-06-10 エーエスエム アイピー ホールディング ビー．ブイ． 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210078405A (ko) 2019-12-17 2021-06-28 에이에스엠 아이피 홀딩 비.브이. 바나듐 나이트라이드 층을 형성하는 방법 및 바나듐 나이트라이드 층을 포함하는 구조
KR20210080214A (ko) 2019-12-19 2021-06-30 에이에스엠 아이피 홀딩 비.브이. 기판 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
JP2021109175A (ja) 2020-01-06 2021-08-02 エーエスエム・アイピー・ホールディング・ベー・フェー ガス供給アセンブリ、その構成要素、およびこれを含む反応器システム
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR20210095050A (ko) 2020-01-20 2021-07-30 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TW202130846A (zh) 2020-02-03 2021-08-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成包括釩或銦層的結構之方法
TW202146882A (zh) 2020-02-04 2021-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TW202203344A (zh) 2020-02-28 2022-01-16 荷蘭商Ａｓｍ Ｉｐ控股公司 專用於零件清潔的系統
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
KR20210117157A (ko) 2020-03-12 2021-09-28 에이에스엠 아이피 홀딩 비.브이. 타겟 토폴로지 프로파일을 갖는 층 구조를 제조하기 위한 방법
KR20210124042A (ko) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TW202146689A (zh) 2020-04-03 2021-12-16 荷蘭商Ａｓｍ Ｉｐ控股公司 阻障層形成方法及半導體裝置的製造方法
TW202145344A (zh) 2020-04-08 2021-12-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
TW202146831A (zh) 2020-04-24 2021-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法
TW202140831A (zh) 2020-04-24 2021-11-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成含氮化釩層及包含該層的結構之方法
KR20210134226A (ko) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
KR20210134869A (ko) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Foup 핸들러를 이용한 foup의 빠른 교환
KR20210141379A (ko) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
KR20210143653A (ko) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210145078A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
TW202200837A (zh) 2020-05-22 2022-01-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於在基材上形成薄膜之反應系統
TW202201602A (zh) 2020-05-29 2022-01-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 基板處理方法
TW202218133A (zh) 2020-06-24 2022-05-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成含矽層之方法
TW202217953A (zh) 2020-06-30 2022-05-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 基板處理方法
KR20220010438A (ko) 2020-07-17 2022-01-25 에이에스엠 아이피 홀딩 비.브이. 포토리소그래피에 사용하기 위한 구조체 및 방법
TW202204662A (zh) 2020-07-20 2022-02-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於沉積鉬層之方法及系統
TW202212623A (zh) 2020-08-26 2022-04-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 形成金屬氧化矽層及金屬氮氧化矽層的方法、半導體結構、及系統
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
TW202229613A (zh) 2020-10-14 2022-08-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 於階梯式結構上沉積材料的方法
KR20220053482A (ko) 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리
TW202223136A (zh) 2020-10-28 2022-06-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於在基板上形成層之方法、及半導體處理系統
TW202235675A (zh) 2020-11-30 2022-09-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 注入器、及基板處理設備
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (zh) 2020-12-22 2022-08-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3276146B2 (ja) * 1990-03-30 2002-04-22 株式会社デンソー 半導体装置及びその製造方法
JPH04372166A (ja) * 1991-06-21 1992-12-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP3017860B2 (ja) * 1991-10-01 2000-03-13 株式会社東芝 半導体基体およびその製造方法とその半導体基体を用いた半導体装置
JP2003243528A (ja) * 2002-02-13 2003-08-29 Toshiba Corp 半導体装置
US6902962B2 (en) * 2003-04-04 2005-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Silicon-on-insulator chip with multiple crystal orientations
US7329923B2 (en) * 2003-06-17 2008-02-12 International Business Machines Corporation High-performance CMOS devices on hybrid crystal oriented substrates
US7422956B2 (en) * 2004-12-08 2008-09-09 Advanced Micro Devices, Inc. Semiconductor device and method of making semiconductor device comprising multiple stacked hybrid orientation layers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103548140A (zh) * 2011-05-24 2014-01-29 国际商业机器公司 具有多个阈值电压和有源阱偏置能力的cmos绝缘体上极薄硅的改进型结构
CN103548140B (zh) * 2011-05-24 2016-04-13 国际商业机器公司 具有多个阈值电压和有源阱偏置能力的cmos绝缘体上极薄硅的改进型结构

Also Published As

Publication number Publication date
WO2006096380A1 (en) 2006-09-14
CN101138081B (zh) 2011-03-02
JP2008532330A (ja) 2008-08-14
EP1856731A1 (en) 2007-11-21
DE602006012283D1 (de) 2010-04-01
JP4814304B2 (ja) 2011-11-16
KR101183273B1 (ko) 2012-09-14
KR20070110072A (ko) 2007-11-15
TW200727404A (en) 2007-07-16
EP1856731B1 (en) 2010-02-17
US6972478B1 (en) 2005-12-06
TWI395295B (zh) 2013-05-01

Similar Documents

Publication Publication Date Title
CN101138081B (zh) 集成电路及其制造方法
CN101233606B (zh) 用于制造受应力的mos器件的方法
US7348256B2 (en) Methods of forming reduced electric field DMOS using self-aligned trench isolation
KR101124657B1 (ko) 서로 다른 결정 방향을 갖는 실리콘층을 구비한실리콘-온-절연막 반도체 소자 및 실리콘-온-절연막 반도체소자를 형성하는 방법
US8395217B1 (en) Isolation in CMOSFET devices utilizing buried air bags
US20050040463A1 (en) Transistor structures and processes for forming same
US7601574B2 (en) Methods for fabricating a stress enhanced MOS transistor
US20060131657A1 (en) Semiconductor integrated circuit device and method for the same
US20040016961A1 (en) Double diffused MOS transistor and method for manufacturing same
US7271446B2 (en) Ultra-thin channel device with raised source and drain and solid source extension doping
US9064972B2 (en) Method of forming a gated diode structure for eliminating RIE damage from cap removal
US7986008B2 (en) SOI semiconductor components and methods for their fabrication
US20020081820A1 (en) Method for manufacturing semiconductor device capable of suppressing narrow channel width effect
US6696729B2 (en) Semiconductor device having diffusion regions with different junction depths
US20020090787A1 (en) Self-aligned elevated transistor
US20060272574A1 (en) Methods for manufacturing integrated circuits
US10811413B2 (en) Multi-threshold vertical FETs with common gates
CN100361302C (zh) 混合衬底、集成半导体结构以及它们的制备方法
WO2007035660A1 (en) Method to form a device on a soi substrate
US7098095B1 (en) Method of forming a MOS transistor with a layer of silicon germanium carbon
JPH0837312A (ja) Ｓｏｉ型半導体装置及びその製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: GLOBALFOUNDRIES INC.

Free format text: FORMER OWNER: ADVANCED MICRO DEVICES INC.

Effective date: 20100730

C41 Transfer of patent application or patent right or utility model
COR Change of bibliographic data

Free format text: CORRECT: ADDRESS; FROM: CALIFORNIA STATE, USA TO: CAYMAN ISLANDS GRAND CAYMAN ISLAND

TA01 Transfer of patent application right

Effective date of registration: 20100730

Address after: Grand Cayman, Cayman Islands

Applicant after: Globalfoundries Semiconductor Inc.

Address before: American California

Applicant before: Advanced Micro Devices Inc.

C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110302

Termination date: 20190228

CF01 Termination of patent right due to non-payment of annual fee