CN101088157B - 通过在分割期间或之后进行蚀刻来增强晶片强度 - Google Patents

通过在分割期间或之后进行蚀刻来增强晶片强度 Download PDF

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Publication number
CN101088157B
CN101088157B CN2005800441751A CN200580044175A CN101088157B CN 101088157 B CN101088157 B CN 101088157B CN 2005800441751 A CN2005800441751 A CN 2005800441751A CN 200580044175 A CN200580044175 A CN 200580044175A CN 101088157 B CN101088157 B CN 101088157B
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CN
China
Prior art keywords
wafer
etching
semiconductor wafer
semiconductor
etchant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2005800441751A
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English (en)
Chinese (zh)
Other versions
CN101088157A (zh
Inventor
A·博伊尔
D·吉伦
K·邓恩
E·费尔南德斯戈麦斯
R·托夫尼斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Electro Scientific Industries Inc
Original Assignee
Xsil Technology Ltd
Irecto Science Industry Co ltd
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Application filed by Xsil Technology Ltd, Irecto Science Industry Co ltd filed Critical Xsil Technology Ltd
Publication of CN101088157A publication Critical patent/CN101088157A/zh
Application granted granted Critical
Publication of CN101088157B publication Critical patent/CN101088157B/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Dicing (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
CN2005800441751A 2004-11-01 2005-11-01 通过在分割期间或之后进行蚀刻来增强晶片强度 Expired - Fee Related CN101088157B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0424195.6 2004-11-01
GB0424195A GB2420443B (en) 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing
PCT/EP2005/011671 WO2006048230A1 (en) 2004-11-01 2005-11-01 Increasing die strength by etching during or after dicing

Publications (2)

Publication Number Publication Date
CN101088157A CN101088157A (zh) 2007-12-12
CN101088157B true CN101088157B (zh) 2010-06-23

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2005800441751A Expired - Fee Related CN101088157B (zh) 2004-11-01 2005-11-01 通过在分割期间或之后进行蚀刻来增强晶片强度

Country Status (9)

Country Link
US (1) US20090191690A1 (enExample)
EP (1) EP1825507B1 (enExample)
JP (2) JP4690417B2 (enExample)
KR (1) KR20070051360A (enExample)
CN (1) CN101088157B (enExample)
AT (1) ATE526681T1 (enExample)
GB (1) GB2420443B (enExample)
TW (1) TWI278032B (enExample)
WO (1) WO2006048230A1 (enExample)

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KR101140369B1 (ko) * 2010-03-26 2012-05-03 최선규 이플루오르화크세논을 이용한 기판 가공장치 및 다이싱 방법
US8071429B1 (en) 2010-11-24 2011-12-06 Omnivision Technologies, Inc. Wafer dicing using scribe line etch
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US8361828B1 (en) * 2011-08-31 2013-01-29 Alta Devices, Inc. Aligned frontside backside laser dicing of semiconductor films
US8399281B1 (en) * 2011-08-31 2013-03-19 Alta Devices, Inc. Two beam backside laser dicing of semiconductor films
US8536025B2 (en) * 2011-12-12 2013-09-17 International Business Machines Corporation Resized wafer with a negative photoresist ring and design structures thereof
US8952413B2 (en) 2012-03-08 2015-02-10 Micron Technology, Inc. Etched trenches in bond materials for die singulation, and associated systems and methods
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US8664089B1 (en) * 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
JP6166034B2 (ja) * 2012-11-22 2017-07-19 株式会社ディスコ ウエーハの加工方法
US8980726B2 (en) * 2013-01-25 2015-03-17 Applied Materials, Inc. Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers
CN105102230B (zh) 2013-02-13 2017-08-08 惠普发展公司，有限责任合伙企业 流体喷射装置
US9472458B2 (en) 2014-06-04 2016-10-18 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
JP6282194B2 (ja) * 2014-07-30 2018-02-21 株式会社ディスコ ウェーハの加工方法
US9601437B2 (en) 2014-09-09 2017-03-21 Nxp B.V. Plasma etching and stealth dicing laser process
US9337098B1 (en) 2015-08-14 2016-05-10 Semiconductor Components Industries, Llc Semiconductor die back layer separation method
JP6587911B2 (ja) * 2015-11-16 2019-10-09 株式会社ディスコ ウエーハの分割方法
CN108630599A (zh) * 2017-03-22 2018-10-09 东莞新科技术研究开发有限公司 芯片的形成方法
US10373869B2 (en) 2017-05-24 2019-08-06 Semiconductor Components Industries, Llc Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus
CN107579032B (zh) * 2017-07-27 2019-04-09 厦门市三安集成电路有限公司 一种化合物半导体器件的背面制程方法
JP7066263B2 (ja) * 2018-01-23 2022-05-13 株式会社ディスコ 加工方法、エッチング装置、及びレーザ加工装置
US10916474B2 (en) 2018-06-25 2021-02-09 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
CN110634796A (zh) 2018-06-25 2019-12-31 半导体元件工业有限责任公司 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
US11217550B2 (en) 2018-07-24 2022-01-04 Xilinx, Inc. Chip package assembly with enhanced interconnects and method for fabricating the same
JP7296835B2 (ja) 2019-09-19 2023-06-23 株式会社ディスコ ウェーハの処理方法、及び、チップ測定装置

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Also Published As

Publication number Publication date
CN101088157A (zh) 2007-12-12
TW200625435A (en) 2006-07-16
GB2420443B (en) 2009-09-16
KR20070051360A (ko) 2007-05-17
JP2010147488A (ja) 2010-07-01
US20090191690A1 (en) 2009-07-30
JP2008518450A (ja) 2008-05-29
GB0424195D0 (en) 2004-12-01
WO2006048230A1 (en) 2006-05-11
ATE526681T1 (de) 2011-10-15
GB2420443A (en) 2006-05-24
EP1825507B1 (en) 2011-09-28
EP1825507A1 (en) 2007-08-29
TWI278032B (en) 2007-04-01
JP4690417B2 (ja) 2011-06-01

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SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: IRITALK SCIENCE AND TECHNOLOGY INDUSTRIAL STOCK CO

Free format text: FORMER OWNER: XSIL TECHNOLOGY CO., LTD.

Effective date: 20091120

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

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Address after: oregon

Applicant after: Electro Scient Ind Inc.

Address before: Dublin, Ireland

Applicant before: XSIL Technology Ltd.

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100623

Termination date: 20171101

CF01 Termination of patent right due to non-payment of annual fee