KR20070051360A - 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법 - Google Patents

웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법 Download PDF

Info

Publication number
KR20070051360A
KR20070051360A KR1020077008211A KR20077008211A KR20070051360A KR 20070051360 A KR20070051360 A KR 20070051360A KR 1020077008211 A KR1020077008211 A KR 1020077008211A KR 20077008211 A KR20077008211 A KR 20077008211A KR 20070051360 A KR20070051360 A KR 20070051360A
Authority
KR
South Korea
Prior art keywords
semiconductor wafer
etching
dicing
wafer
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020077008211A
Other languages
English (en)
Korean (ko)
Inventor
아드리안 보일
데이비드 길렌
케일 듄
고메즈 에바 페르난데스
리차드 토프트네스
Original Assignee
엑스에스아이엘 테크놀러지 리미티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엑스에스아이엘 테크놀러지 리미티드 filed Critical 엑스에스아이엘 테크놀러지 리미티드
Publication of KR20070051360A publication Critical patent/KR20070051360A/ko
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Dicing (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
KR1020077008211A 2004-11-01 2005-11-01 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법 Ceased KR20070051360A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0424195.6 2004-11-01
GB0424195A GB2420443B (en) 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing

Publications (1)

Publication Number Publication Date
KR20070051360A true KR20070051360A (ko) 2007-05-17

Family

ID=33515886

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077008211A Ceased KR20070051360A (ko) 2004-11-01 2005-11-01 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법

Country Status (9)

Country Link
US (1) US20090191690A1 (enExample)
EP (1) EP1825507B1 (enExample)
JP (2) JP4690417B2 (enExample)
KR (1) KR20070051360A (enExample)
CN (1) CN101088157B (enExample)
AT (1) ATE526681T1 (enExample)
GB (1) GB2420443B (enExample)
TW (1) TWI278032B (enExample)
WO (1) WO2006048230A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101140369B1 (ko) * 2010-03-26 2012-05-03 최선규 이플루오르화크세논을 이용한 기판 가공장치 및 다이싱 방법
KR101462132B1 (ko) * 2008-03-18 2014-11-17 일렉트로 사이언티픽 인더스트리즈, 아이엔씨 다층 반도체 웨이퍼의 처리

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE316691T1 (de) * 2002-04-19 2006-02-15 Xsil Technology Ltd Laser-behandlung
JP2008159985A (ja) * 2006-12-26 2008-07-10 Matsushita Electric Ind Co Ltd 半導体チップの製造方法
JP2009111147A (ja) * 2007-10-30 2009-05-21 Denso Corp 半導体チップ及びその製造方法
GB2459302A (en) * 2008-04-18 2009-10-21 Xsil Technology Ltd A method of dicing wafers to give high die strength
GB2459301B (en) * 2008-04-18 2011-09-14 Xsil Technology Ltd A method of dicing wafers to give high die strength
US8071429B1 (en) 2010-11-24 2011-12-06 Omnivision Technologies, Inc. Wafer dicing using scribe line etch
US8666530B2 (en) * 2010-12-16 2014-03-04 Electro Scientific Industries, Inc. Silicon etching control method and system
US8673741B2 (en) * 2011-06-24 2014-03-18 Electro Scientific Industries, Inc Etching a laser-cut semiconductor before dicing a die attach film (DAF) or other material layer
US8361828B1 (en) * 2011-08-31 2013-01-29 Alta Devices, Inc. Aligned frontside backside laser dicing of semiconductor films
US8399281B1 (en) * 2011-08-31 2013-03-19 Alta Devices, Inc. Two beam backside laser dicing of semiconductor films
US8536025B2 (en) * 2011-12-12 2013-09-17 International Business Machines Corporation Resized wafer with a negative photoresist ring and design structures thereof
US8952413B2 (en) 2012-03-08 2015-02-10 Micron Technology, Inc. Etched trenches in bond materials for die singulation, and associated systems and methods
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US8664089B1 (en) * 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
JP6166034B2 (ja) * 2012-11-22 2017-07-19 株式会社ディスコ ウエーハの加工方法
US8980726B2 (en) * 2013-01-25 2015-03-17 Applied Materials, Inc. Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers
CN105102230B (zh) 2013-02-13 2017-08-08 惠普发展公司，有限责任合伙企业 流体喷射装置
US9472458B2 (en) 2014-06-04 2016-10-18 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
JP6282194B2 (ja) * 2014-07-30 2018-02-21 株式会社ディスコ ウェーハの加工方法
US9601437B2 (en) 2014-09-09 2017-03-21 Nxp B.V. Plasma etching and stealth dicing laser process
US9337098B1 (en) 2015-08-14 2016-05-10 Semiconductor Components Industries, Llc Semiconductor die back layer separation method
JP6587911B2 (ja) * 2015-11-16 2019-10-09 株式会社ディスコ ウエーハの分割方法
CN108630599A (zh) * 2017-03-22 2018-10-09 东莞新科技术研究开发有限公司 芯片的形成方法
US10373869B2 (en) 2017-05-24 2019-08-06 Semiconductor Components Industries, Llc Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus
CN107579032B (zh) * 2017-07-27 2019-04-09 厦门市三安集成电路有限公司 一种化合物半导体器件的背面制程方法
JP7066263B2 (ja) * 2018-01-23 2022-05-13 株式会社ディスコ 加工方法、エッチング装置、及びレーザ加工装置
US10916474B2 (en) 2018-06-25 2021-02-09 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
CN110634796A (zh) 2018-06-25 2019-12-31 半导体元件工业有限责任公司 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
US11217550B2 (en) 2018-07-24 2022-01-04 Xilinx, Inc. Chip package assembly with enhanced interconnects and method for fabricating the same
JP7296835B2 (ja) 2019-09-19 2023-06-23 株式会社ディスコ ウェーハの処理方法、及び、チップ測定装置

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4190488A (en) * 1978-08-21 1980-02-26 International Business Machines Corporation Etching method using noble gas halides
JPS56103447A (en) * 1980-01-22 1981-08-18 Toshiba Corp Dicing method of semiconductor wafer
US4355457A (en) * 1980-10-29 1982-10-26 Rca Corporation Method of forming a mesa in a semiconductor device with subsequent separation into individual devices
US4478677A (en) * 1983-12-22 1984-10-23 International Business Machines Corporation Laser induced dry etching of vias in glass with non-contact masking
JPH02305450A (ja) * 1989-05-19 1990-12-19 Mitsubishi Electric Corp 加速度センサの製造方法
JPH03183153A (ja) * 1989-12-12 1991-08-09 Fujitsu Ltd 半導体装置の製造方法
JPH07201784A (ja) * 1994-01-07 1995-08-04 Fujitsu Ltd 半導体装置の製造方法
JPH07273068A (ja) * 1994-03-30 1995-10-20 Nec Kansai Ltd ダイシング装置
US6498074B2 (en) * 1996-10-29 2002-12-24 Tru-Si Technologies, Inc. Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
GB2320615B (en) * 1996-12-19 2001-06-20 Lintec Corp Process for producing a chip and pressure sensitive adhesive sheet for said process
WO1998032163A1 (en) * 1997-01-22 1998-07-23 California Institute Of Technology Gas phase silicon etching with bromine trifluoride
JP2000091274A (ja) * 1998-09-17 2000-03-31 Hitachi Ltd 半導体チップの形成方法およびそれを用いた半導体装置の製造方法
JP2000114204A (ja) * 1998-10-01 2000-04-21 Mitsubishi Electric Corp ウエハシート及びこれを用いた半導体装置の製造方法並びに半導体製造装置
US6413839B1 (en) * 1998-10-23 2002-07-02 Emcore Corporation Semiconductor device separation using a patterned laser projection
JP3447602B2 (ja) * 1999-02-05 2003-09-16 シャープ株式会社 半導体装置の製造方法
DE19919471A1 (de) * 1999-04-29 2000-11-09 Bosch Gmbh Robert Verfahren zur Beseitigung von Defekten von Siliziumkörpern durch selektive Ätzung
US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US6290864B1 (en) * 1999-10-26 2001-09-18 Reflectivity, Inc. Fluoride gas etching of silicon with improved selectivity
DE60124938T2 (de) * 2000-10-26 2007-09-20 Xsil Technology Ltd. Steueurung von laserbearbeitung
US6465344B1 (en) * 2001-03-09 2002-10-15 Indigo Systems Corporation Crystal thinning method for improved yield and reliability
US6642127B2 (en) * 2001-10-19 2003-11-04 Applied Materials, Inc. Method for dicing a semiconductor wafer
JP2003197569A (ja) 2001-12-28 2003-07-11 Disco Abrasive Syst Ltd 半導体チップの製造方法
WO2003071591A1 (en) * 2002-02-25 2003-08-28 Disco Corporation Method for dividing semiconductor wafer
CN1298292C (zh) * 2002-03-11 2007-02-07 贝克顿迪肯森公司 制造手术刀片的系统和方法
ATE316691T1 (de) * 2002-04-19 2006-02-15 Xsil Technology Ltd Laser-behandlung
US6817776B2 (en) * 2002-11-19 2004-11-16 International Business Machines Corporation Method of bonding optical fibers and optical fiber assembly
TWI238444B (en) * 2002-12-10 2005-08-21 Seiko Epson Corp Method for manufacturing optoelectronic device, optoelectronic device and electronic machine
JP4474834B2 (ja) * 2003-02-27 2010-06-09 セイコーエプソン株式会社 半導体チップの製造方法
GB2399311B (en) * 2003-03-04 2005-06-15 Xsil Technology Ltd Laser machining using an active assist gas
US7087452B2 (en) * 2003-04-22 2006-08-08 Intel Corporation Edge arrangements for integrated circuit chips
JP3743890B2 (ja) * 2004-03-27 2006-02-08 通朗 伊藤 収容袋巻装体
US7265034B2 (en) * 2005-02-18 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade
WO2007025039A2 (en) * 2005-08-23 2007-03-01 Xactix, Inc. Pulsed etching cooling

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101462132B1 (ko) * 2008-03-18 2014-11-17 일렉트로 사이언티픽 인더스트리즈, 아이엔씨 다층 반도체 웨이퍼의 처리
KR101140369B1 (ko) * 2010-03-26 2012-05-03 최선규 이플루오르화크세논을 이용한 기판 가공장치 및 다이싱 방법

Also Published As

Publication number Publication date
CN101088157A (zh) 2007-12-12
TW200625435A (en) 2006-07-16
GB2420443B (en) 2009-09-16
JP2010147488A (ja) 2010-07-01
US20090191690A1 (en) 2009-07-30
JP2008518450A (ja) 2008-05-29
GB0424195D0 (en) 2004-12-01
WO2006048230A1 (en) 2006-05-11
ATE526681T1 (de) 2011-10-15
GB2420443A (en) 2006-05-24
EP1825507B1 (en) 2011-09-28
EP1825507A1 (en) 2007-08-29
CN101088157B (zh) 2010-06-23
TWI278032B (en) 2007-04-01
JP4690417B2 (ja) 2011-06-01

Similar Documents

Publication Publication Date Title
KR20070051360A (ko) 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법
US6642127B2 (en) Method for dicing a semiconductor wafer
US8664089B1 (en) Semiconductor die singulation method
US9847219B2 (en) Semiconductor die singulation method
Landesberger et al. New dicing and thinning concept improves mechanical reliability of ultra thin silicon
KR20100032643A (ko) 실리콘 다이렉트 본딩(ｓｄｂ)을 이용한 임시 웨이퍼 임시 본딩 방법, 및 그 본딩 방법을 이용한 반도체 소자 및 반도체 소자 제조 방법
JP2005051007A (ja) 半導体チップの製造方法
WO2007088058A2 (en) Support for wafer singulation
CN1705138A (zh) 用于制造微型机电系统的方法
JP5887633B1 (ja) 半導体片の製造方法
US12060266B2 (en) Method with mechanical dicing process for producing MEMS components
KR20170075702A (ko) 반도체 다이 싱귤레이션 방법
KR101116944B1 (ko) 집적 회로의 제조 방법
KR101731805B1 (ko) 반도체 다이 싱귤레이션 방법
US20080044985A1 (en) Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods
Barnett et al. Considerations and benefits of plasma etch based wafer dicing
WO2009127738A1 (en) A method of dicing wafers to give high die strength
EP2015356A1 (en) Method for singulation of wafers
WO2009127740A1 (en) A method of dicing wafers to give high die strength
WO2011021981A1 (en) Method of dicing a wafer
JP2000183030A (ja) ドライアッシング装置

Legal Events

Date Code Title Description
A201 Request for examination
PA0105 International application

Patent event date: 20070411

Patent event code: PA01051R01D

Comment text: International Patent Application

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20070411

Comment text: Request for Examination of Application

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20080130

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 20080528

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 20080130

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I

J201 Request for trial against refusal decision
PJ0201 Trial against decision of rejection

Patent event date: 20080828

Comment text: Request for Trial against Decision on Refusal

Patent event code: PJ02012R01D

Patent event date: 20080528

Comment text: Decision to Refuse Application

Patent event code: PJ02011S01I

Appeal kind category: Appeal against decision to decline refusal

Decision date: 20090320

Appeal identifier: 2008101008648

Request date: 20080828

J301 Trial decision

Free format text: TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20080828

Effective date: 20090320

PJ1301 Trial decision

Patent event code: PJ13011S01D

Patent event date: 20090320

Comment text: Trial Decision on Objection to Decision on Refusal

Appeal kind category: Appeal against decision to decline refusal

Request date: 20080828

Decision date: 20090320

Appeal identifier: 2008101008648